CN103687312B - Gold-plated method for manufacturing circuit board - Google Patents
Gold-plated method for manufacturing circuit board Download PDFInfo
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- CN103687312B CN103687312B CN201310577461.0A CN201310577461A CN103687312B CN 103687312 B CN103687312 B CN 103687312B CN 201310577461 A CN201310577461 A CN 201310577461A CN 103687312 B CN103687312 B CN 103687312B
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- 238000000034 method Methods 0.000 title claims abstract description 68
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 45
- 229910052802 copper Inorganic materials 0.000 claims abstract description 43
- 239000010949 copper Substances 0.000 claims abstract description 43
- 238000007747 plating Methods 0.000 claims abstract description 40
- 238000003801 milling Methods 0.000 claims abstract description 34
- 238000005530 etching Methods 0.000 claims abstract description 25
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 25
- 239000010931 gold Substances 0.000 claims abstract description 25
- 229910052737 gold Inorganic materials 0.000 claims abstract description 25
- 229910000570 Cupronickel Inorganic materials 0.000 claims abstract description 14
- 238000005553 drilling Methods 0.000 claims abstract description 6
- 238000003466 welding Methods 0.000 claims abstract description 6
- 238000003825 pressing Methods 0.000 claims abstract description 5
- 238000004381 surface treatment Methods 0.000 claims abstract description 5
- 230000008569 process Effects 0.000 claims description 23
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 19
- 238000009713 electroplating Methods 0.000 claims description 12
- 238000001465 metallisation Methods 0.000 claims description 8
- 238000005555 metalworking Methods 0.000 claims description 6
- 239000007788 liquid Substances 0.000 claims description 5
- 238000003384 imaging method Methods 0.000 claims description 3
- 238000012546 transfer Methods 0.000 claims description 3
- 239000002253 acid Substances 0.000 claims description 2
- 230000003628 erosive effect Effects 0.000 claims description 2
- 238000002360 preparation method Methods 0.000 abstract description 20
- 239000010410 layer Substances 0.000 description 23
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 239000011241 protective layer Substances 0.000 description 6
- 230000007547 defect Effects 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 239000003814 drug Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 238000004886 process control Methods 0.000 description 3
- 230000004224 protection Effects 0.000 description 3
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000009957 hemming Methods 0.000 description 2
- 238000012797 qualification Methods 0.000 description 2
- 230000008439 repair process Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 241001311547 Patina Species 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 210000004209 hair Anatomy 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Electroplating Methods And Accessories (AREA)
Abstract
The invention discloses a kind of gold-plated method for manufacturing circuit board, belong to printed wiring board technical field.The preparation method includes sawing sheet, inner figure making, pressing, drilling, groove milling, heavy copper plating, plating, a milling, etching, surrender sheath, outer graphics making, graphic plating cupro-nickel gold, outer graphics etching, anti-welding, surface treatment procedure.The problem of coated plate burr can solve the problem that using the preparation method, it is not necessary to manual amendment, and flow is simple, it is easy to control, be both saved greatly cost of labor, production efficiency is improved again.
Description
Technical field
The present invention relates to a kind of process of printed wiring board, more particularly to a kind of gold-plated method for manufacturing circuit board.
Background technology
As electronic product constantly develops to the direction of multifunction, miniaturization, high performance, to printed wiring board
Miniaturization, the requirement of densification also increasingly improve, its product is also developed from common PCB to high-density build-up printed board.
The making key of high-density build-up printed board is the realization of its VHD and high reliability, gold utensil have good electric conductivity,
Chemical stability and solderability, gold plate is smooth, light, and corrosion resistance is high, can meet high-density build-up printed board high reliability
Requirement, therefore its application expands day by day, and such as electro-optical package, such plate is designed as " metal hemming edge ", or " PTH is broken in milling
（Plating Through Hole）Hole ".And during PCB is manufactured, half hole forming easily produces burr burr, such as Fig. 1
Shown, milling cutter 1 is moved according to direction shown in arrow in figure, can produce burr in the aperture of metallization or notch.
In traditional golden finger technology, Making programme is generally：Sawing sheet → inner figure making → pressing → drilling → milling
A groove → heavy copper plating → outer graphics → graphic plating cupro-nickel gold → milling → outer graphics etching → anti-welding → character → into
Type.
Such a method, it is consistent with the method for common positive blade technolgy milling half bore, it is by edge PTH hole by the method for a milling
Or groove milling is broken, then by outer layer etching unnecessary burr burr is etched away, to reach the purpose for avoiding burr, still, in plating
In the making of " metal hemming edge " of golden circuit board or " edge PTH hole is broken in milling ", it can often find that etching process can not be by all burr hairs
The problem of thorn is etched away.
The content of the invention
Based on this, it is an object of the invention to overcome the defect of prior art there is provided a kind of gold-plated method for manufacturing circuit board,
Using the preparation method, the problem of can solve the problem that coated plate burr, it is not necessary to manual amendment, and flow is simple, it is easy to control, both
Cost of labor is saved greatly, production efficiency is improved again.
To achieve the above object, the present invention takes following technical scheme：
A kind of gold-plated method for manufacturing circuit board, including the making of sawing sheet, inner figure, pressing, drilling, groove milling, the plating of heavy copper,
Plating, a milling, etching, surrender sheath, outer graphics make, graphic plating cupro-nickel gold, outer graphics etching, it is anti-welding,
Surface treatment procedure；Wherein：
In groove milling process, being processed in the way of groove milling needs the side wall of metallized area；
In heavy copper electroplating work procedure, by the heavy copper metallization of the groove milled out；
In miller sequence, above-mentioned groove milling is broken, unnecessary copper is removed；
In etching work procedure, the copper thorn that a miller sequence is produced is removed by the way of etching.
In the present invention, after double of hole forming technique fully study, it is found that the burr produced can not be completely by rear
Continuous etching process is removed, and during its reason is routine techniques, a miller sequence is after graphic plating cupro-nickel gold, the groove of metallization
Layer gold has inside been covered, and gold utensil has good stability, therefore the spun gold burr produced can not be removed in etching process.
On the basis of the studies above, preparation method of the invention breaches conventional production procedure, creative by figure
Plating cupro-nickel metal working sequence is put into after a miller sequence, also, in order to which the copper deposited after heavy copper is electroplated is protected, it is to avoid
It is etched in the etching process after a milling, the process for especially adding plating, using protective layer by deposition
Layers of copper is protected.And then a miller sequence, half groove metallized are first carried out, and the burr now produced is copper wire, can
Removed in etching, and the layers of copper of remainder obtains the protection of protective layer, will not be etched the purpose of destruction.Therefore, herein
Graphic plating cupro-nickel gold is carried out after process again, the spun gold burr that can not be removed would not be produced, coated plate burr is solved
Problem.
In one of the embodiments, in the outer graphics production process, made using the mode of dry film exposure imaging
Outer graphics, and when dry film exposes, the exposure area of dry film is extended into groove, it is less than the aperture that dry film exposes after developing
The aperture of groove.By making the aperture of exposure after dry film development be less than the aperture of groove（Form the form of " negative weld-ring "）, to groove edge
Protected, it is to avoid produce the defect for oozing gold.
In one of the embodiments, the exposure area of the dry film extends 2-5mil into groove.By dry film be designed as to
Extension 2-5mil scope, both avoids the defect for producing and oozing gold, in turn ensure that can carry out liquid medicine exchange in groove, not shadow in groove
Ring follow-up process.
In one of the embodiments, in the plating process, protective layer is tin layers.Protected, had using tin layers
Convenient, easy advantage.
In one of the embodiments, the thickness of the tin layers is 5-10 μm.The tin layers of the thickness can provide for layers of copper
Enough protections, are easy to strip in surrender sheath process again.
In one of the embodiments, in the surrender sheath process, carry out moving back tin using acid tin stripping liquid.This method pair
Copper substrate not damaged, and can remove patina mark makes Copper substrate light such as new, to base resin and plastic cement and the equal nothing such as ink word
Corrosion, it is also big with tin amount is moved back, move back the fireballing advantage of tin.
In one of the embodiments, in the heavy copper electroplating work procedure, it is 6-12 μm to control buried copper thickness.Reach preferably
Metallization effects.
In one of the embodiments, in the heavy copper electroplating work procedure, control electric current density is 5-15ASF, and the time is 25-
60min.Using the current density and time, can when layers of copper deposition reach more preferable effect.
In one of the embodiments, in the etching work procedure, the transfer rate of etching is 3.5-5m/min.This method energy
It is enough to etch away all copper wire burrs of generation, and can avoid producing lateral erosion.
In one of the embodiments, in the graphic plating cupro-nickel metal working sequence, gold-plated condition is control electric current density
For 2-3ASF, the time is 60-120 seconds, and layer gold thickness is 0.025-0.075 μm.Layer gold is set to reach enough thickness and hardness, it is full
Sufficient design requirement.
Compared with prior art, the invention has the advantages that：
A kind of gold-plated method for manufacturing circuit board of the present invention, in order to avoid producing spun gold burr, by graphic plating cupro-nickel gold
Process is delayed to a miller sequence, and by carrying out a milling again after full plate plating, it is ensured that the layers of copper of deposition is not
It is destroyed, can be with the 100% golden broken Burr Problem for removing coated plate, while after production procedure is made, it is not necessary to manually repair
Reason, greatly improves the qualification rate of product.The preparation method of the present invention is applied to milling and breaks plating bath（Hole）All designs in,
The problem of metal produces burr with nonmetallic boundary position can effectively be solved.
Also, negative weld-ring form of the preparation method also by designing outer graphics, it is ensured that liquid medicine friendship can be carried out in groove
Change and do not produce the defect for oozing gold.
Brief description of the drawings
Fig. 1 is that the schematic diagram that burr is produced after edge PTH hole is broken in milling cutter milling；
Fig. 2 is the preparation method flow chart of embodiment 1；
Fig. 3 is schematic diagram after groove milling in the preparation method of embodiment 1；
Fig. 4 is schematic diagram after heavy copper plating in the preparation method of embodiment 1；
Fig. 5 is schematic diagram after a milling in the preparation method of embodiment 1；
Fig. 6 is schematic diagram after being etched in the preparation method of embodiment 1；
Fig. 7 makes schematic diagram after dry film development for outer graphics in the preparation method of embodiment 1.
Wherein：1. milling cutter；2. groove；3. dry film.
Embodiment
The present invention is described in detail below in conjunction with the drawings and specific embodiments.
Embodiment 1
A kind of gold-plated method for manufacturing circuit board, as shown in Fig. 2 including sawing sheet, inner figure making, pressing, drilling, milling
Groove, heavy copper plating, plating, a milling, etching, surrender sheath, outer graphics making, graphic plating cupro-nickel gold, outer layer figure
Shape etching, anti-welding, surface treatment procedure；Wherein：
Sawing sheet, inner figure are made, pressed, drilling operating is handled according to common process.
In groove milling process, being processed in the way of groove milling 2 needs the side wall of metallized area, as shown in Figure 3.
In heavy copper electroplating work procedure, as shown in figure 4, by the heavy copper metallization of the groove milled out, electroplating process control electric current density is
8ASF, the time is 25min, makes copper thickness up to 6 μm.
In plating process, protective layer is tin layers, and the thickness of the tin layers is 5 μm.
In miller sequence, above-mentioned groove milling is broken, unnecessary copper is removed, as shown in Figure 5；
In etching work procedure, the copper thorn that a miller sequence is produced is removed by the way of etching, as shown in Figure 6.
Surrender sheath process（Move back tin）In, the pcb board that a milling is completed is placed on lateral etch machine, concurrently set
5m/min transfer rate is etched.
In outer graphics production process, outer graphics are made using the mode of dry film exposure imaging, and when dry film exposes,
The exposure area of dry film is extended into 2mil into groove, the aperture that the aperture for making dry film 3 be exposed after developing is less than groove is as shown in Figure 7.
In graphic plating cupro-nickel metal working sequence, copper facing, nickel plating are handled according to common process, and gold-plated condition is close for control electric current
Spend for 2ASF, the time is 60min, layer gold thickness is reached 0.025 μm, and with preferable hardness.
Outer graphics etching, anti-welding, surface treatment procedure are handled according to common process.
Embodiment 2
The gold-plated method for manufacturing circuit board of the present embodiment and the preparation method in embodiment 1 are essentially identical, and difference is：
In heavy copper electroplating work procedure, by the heavy copper metallization of the groove milled out, electroplating process control electric current density is 15ASF, time
For 60min, make copper thickness up to 12 μm.
In plating process, protective layer is tin layers, and the thickness of the tin layers is 10 μm.
In outer graphics production process, when dry film exposes, the exposure area of dry film is extended into 5mil into groove.
In graphic plating cupro-nickel metal working sequence, copper facing, nickel plating are handled according to common process, and gold-plated condition is close for control electric current
Spend for 3ASF, the time is 120 seconds, layer gold thickness is reached 0.075 μm.
Embodiment 3
The gold-plated method for manufacturing circuit board of the present embodiment and the preparation method in embodiment 1 are essentially identical, and difference is：
In heavy copper electroplating work procedure, by the heavy copper metallization of the groove milled out, electroplating process control electric current density is 10ASF, time
For 40min, make copper thickness up to 9 μm.
In plating process, protective layer is tin layers, and the thickness of the tin layers is 7 μm.
In outer graphics production process, when dry film exposes, the exposure area of dry film is extended into 3mil into groove.
In graphic plating cupro-nickel metal working sequence, copper facing, nickel plating are handled according to common process, and gold-plated condition is close for control electric current
Spend for 2ASF, the time is 90 seconds, layer gold thickness is reached 0.05 μm.
Test example plates the Performance of golden circuit board
The plating golden circuit board that above-described embodiment 1-3 preparation method is prepared is tested below, it is investigated every
Performance.
First, there is burr situation.
Polylith wiring board is prepared respectively according to embodiment 1-3 preparation method, investigates it and the situation of burr occurs.
There is burr situation in the wiring board of table 1
| Wiring board sum | There is the plate number of burr | There is the ratio of burr | |
| Wiring board prepared by embodiment 1 | 30pnl | 0 | 0% |
| Wiring board prepared by embodiment 2 | 30pnl | 0 | 0% |
| Wiring board prepared by embodiment 3 | 30pnl | 0 | 0% |
Note：Pnl represents block.
, can be with 100% as can be seen that using the plating golden circuit board that embodiment 1-3 preparation method is obtained from above-mentioned table 1
Removal coated plate golden broken Burr Problem, and in production procedure, without carrying out manual repair, greatly improve gold-plated
The qualification rate of wiring board.
2nd, gold-plated situation is investigated.
Preparation method according to embodiment 1-3 prepares polylith wiring board respectively, and is prepared with reference to the preparation method of embodiment 1
Wiring board is contrasted, the difference for contrasting the preparation method and embodiment 1 of wiring board is：In outer graphics production process, make dry film
Exposure area extend not into groove or into groove extend 1mil or 8mil.Investigate above-mentioned wiring board and the situation for oozing gold occur.
The gold-plated situation of the wiring board of table 2
From above-mentioned table 1 as can be seen that embodiment 1-3 in, by the way that the exposure area of dry film is extended into groove, can with gram
Clothes occur oozing golden phenomenon caused by displacement deviation due to dry film.And found having investigated in groove after gold-plated situation, in order to not
The plating flow of postorder is influenceed, extension can not be too big into groove for the exposure area of dry film, in case producing liquid medicine exchanges bad
The problem of, empirical tests, extending in 2-5mil scopes has preferable effect.
Embodiment described above only expresses the several embodiments of the present invention, and it describes more specific and detailed, but simultaneously
Therefore the limitation to the scope of the claims of the present invention can not be interpreted as.It should be pointed out that for one of ordinary skill in the art
For, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to the guarantor of the present invention
Protect scope.Therefore, the protection domain of patent of the present invention should be determined by the appended claims.
Claims (6)
1. a kind of gold-plated method for manufacturing circuit board, it is characterised in that including sawing sheet, inner figure making, pressing, drilling, groove milling,
Heavy copper plating, plating, a milling, etching, surrender sheath, outer graphics making, graphic plating cupro-nickel gold, outer graphics erosion
Quarter, anti-welding, surface treatment procedure；Wherein：
In groove milling process, being processed in the way of groove milling needs the side wall of metallized area；
In heavy copper electroplating work procedure, by the heavy copper metallization of the groove milled out；
In miller sequence, above-mentioned groove milling is broken, unnecessary copper is removed；
In etching work procedure, the copper thorn that a miller sequence is produced is removed by the way of etching；
Wherein, in the outer graphics production process, outer graphics are made using the mode of dry film exposure imaging, and expose in dry film
Light time, the exposure area of dry film is extended into 2-5mil into groove, the aperture for making dry film be exposed after developing is less than the aperture of groove；
In the heavy copper electroplating work procedure, it is 6-12 μm to control buried copper thickness；
In the graphic plating cupro-nickel metal working sequence, gold-plated condition is that control electric current density is 2-3ASF, and the time is 60-120 seconds,
Layer gold thickness is 0.025-0.075 μm.
2. gold-plated method for manufacturing circuit board according to claim 1, it is characterised in that in the plating process, is protected
Sheath is tin layers.
3. gold-plated method for manufacturing circuit board according to claim 2, it is characterised in that the thickness of the tin layers is 5-10 μ
m。
4. gold-plated method for manufacturing circuit board according to claim 2, it is characterised in that in the surrender sheath process, adopt
Carried out moving back tin with acid tin stripping liquid.
5. gold-plated method for manufacturing circuit board according to claim 1, it is characterised in that in the heavy copper electroplating work procedure, control
Current density processed is 5-15ASF, and the time is 25-60min.
6. gold-plated method for manufacturing circuit board according to claim 1, it is characterised in that in the etching work procedure, etching
Transfer rate is 3.5-5m/min.
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| CN201310577461.0A CN103687312B (en) | 2013-11-18 | 2013-11-18 | Gold-plated method for manufacturing circuit board |
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| CN201310577461.0A CN103687312B (en) | 2013-11-18 | 2013-11-18 | Gold-plated method for manufacturing circuit board |
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| CN103687312B true CN103687312B (en) | 2017-09-22 |
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Cited By (1)
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| CN108391377A (en) * | 2018-03-06 | 2018-08-10 | 东莞森玛仕格里菲电路有限公司 | A kind of edges of boards electroplating bath goes burr manufacture craft |
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| CN112739020A (en) * | 2020-12-15 | 2021-04-30 | 广德宝达精密电路有限公司 | Method for manufacturing gold-plated circuit board |
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| CN103687312A (en) | 2014-03-26 |
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Application publication date: 20140326 Assignee: Guangzhou Kaide Finance Leasing Co.,Ltd. Assignor: SHENZHEN FASTPRINT CIRCUIT TECH Co.,Ltd.|GUANGZHOU FASTPRINT CIRCUIT TECH Co.,Ltd.|YIXING SILICON VALLEY ELECTRONICS TECH Co.,Ltd.|GUANGZHOU XINGSEN ELECTRONIC Co.,Ltd. Contract record no.: 2019990000235 Denomination of invention: Gold-plated circuit board manufacturing method Granted publication date: 20170922 License type: Exclusive License Record date: 20190716 |
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Denomination of invention: Gold-plated circuit board manufacturing method Effective date of registration: 20190807 Granted publication date: 20170922 Pledgee: Guangzhou Kaide Finance Leasing Co.,Ltd. Pledgor: GUANGZHOU FASTPRINT CIRCUIT TECH Co.,Ltd.|SHENZHEN FASTPRINT CIRCUIT TECH Co.,Ltd.|YIXING SILICON VALLEY ELECTRONICS TECH Co.,Ltd. Registration number: Y2019990000032 |
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Assignee: Guangzhou Kaide Finance Leasing Co.,Ltd. Assignor: GUANGZHOU FASTPRINT CIRCUIT TECH Co.,Ltd.|SHENZHEN FASTPRINT CIRCUIT TECH Co.,Ltd.|YIXING SILICON VALLEY ELECTRONICS TECH Co.,Ltd.|GUANGZHOU XINGSEN ELECTRONIC Co.,Ltd. Contract record no.: 2019990000235 Date of cancellation: 20220922 |
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Date of cancellation: 20220922 Granted publication date: 20170922 Pledgee: Guangzhou Kaide Finance Leasing Co.,Ltd. Pledgor: GUANGZHOU FASTPRINT CIRCUIT TECH Co.,Ltd.|SHENZHEN FASTPRINT CIRCUIT TECH Co.,Ltd.|YIXING SILICON VALLEY ELECTRONICS TECH Co.,Ltd. Registration number: Y2019990000032 |