CN105607366B - 防静电器件及其制造方法、基板 - Google Patents

防静电器件及其制造方法、基板 Download PDF

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Publication number
CN105607366B
CN105607366B CN201610005081.3A CN201610005081A CN105607366B CN 105607366 B CN105607366 B CN 105607366B CN 201610005081 A CN201610005081 A CN 201610005081A CN 105607366 B CN105607366 B CN 105607366B
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layer
conductive layer
via hole
insulating layer
conductive
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CN105607366A (zh
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任兴凤
汪森林
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Priority to CN201610005081.3A priority Critical patent/CN105607366B/zh
Publication of CN105607366A publication Critical patent/CN105607366A/zh
Priority to PCT/CN2016/094107 priority patent/WO2017118013A1/zh
Priority to US15/629,975 priority patent/US10025152B2/en
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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Abstract

本发明公开了一种防静电器件及其制造方法、基板。其中，防静电器件包括：第一导电层；第一绝缘层，形成在第一导电层上；有源层，形成在第一绝缘层上；刻蚀阻挡层，形成在有源层上；第二导电层，形成在刻蚀阻挡层上，包括相互隔开的第一部分和第二部分；第二导电层的第一部分和第二部分分别通过形成在刻蚀阻挡层中的第一过孔和第二过孔与有源层电连接；第二导电层的第一部分和第二部分中的一个通过贯穿刻蚀阻挡层和第一绝缘层的第五过孔与第一导电层电连接。由于第二导电层通过单独的过孔与第一导电层电连接，因此，可以及时消除第一和第二导电层之间的电位差，有效防止在生产过程中出现静电击穿现象。

Description

防静电器件及其制造方法、基板
技术领域
本发明涉及一种防静电器件、防静电器件的制造方法以及包括该防静电器件的基板。
背景技术
液晶显示器的阵列基板包括像素单元和驱动该像素单元的薄膜晶体管。通常，在生产薄膜晶体管时，由于摩擦等原因，会在薄膜晶体管的不同的导电层上产生静电，当静电积累到一定程度就会出现静电击穿现象，这会导致阵列基板上的像素电路短路而受损。
为了防止出现静电击穿现象，一般需要在制造薄膜晶体管的同时形成一个防静电器件，以避免在不同的导电层之间出现静电击穿现象。图1显示现有技术中的一种防静电器件的剖视图。如图1所示，该防静电器件主要包括第一导电层11、形成在第一导电层11上的第一绝缘层12、形成在第一绝缘层12上的第二导电层15、形成在第二导电层15上的第二绝缘层16、形成在第二绝缘层16中的过孔02、形成在第二绝缘层16和第一绝缘层12中的过孔03、和形成在第二绝缘层16上的第三导电层17。
如图1所示，在现有技术中，该防静电器件的第二导电层15经由过孔02与第三导电层17电连接，第三导电层17经由过孔03与第一导电层11电连接。因此，在现有技术中，在形成第三导电层17之前，第二导电层15与第一导电层11之间是相互电隔离开的。因此，在形成第三导电层17之前，在第二导电层15与第一导电层11之间存在电压差(因为在制造的过程中，例如，摩擦等原因，会导致第二导电层15和第一导电层11上存在静电，当静电积累到一定程度就会出现静电击穿现象)，当该电压差足够高时，就会击穿第二导电层15与第一导电层11之间的第一绝缘层12，这会导致阵列基板上的像素电路短路而受损。
因此，在现有技术中，在制造薄膜晶体管的过程中，依然会出现静电击穿现象。静电击穿会导致显示装置中的阵列基板上的像素电路受损，严重时会导致阵列基板上的像素电路短路，阵列基板无法正常工作。
此外，如图1所示，在现有技术中，电连接第三导电层17和第一导电层11的过孔03需要贯穿第一绝缘层12和第二绝缘层13，这导致过孔03的长度较大，难以制作。有时实际形成的过孔03不能完全贯穿第一绝缘层12和第二绝缘层16，这会导致第三导电层17不能电连接到第一导电层11，增加了第三导电层17与第一导电层11之间电断开(OPEN)的概率。
发明内容
本发明的目的旨在解决现有技术中存在的上述问题和缺陷的至少一个方面。
根据本发明的一个目的，提供一种防静电器件，其能够消除不同导电层之间的电位差，有效地防止在不同导电层之间出现静电击穿现象。
根据本发明的另一个目的，提供一种防静电器件，其能够减小跨接两个导电层的过孔的长度，有效降低了两个导电层之间出现电断开的概率。
根据本发明的一个方面，提供一种防静电器件，包括：第一导电层；第一绝缘层，形成在所述第一导电层上；有源层，形成在所述第一绝缘层上；刻蚀阻挡层，形成在所述有源层上；第二导电层，形成在所述刻蚀阻挡层上，包括相互隔开的第一部分和第二部分；第二绝缘层，形成在所述第二导电层上；和第三导电层，形成在所述第二绝缘层上，所述第二导电层的第一部分和第二部分分别通过形成在所述刻蚀阻挡层中的第一过孔和第二过孔与所述有源层电连接，并且分别通过形成在所述第二绝缘层中的第三过孔和第四过孔与所述第三导电层电连接，所述第二导电层的第一部分和第二部分中的一个通过贯穿所述刻蚀阻挡层和所述第一绝缘层的第五过孔与所述第一导电层电连接。
根据本发明的另一个方面，提供一种阵列基板，包括前述防静电器件。
根据本发明的另一个方面，提供一种制造前述防静电器件的方法，包括以下步骤：
在所述第一导电层上形成第一绝缘层；
在所述第一绝缘层上形成有源层；
在所述有源层上形成刻蚀阻挡层；
形成贯穿所述刻蚀阻挡层的第一过孔和第二过孔和形成贯穿所述刻蚀阻挡层和所述第一绝缘层的第五过孔；
在所述刻蚀阻挡层上形成第二导电层，所述第二导电层的第一部分和第二部分分别通过所述第一过孔和第二过孔与所述有源层电连接，所述第二导电层的第一部分和第二部分中的一个通过所述第五过孔与所述第一导电层电连接；
在所述第二导电层上形成第二绝缘层；
形成贯穿所述第二绝缘层的第三过孔和第四过孔；和
在所述第二绝缘层上形成第三导电层，所述第三导电层分别通过所述第三过孔和第四过孔与所述第二导电层的第一部分和第二部分电连接。
在根据本发明的前述各个实施例的防静电器件中，第二导电层通过一个单独的过孔与第一导电层电连接，可以及时消除生产过程中第二导电层与第一导电层之间的电位差，有效防止了在生产过程中出现静电击穿现象。
在本发明的一个实例性的实施例中，前述防静电器件可以在制造薄膜晶体管的同时同步形成，以避免在制造薄膜晶体管的过程中在不同的导电层之间出现静电击穿。
此外，在本发明的前述各个实施例中，跨接两个导电层的过孔只需贯穿一层绝缘层，因此，减小了跨接过孔的长度，降低了两个导电层之间出现电断开的概率。
通过下文中参照附图对本发明所作的描述，本发明的其它目的和优点将显而易见，并可帮助对本发明有全面的理解。
附图说明
图1显示现有技术中的一种防静电器件的剖视图；
图2显示根据本发明的一个实例性的实施例的防静电器件的剖视图；和
图3a-3h显示制造图2所示的防静电器件的过程。
具体实施方式
下面通过实施例，并结合附图，对本发明的技术方案作进一步具体的说明。在说明书中，相同或相似的附图标号指示相同或相似的部件。下述参照附图对本发明实施方式的说明旨在对本发明的总体发明构思进行解释，而不应当理解为对本发明的一种限制。
另外，在下面的详细描述中，为便于解释，阐述了许多具体的细节以提供对本披露实施例的全面理解。然而明显地，一个或多个实施例在没有这些具体细节的情况下也可以被实施。在其他情况下，公知的结构和装置以图示的方式体现以简化附图。
根据本发明的一个总体技术构思，提供一种防静电器件，包括：第一导电层；第一绝缘层，形成在所述第一导电层上；有源层，形成在所述第一绝缘层上；刻蚀阻挡层，形成在所述有源层上；第二导电层，相互隔开的第一部分和第二部分，形成在所述刻蚀阻挡层上；
其中，所述第二导电层的第一部分和第二部分分别通过形成在所述刻蚀阻挡层中的第一过孔和第二过孔与所述有源层电连接；
所述第二导电层的第一部分和第二部分中的一个通过贯穿所述刻蚀阻挡层和所述第一绝缘层的第五过孔与所述第一导电层电连接。
基于上述结构，相对于现有技术，第一导电层和第二导电层在未设置第三导电层之前即可实现电连接，进而能够消除上述两个不同导电层之间的电位差，有效地防止在不同导电层之间出现静电击穿现象。
在上述提供的前程结构之上，进一步设置第二绝缘层，形成在所述第二导电层上；和第三导电层，形成在所述第二绝缘层上。所述第二导电层的第一部分和第二部分分别通过形成在所述第二绝缘层中的第三过孔和第四过孔与所述第三导电层电连接。
如此设置，结合前程结构中的第二导电层与第一导电层的电连接结构，以及第二导电层与第三导电层的电连接结构，替换将现有技术中第一导电层和第三导电层直接贯通的电连接结构，避免了形成长度较大的过孔，降低了第三导电层与第一导电层断路的概率。。
图2显示根据本发明的一个实例性的实施例的防静电器件的剖视图。
在本发明的一个实例性的实施例中，公开了一种防静电器件。如图2所示，该防静电器件主要包括第一导电层110、第一绝缘层120、有源层130、刻蚀阻挡层140、第二导电层150、第二绝缘层160和第三导电层170。
如图2所示，在图示的实施例中，第一绝缘层120形成在第一导电层110上。有源层130通过构图工艺形成在第一绝缘层120上。刻蚀阻挡层140形成在有源层130上。第二导电层150形成在刻蚀阻挡层140上，该第二导电层150包括通过单次构图工艺一次性地形成的第一部分151和第二部分152。第一部分151和第二部分152相互隔开。第二绝缘层160形成在第二导电层150上。第三导电层170形成在第二绝缘层160上。
请继续参见图2，在图示的实施例中，第二导电层150的第一部分151和第二部分152分别通过形成在刻蚀阻挡层140中的第一过孔10和第二过孔20与有源层130电连接，并且第二导电层150的第一部分151和第二部分152分别通过形成在第二绝缘层150中的第三过孔30和第四过孔40与第三导电层170电连接。
在本发明的一个实例性的实施例中，如图2所示，第二导电层150的第一部分151和第二部分152中的一个通过贯穿刻蚀阻挡层140和第一绝缘层120的第五过孔50与第一导电层110电连接。在图示的实施例中，第二导电层150的第一部分151通过贯穿刻蚀阻挡层140和第一绝缘层120的第五过孔50与第一导电层110电连接。但是，本发明不局限于图示的实施例，例如，图2中的第二导电层150的第一部分151和第二部分152的位置可以互换。
在本发明的一个实施例中，如图2所示，第三导电层170可以为由铟锡氧化物(ITO)制成的透明导电层。
在本发明的一个实施例中，如图2所示，第一绝缘层120和第二绝缘层160可以为由无机绝缘材料制成的钝化保护层。例如，第一绝缘层120和第二绝缘层160可以由二氧化硅SiO2、氮化硅SiNx、氮氧化硅SiOxNy，氧化铝Al2O3或氧化钛TiOx制成。
在本发明的一个实施例中，如图2所示，有源层130可以为由氧化物半导体材料制成的半导电层。例如，有源层130可以由铟镓锌氧化物IGZO、铟镓锡氧化物氧化IGTO或铟锌氧化物IZO制成。
尽管未图示，根据本发明的另一个总体技术构思，提供一种包括前述防静电器件的基板，该基板还包括具备薄膜晶体管阵列的阵列基板部分。图3a-3h显示制造图2所示的防静电器件的过程。
下面将参照图3来详细说明制造图2所示的防静电器件的方法，该方法主要包括以下步骤：
S110：在第一导电层110上形成第一绝缘层120，如图3a所示；
S120：在第一绝缘层120上形成有源层130，如图3b所示；
S130：在有源层130上形成刻蚀阻挡层140，如图3c所示；
S140：形成贯穿刻蚀阻挡层140的第一过孔10和第二过孔20和形成贯穿刻蚀阻挡层140和第一绝缘层120的第五过孔50，如图3d所示；
S150：在刻蚀阻挡层140上形成第二导电层150，如图3e所示，第二导电层150的第一部分151和第二部分152分别通过第一过孔10和第二过孔20与有源层130电连接，第二导电层150的第一部分151和第二部分152中的一个通过第五过孔50与第一导电层110电连接；
S160：在第二导电层150上形成第二绝缘层160，如图3f所示；
S170：形成贯穿第二绝缘层160的第三过孔30和第四过孔40，如图3g所示；和
S180：在第二绝缘层160上形成第三导电层170，如图3h所示，第三导电层170分别通过第三过孔30和第四过孔40与第二导电层150的第一部分151和第二部分152电连接。
这样，就可以制造出一个如图2所示的合格的防静电器件。
在前述制造过程中，如图3e所示，一旦形成第二导电层150之后，第二导电层150的第一部分151和第二部分152就分别通过第一过孔10和第二过孔20与有源层130电连接，第二导电层150的第一部分151和第二部分152中的一个通过第五过孔50与第一导电层110电连接。在图示的实施例中，第二导电层150的第一部分151通过一个独立的第五过孔50与第一导电层110电连接，因此，第二导电层150的第一部分151和第一导电层110处于相同的电位，此时，如果第二导电层150的第一部分151与第二部分152之间存在电位差，有源层130就会导通，这就会使得第二导电层150的第一部分151、第二部分152以及第一导电层110都处于相同的电位，从而消除了第二导电层150与第一导电层110之间的电位差，有效防止了在生产过程中出现静电击穿现象。
在本发明的一个实例性的实施例中，前述防静电器件可以在制造薄膜晶体管的同时同步形成，以避免在制造薄膜晶体管的过程中在不同的导电层之间出现静电击穿，例如，以避免在制造薄膜晶体管的过程中在薄膜晶体管的源漏极层与栅极之间出现静电击穿。
在本发明的前述各个实施例中，如图3g和图3h所示，跨接第三导电层170和第二导电层150的跨接过孔30、40只需贯穿第二绝缘层160，而无需贯穿第一绝缘层140和第二绝缘层160，因此，减小了跨接第三导电层170和第二导电层150的跨接过孔30、40的长度(远小于图1所示的现有技术中的过孔03的长度)，降低了第三导电层出现电断开的概率。
在本发明的前述各个实施例中，如图3d和图3e所示，由于电连接第二导电层150和第一导电层110的第五过孔50的长度较小(远小于图1所示的现有技术中的过孔03的长度)，因此，第五过孔50容易形成，降低了制造难度，能够确保第二导电层150与第一导电层110之间可靠电连接。
与本发明的前述实施例中，如图3d所示，第一过孔10和第二过孔20从刻蚀阻挡层140的顶面一直刻蚀至有源层130，第五过孔50从刻蚀阻挡层140的顶面一直刻蚀至第一导电层110的顶面。这样，在形成第二导电层150的第一部分151和第二部分152之后，如图3e所示，第二导电层150的第一部分151和第二部分152通过由第一过孔10、第二过孔20和第五过孔50构成的双向导通电路与第一导电层110电连接，从而消除了第二导电层150与第一导电层110之间的电位差，有效防止了在生产过程中出现静电击穿现象。
本领域的技术人员可以理解，上面所描述的实施例都是示例性的，并且本领域的技术人员可以对其进行改进，各种实施例中所描述的结构在不发生结构或者原理方面的冲突的情况下可以进行自由组合。
虽然结合附图对本发明进行了说明，但是附图中公开的实施例旨在对本发明优选实施方式进行示例性说明，而不能理解为对本发明的一种限制。
虽然本总体发明构思的一些实施例已被显示和说明，本领域普通技术人员将理解，在不背离本总体发明构思的原则和精神的情况下，可对这些实施例做出改变，本发明的范围以权利要求和它们的等同物限定。
应注意，措词“包括”不排除其它元件或步骤，措词“一”或“一个”不排除多个。另外，权利要求的任何元件标号不应理解为限制本发明的范围。

Claims (10)

1.一种防静电器件，其特征在于,包括：
第一导电层(110)；
第一绝缘层(120)，形成在所述第一导电层(110)上；
有源层(130)，形成在所述第一绝缘层(120)上；
刻蚀阻挡层(140)，形成在所述有源层(130)上；
第二导电层(150)，形成在所述刻蚀阻挡层(140)上，包括相互隔开的第一部分(151)和第二部分(152)；
其中，所述第二导电层(150)的第一部分(151)和第二部分(152)分别通过形成在所述刻蚀阻挡层(140)中的第一过孔(10)和第二过孔(20)与所述有源层(130)电连接；
所述第二导电层(150)的第一部分(151)和第二部分(152)中的一个通过贯穿所述刻蚀阻挡层(140)和所述第一绝缘层(120)的第五过孔(50)与所述第一导电层(110)电连接，
其中所述防静电器件还包括：
第二绝缘层(160)，形成在所述第二导电层(150)上；和
第三导电层(170)，形成在所述第二绝缘层(160)上，
所述第二导电层(150)的第一部分(151)和第二部分(152)分别通过形成在所述第二绝缘层(160)中的第三过孔(30)和第四过孔(40)与所述第三导电层(170)电连接。
2.根据权利要求1所述的防静电器件，其特征在于：
所述第三导电层(170)为由铟锡氧化物制成的透明导电层。
3.根据权利要求1所述的防静电器件，其特征在于：
所述第一绝缘层(120)和所述第二绝缘层(160)为由无机绝缘材料制成的钝化保护层。
4.根据权利要求3所述的防静电器件，其特征在于：
所述第一绝缘层(120)和所述第二绝缘层(160)由二氧化硅、氮化硅、氮氧化硅，氧化铝或氧化钛制成。
5.根据权利要求1所述的防静电器件，其特征在于：
所述有源层(130)为由氧化物半导体材料制成的半导电层。
6.根据权利要求5所述的防静电器件，其特征在于：
所述有源层(130)由铟镓锌氧化物、铟镓锡氧化物或铟锌氧化物制成。
7.一种基板，其特征在于，包括权利要求1至6任一项所述的防静电器件。
8.一种制造权利要求1至6任一项所述的防静电器件的方法，包括以下步骤：
在所述第一导电层(110)上形成第一绝缘层(120)；
在所述第一绝缘层(120)上形成有源层(130)；
在所述有源层(130)上形成刻蚀阻挡层(140)；
形成贯穿所述刻蚀阻挡层(140)的第一过孔(10)和第二过孔(20)和形成贯穿所述刻蚀阻挡层(140)和所述第一绝缘层(120)的第五过孔(50)；
在所述刻蚀阻挡层(140)上形成第二导电层(150)，所述第二导电层(150)的第一部分(151)和第二部分(152)分别通过所述第一过孔(10)和第二过孔(20)与所述有源层(130)电连接，所述第二导电层(150)的第一部分(151)和第二部分(152)中的一个通过所述第五过孔(50)与所述第一导电层(110)电连接。
9.根据权利要求8所述的方法，其特征在于：还包括：
在所述第二导电层(150)上形成第二绝缘层(160)；
形成贯穿所述第二绝缘层(160)的第三过孔(30)和第四过孔(40)；和
在所述第二绝缘层(160)上形成第三导电层(170)，所述第三导电层(170)分别通过所述第三过孔(30)和第四过孔(40)与所述第二导电层(150)的第一部分(151)和第二部分(152)电连接。
10.根据权利要求8所述的方法，其特征在于：
所述第二导电层(150)的第一部分(151)和第二部分(152)通过一次构图工艺一次性地形成在所述刻蚀阻挡层(140)上。
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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105607366B (zh) 2016-01-05 2019-03-05 京东方科技集团股份有限公司 防静电器件及其制造方法、基板
CN106876416B (zh) * 2017-03-30 2020-02-11 合肥鑫晟光电科技有限公司 静电放电单元、阵列基板和显示面板
CN107329338B (zh) * 2017-08-11 2020-11-10 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示面板、显示装置
CN108490707B (zh) * 2018-03-23 2020-09-04 武汉华星光电技术有限公司 阵列基板及显示面板
US10901280B2 (en) 2018-03-23 2021-01-26 Wuhan China Star Optoelectronics Technology Co., Ltd. Array substrate and display panel
CN108389643B (zh) * 2018-04-24 2023-10-24 京东方科技集团股份有限公司 间接式的平板探测器及制作方法
CN109727973B (zh) * 2019-01-02 2021-04-23 合肥鑫晟光电科技有限公司 阵列基板的制备方法、阵列基板
US11036322B2 (en) * 2019-06-24 2021-06-15 Wuhan China Star Optoelectronics Technology Co., Ltd Array substrate and method of manufacturing same
CN111171746B (zh) * 2020-01-03 2022-02-08 京东方科技集团股份有限公司 防静电散热胶带及其制备方法和显示装置及其制备方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4928161A (en) * 1986-07-11 1990-05-22 Fuji Xerox Co., Ltd. Thin-film transistor and wiring matrix device and its forming method
CN1656617A (zh) * 2002-05-22 2005-08-17 夏普株式会社 半导体装置及采用其的显示装置
CN103715267A (zh) * 2013-12-30 2014-04-09 京东方科技集团股份有限公司 薄膜晶体管、tft阵列基板及其制造方法和显示装置
CN103928469A (zh) * 2013-04-23 2014-07-16 上海天马微电子有限公司 一种tft阵列基板及其制造方法、显示面板
CN103943632A (zh) * 2013-12-31 2014-07-23 上海天马微电子有限公司 一种阵列基板及其制备方法、液晶显示器
CN104617110A (zh) * 2015-02-02 2015-05-13 京东方科技集团股份有限公司 一种基板及其制作方法、显示装置
CN104681630A (zh) * 2015-03-24 2015-06-03 京东方科技集团股份有限公司 薄膜晶体管及其制备方法、阵列基板和显示面板
CN104716196A (zh) * 2015-03-18 2015-06-17 京东方科技集团股份有限公司 薄膜晶体管及其制作方法、阵列基板及显示装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100255591B1 (ko) * 1997-03-06 2000-05-01 구본준 박막 트랜지스터 어레이의 배선 연결 구조 및 그 제조 방법
JP4646420B2 (ja) * 2001-02-28 2011-03-09 三菱電機株式会社 薄膜トランジスタアレイ基板およびそれを用いた表示装置
CN105607366B (zh) * 2016-01-05 2019-03-05 京东方科技集团股份有限公司 防静电器件及其制造方法、基板

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4928161A (en) * 1986-07-11 1990-05-22 Fuji Xerox Co., Ltd. Thin-film transistor and wiring matrix device and its forming method
CN1656617A (zh) * 2002-05-22 2005-08-17 夏普株式会社 半导体装置及采用其的显示装置
CN103928469A (zh) * 2013-04-23 2014-07-16 上海天马微电子有限公司 一种tft阵列基板及其制造方法、显示面板
CN103715267A (zh) * 2013-12-30 2014-04-09 京东方科技集团股份有限公司 薄膜晶体管、tft阵列基板及其制造方法和显示装置
CN103943632A (zh) * 2013-12-31 2014-07-23 上海天马微电子有限公司 一种阵列基板及其制备方法、液晶显示器
CN104617110A (zh) * 2015-02-02 2015-05-13 京东方科技集团股份有限公司 一种基板及其制作方法、显示装置
CN104716196A (zh) * 2015-03-18 2015-06-17 京东方科技集团股份有限公司 薄膜晶体管及其制作方法、阵列基板及显示装置
CN104681630A (zh) * 2015-03-24 2015-06-03 京东方科技集团股份有限公司 薄膜晶体管及其制备方法、阵列基板和显示面板

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