CN105552873A - Surge protection device - Google Patents
Surge protection device Download PDFInfo
- Publication number
- CN105552873A CN105552873A CN201610009821.0A CN201610009821A CN105552873A CN 105552873 A CN105552873 A CN 105552873A CN 201610009821 A CN201610009821 A CN 201610009821A CN 105552873 A CN105552873 A CN 105552873A
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- CN
- China
- Prior art keywords
- well layer
- surge
- back side
- dark
- protective device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 238000002347 injection Methods 0.000 claims abstract description 23
- 239000007924 injection Substances 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 230000001681 protective effect Effects 0.000 claims description 40
- 230000001052 transient effect Effects 0.000 abstract description 2
- 230000010354 integration Effects 0.000 abstract 1
- 230000015556 catabolic process Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 2
- 238000012423 maintenance Methods 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000002910 structure generation Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/87—Thyristor diodes, e.g. Shockley diodes, break-over diodes
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
Abstract
The invention provides a surge protection device. The surge protection device comprise an N type substrate, wherein a back surface P well layer is arranged on the whole back surface of the N type substrate; a front surface P well layer is arranged on the front surface of the N type substrate; and an N+ injection region is arranged on one side of the front surface P well layer. According to the surge protection device, a TVS (transient voltage suppressor) and a TSS (thyristor surge suppressor) are integrated together; when the surge protection device is subjected to forward surge, the device shows the TVS characteristic; when the surge protection device is subjected to negative surge, the device shows the TSS characteristics; therefore, the condition that one TVS and one TSS are required to be connected in series in applications can be completely avoided; and in addition, the surge protection device is high in integration degree, relatively low in product cost, convenient to connect an external circuit, simple and convenient to apply.
Description
Technical field
The present invention relates to overvoltage protection product scope, particularly relate to a kind of surge protective device.
Background technology
At present, it is that (English is translated into TRANSIENTVOLTAGESUPPRESSOR to Transient Suppression Diode that semiconductor device usually used as surge protective device use mainly contains following two kinds: one, be called for short TVS), TVS is a kind of voltage clamp bit-type protection device, when the voltage at its two ends exceedes reverse breakdown voltage, TVS becomes low resistance state from high-impedance state rapidly, by voltage stabilization at clamp voltage, thus protects other electronic devices in parallel with it; Two is that (English is translated into THYRISTORSURGESUPPRESSOR to semiconductor discharge tube; be called for short TSS); TSS is a kind of voltage switch type protection device; when the voltage at its two ends exceedes reverse breakdown voltage; TSS becomes low resistance state from high-impedance state rapidly; by voltage drop to almost nil, thus protect other electronic devices in parallel with it.
At concrete application scenarios, need the service behaviour according to protected electronic device, select suitable surge protective device.Such as, both may be that forward also may for reverse in surge voltage, need unidirectional TVS and TSS to be together in series use, when standing forward surge, surge voltage be clamped within the scope of the normal working voltage of protected electronic device by unidirectional TVS; When standing reverse surge, surge voltage is released into close to short circuit by TSS, protected electronic device is unlikely and bears excessive reverse voltage and damage.And simultaneously, in order to make circuit more simplify with integrated, way general is at present: will manual the gathering into folds of the wafer of unidirectional TVS and the TSS be together in series be needed to encapsulate, this package structure be complicated, and cost is high.
Summary of the invention
The object of the present invention is to provide a kind of surge protective device, can either provide forward carrying out surge protection and reverse surge protection for circuit, and integrated level is higher, structure is simple, with low cost.
In view of this, embodiments provide a kind of surge protective device, comprising:
N-type substrate, the whole back side of described N-type substrate is provided with back side P well layer, and the front of described N-type substrate is provided with front P well layer, and the side of described front P well layer is provided with N+ injection region.
Further, described front P well layer is the shallow P well layer of front dark P well layer and front laying respectively at both sides, and the shallow P well layer in described front is arranged on that side being provided with N+ injection region.
Further, the dark N trap in front is provided with below the shallow P in described front well layer.
Further, described back side P well layer is the shallow P well layer of the back side dark P well layer and the back side laying respectively at both sides, and the dark P well layer in the described back side is arranged on that side being provided with N+ injection region.
Further, the described back side shallow P well layer is provided with the dark N trap in the back side.
Further, the dark P in described back side well layer is provided with multiple dark P trap separated.
Further, described N+ injection region is provided with multiple.
Further, be provided with short circuit hole between described multiple N+ injection region, described short circuit hole impedance is large.
Surge protective device of the present invention is owing to being integrated together TVS, TSS, and it shows as TVS characteristic when standing forward surge; When being subjected to negative sense surge, show as TSS characteristic, completely solve in application the problem needing to use with an a TVS and TSS series connection.And this surge protective device integrated level is high, product cost is lower, conveniently connects external circuit, it is easy to apply.
Accompanying drawing explanation
In order to make content of the present invention be more likely to be clearly understood, below according to a particular embodiment of the invention and by reference to the accompanying drawings, the present invention is further detailed explanation, wherein
Fig. 1 is the generalized section of the surge protective device that the embodiment of the present invention one provides;
Fig. 2 is the equivalent circuit diagram of the surge protective device that the embodiment of the present invention provides;
Fig. 3 is the generalized section of the surge protective device that the embodiment of the present invention two provides;
Fig. 4 is the generalized section of the surge protective device that the embodiment of the present invention three provides;
Fig. 5 is the generalized section of the surge protective device that the embodiment of the present invention four provides;
Fig. 6 is the generalized section of the surge protective device that the embodiment of the present invention five provides.
Embodiment
Below with reference to accompanying drawing, following examples are used to be further elaborated the present invention.
Refer to Fig. 1, Fig. 1 is the generalized section of the surge protective device that the embodiment of the present invention one provides.As shown in Figure 1, the surge protective device 1 of the present embodiment comprises: the metal level 11 of external wire, N-type substrate, and the whole back side of described N-type substrate is provided with back side P well layer, the front of described N-type substrate is provided with front P well layer, and the side of described front P well layer is provided with N+ injection region.
Preferably, described N+ injection region is provided with multiple, is used for the maintenance electric current of adjusting means and ME for maintenance.In another preferred embodiment, be provided with short circuit hole 12 between described multiple N+ injection region, the impedance of described short circuit hole 12 is large.Described short circuit hole is used for improving the antijamming capability of this device.Because device area is excessive, if do not have short circuit hole, device there will be current convergence in certain part, and another part does not have electric current to pass through, and can have a negative impact to the performance of device yet.
Incorporated by reference to consulting Fig. 2, Fig. 2 is the equivalent circuit diagram of the surge protective device that the embodiment of the present invention provides, and describes the course of work of surge protective device provided by the invention below with reference to Fig. 1 and Fig. 2:
1, when device is subject to forward surge impact, the reverse PN junction generation avalanche breakdown that N-type substrate-back side P trap is formed, thus surge current of releasing.Meanwhile, the structure on the right of device is N+ injection-front P trap-N-type substrate-back side P trap, due to withstand voltage height, can not open.So when forward surge comes interim, surge is released by the front P trap-N-type substrate-back side P well area on the device left side.Now, what this device showed is TVS performance.After surge terminates, device turns off at once, there will not be the problem of afterflow.
2, when device is subject to negative sense surge impact, due to the withstand voltage height of backward diode that N+ injection-front P trap is formed, and the backward diode that N-type substrate-front P trap is formed is resistance to forces down, so N-type substrate-front P trap generation avalanche breakdown, punctures rear leakage current and form pressure drop by short circuit hole.When this pressure drop is greater than the forward voltage drop of front P trap-N+ injection, back side P trap-N-type substrate-front P trap-N+ injects the PNPN structure generation positive feedback formed.After surge passes through, because back side P trap is connected on electronegative potential, device turns off at once, also there will not be the problem of afterflow.
Visible by foregoing description, the operating circuit of this device is just equivalent to the circuit of TVS and TSS parallel connection in Fig. 2.
The present embodiment has the following advantages:
Surge protective device of the present invention is owing to being integrated together TVS, TSS, and it shows as TVS characteristic when standing forward surge; When being subjected to negative sense surge, show as TSS characteristic, completely solve in application the problem needing to use with an a TVS and TSS series connection.And this surge protective device integrated level is high, product cost is lower, conveniently connects external circuit, it is easy to apply.
Refer to Fig. 3, Fig. 3 is the generalized section of the surge protective device that the embodiment of the present invention two provides.As shown in Figure 3, the surge protective device of the present embodiment comprises: N-type substrate, the whole back side of described N-type substrate is provided with back side P well layer, the front of described N-type substrate is provided with front P well layer, described front P well layer is the shallow P well layer of front dark P well layer and front laying respectively at both sides, and the shallow P well layer in described front is arranged on that side being provided with N+ injection region.
The embodiment one that the present embodiment is corresponding with Fig. 1 has following difference: front P well layer is the shallow P well layer of front dark P well layer and front laying respectively at both sides, and the shallow P well layer in described front is arranged on that side being provided with N+ injection region.Remaining part is all identical with embodiment one, repeats no more herein.Its advantage is:
1, when device is subject to forward surge impact, the reverse PN junction generation avalanche breakdown that N-type substrate-back side P trap is formed, thus surge current of releasing.The audion that the dark P in front trap-N-type substrate-back side P trap is formed has less negative resistance charactertistic, can effectively reduce residual voltage and improve surge ability.Meanwhile, the structure on the right of device is the shallow P trap-N-type substrate-back side P trap in N+ injection-front, due to withstand voltage height, can not open.So when forward surge comes interim, surge is released by the dark P trap-N-type substrate-back side P well area in the front on the device left side.Now, what this device showed is TVS performance.After surge terminates, device turns off at once, there will not be the problem of afterflow.
2, when device is subject to negative sense surge impact, due to the withstand voltage height of backward diode that N+ injection-front dark P trap is formed, and the backward diode that N-type substrate-front shallow P trap is formed resistance toly forces down, so the shallow P trap generation avalanche breakdown of N-type substrate-front, puncture rear leakage current and form pressure drop by short circuit hole.When this pressure drop is greater than the forward voltage drop of front shallow P trap-N+ injection, back side P trap-N-type substrate-front shallow P trap-N+ injects the PNPN structure generation positive feedback formed.After surge passes through, because back side P trap is connected on electronegative potential, device turns off at once, also there will not be the problem of afterflow.
The present embodiment has the following advantages:
Surge protective device of the present invention is owing to being integrated together TVS, TSS, and it shows as TVS characteristic when standing forward surge; When being subjected to negative sense surge, show as TSS characteristic, completely solve in application the problem needing to use with an a TVS and TSS series connection.And this surge protective device integrated level is high, product cost is lower, conveniently connects external circuit, it is easy to apply.
Refer to Fig. 4, Fig. 4 is the generalized section of the surge protective device that the embodiment of the present invention three provides.As shown in Figure 4, the surge protective device of the present embodiment comprises: N-type substrate, the whole back side of described N-type substrate is provided with back side P well layer, the front of described N-type substrate is provided with front P well layer, the right side of described front P well layer is provided with N+ injection region, described back side P well layer is the shallow P well layer of the back side dark P well layer and the back side laying respectively at both sides, and the dark P well layer in the described back side is arranged on that side being provided with N+ injection region.
The embodiment one that the present embodiment is corresponding with Fig. 1 has following difference: described back side P well layer is the shallow P well layer of the back side dark P well layer and the back side laying respectively at both sides, and the dark P well layer in the described back side is arranged on that side being provided with N+ injection region.Remaining part is all identical with embodiment one, repeats no more herein.Its advantage is, when device be subject to reverse surge impact time, the dark P well layer in the back side the surge ability that can improve device is set, and reduce residual voltage.
In another preferred embodiment four, incorporated by reference to reference to figure 5, the described back side dark P well layer is provided with multiple dark P trap separated.Its advantage is: the junction area increasing the dark P trap-N-type substrate in the back side, improves the reverse surge relieving capacity of device further.
Its course of work is identical with embodiment described in Fig. 1, repeats no more herein.
The present embodiment has the following advantages:
Surge protective device of the present invention is owing to being integrated together TVS, TSS, and it shows as TVS characteristic when standing forward surge; When being subjected to negative sense surge, show as TSS characteristic, completely solve in application the problem needing to use with an a TVS and TSS series connection.And this surge protective device integrated level is high, product cost is lower, conveniently connects external circuit, it is easy to apply.
Refer to Fig. 6, Fig. 6 is the generalized section of the surge protective device that the embodiment of the present invention five provides.As shown in Figure 5, the surge protective device of the present embodiment comprises: N-type substrate, the whole back side of described N-type substrate is provided with the shallow P well layer of the back side laying respectively at both sides dark P well layer and the back side, the dark P well layer in the described back side is arranged on that side being provided with N+ injection region, described N-type substrate front is provided with the shallow P well layer of the front laying respectively at both sides dark P well layer and front, the shallow P well layer in described front is provided with N+ injection region, be provided with the dark N trap in front below the shallow P well layer of described front, the described back side shallow P well layer is provided with the dark N trap in the back side.
The embodiment three that the present embodiment is corresponding with Fig. 4 has following difference: be provided with the dark N trap in front below the shallow P well layer of described front, and the described back side shallow P well layer is provided with the dark N trap in the back side.Remaining part is all identical with embodiment three, repeats no more herein.Its advantage is, can by regulating the dark N trap in described front, and adjusting means stands puncture voltage when oppositely surging; Can by regulating the dark N trap in the described back side, adjusting means stands puncture voltage when forward is surged, and improves the forward surge ability of device further simultaneously, and reduces residual voltage.
Its course of work is identical with embodiment described in Fig. 1, repeats no more herein.
The present embodiment has the following advantages:
Surge protective device of the present invention is owing to being integrated together TVS, TSS, and it shows as TVS characteristic when standing forward surge; When being subjected to negative sense surge, show as TSS characteristic, completely solve in application the problem needing to use with an a TVS and TSS series connection.And this surge protective device integrated level is high, product cost is lower, conveniently connects external circuit, it is easy to apply.
Obviously, above-described embodiment is only for clearly example being described, and the restriction not to execution mode.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here exhaustive without the need to also giving all execution modes.And thus the apparent change of extending out or variation be still among the protection range of the invention.
Claims (8)
1. a surge protective device, is characterized in that, comprising:
N-type substrate, the whole back side of described N-type substrate is provided with back side P well layer, and the front of described N-type substrate is provided with front P well layer, and the side of described front P well layer is provided with N+ injection region.
2. surge protective device according to claim 1, is characterized in that:
Described front P well layer is the shallow P well layer of front dark P well layer and front laying respectively at both sides, and the shallow P well layer in described front is arranged on that side being provided with N+ injection region.
3. surge protective device according to claim 2, is characterized in that:
The dark N trap in front is provided with below the shallow P well layer of described front.
4. surge protective device according to claim 1, is characterized in that:
Described back side P well layer is the shallow P well layer of the back side dark P well layer and the back side laying respectively at both sides, and the dark P well layer in the described back side is arranged on that side being provided with N+ injection region.
5. surge protective device according to claim 4, is characterized in that:
The described back side shallow P well layer is provided with the dark N trap in the back side.
6. surge protective device according to claim 4, is characterized in that:
The described back side dark P well layer is provided with multiple dark P trap separated.
7. surge protective device according to claim 1, is characterized in that:
Described N+ injection region is provided with multiple.
8. surge protective device according to claim 7, is characterized in that:
Be provided with short circuit hole between described multiple N+ injection region, described short circuit hole impedance is large.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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CN201610009821.0A CN105552873B (en) | 2016-01-05 | 2016-01-05 | Surge protection device |
PCT/CN2016/095630 WO2017118028A1 (en) | 2016-01-05 | 2016-08-17 | Surge protector device |
Applications Claiming Priority (1)
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CN201610009821.0A CN105552873B (en) | 2016-01-05 | 2016-01-05 | Surge protection device |
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CN105552873A true CN105552873A (en) | 2016-05-04 |
CN105552873B CN105552873B (en) | 2024-03-29 |
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CN201610009821.0A Active CN105552873B (en) | 2016-01-05 | 2016-01-05 | Surge protection device |
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WO (1) | WO2017118028A1 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2017118028A1 (en) * | 2016-01-05 | 2017-07-13 | 深圳市槟城电子有限公司 | Surge protector device |
WO2018113583A1 (en) * | 2016-12-19 | 2018-06-28 | 东莞市阿甘半导体有限公司 | Unidirectional tvs structure and manufacturing method therefor |
CN108428697A (en) * | 2017-11-09 | 2018-08-21 | 上海长园维安微电子有限公司 | A kind of low-capacitance bidirectional band negative resistance TVS device |
CN117116936A (en) * | 2023-09-25 | 2023-11-24 | 深圳长晶微电子有限公司 | Unidirectional surge protection device and manufacturing method thereof |
CN117116936B (en) * | 2023-09-25 | 2024-04-26 | 深圳长晶微电子有限公司 | Unidirectional surge protection device and manufacturing method thereof |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN108922885A (en) * | 2018-08-06 | 2018-11-30 | 上海长园维安微电子有限公司 | A kind of high-power unidirectional TVS device |
CN110459593A (en) * | 2019-08-01 | 2019-11-15 | 富芯微电子有限公司 | A kind of unidirectional TVS device of low clamp voltage and its manufacturing method |
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CN108428697A (en) * | 2017-11-09 | 2018-08-21 | 上海长园维安微电子有限公司 | A kind of low-capacitance bidirectional band negative resistance TVS device |
CN117116936A (en) * | 2023-09-25 | 2023-11-24 | 深圳长晶微电子有限公司 | Unidirectional surge protection device and manufacturing method thereof |
CN117116936B (en) * | 2023-09-25 | 2024-04-26 | 深圳长晶微电子有限公司 | Unidirectional surge protection device and manufacturing method thereof |
Also Published As
Publication number | Publication date |
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WO2017118028A1 (en) | 2017-07-13 |
CN105552873B (en) | 2024-03-29 |
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