CN113380786B - Thyristor transient voltage suppression protection device structure integrated with reverse conducting diode - Google Patents
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- 239000000758 substrate Substances 0.000 claims abstract description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
- H01L27/0262—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
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Abstract
The invention provides a thyristor transient voltage suppression protection device structure integrated with a reverse conducting diode, which comprises: a P-type substrate on which an N-type epitaxy is grown; an N-type well region is manufactured on the left side above the N-type epitaxy, and a P-type well region is manufactured on the right side of the N-type well region and is tangent to the N-type well region; a first N + region and a first P + region tangent to the right side of the first N + region are formed on the inner surface of the N-type well region; a second N + region and a second P + region tangent to the right side of the second N + region are formed on the inner surface of the P-type well region; a third N + region for low-voltage triggering is manufactured across the junction of the N-type well region and the P-type well region and is used for forming a triggering region; a reverse conducting diode is connected between the third N + region and the first P + region in the N-type well region by a lead; the anode of the reverse conducting diode is connected with the third N + region for low-voltage triggering, and the cathode of the reverse conducting diode is connected with the first P + region in the N-type well region; the invention can not influence the forward capacitance of SCR, but also can greatly reduce the resistance of reverse conducting diode.
Description
Technical Field
The invention relates to the technical field of semiconductors, which is mainly used for electrostatic Discharge (ESD) and surge over-current stress (EOS) protection, in particular to a Transient Voltage Suppression (TVS) structure of an SCR (silicon controlled rectifier) Transient Voltage Suppressor integrated with a reverse conducting diode.
Background
Electrostatic discharge (ESD) is ubiquitous in the processes of manufacturing, packaging, testing and using chips, accumulated static charges are released in a nanosecond-microsecond time by a current of several amperes or dozens of amperes, instantaneous power is up to dozens or hundreds of watts, and the destruction strength of the ESD (electrostatic discharge) to the chips in a circuit system is very high. Statistically, more than 35% of chip failures are due to ESD damage. Therefore, in the design of chips or systems, the design of the esd protection module is directly related to the functional stability of the circuit system and the system reliability, and is very important for electronic products. TVSs are core devices for system-level ESD/EOS protection, the performance of which is critical to the reliability of an electronic system.
However, for the unidirectional array TVS protection circuit, in addition to the ESD/EOS protection in the positive direction, the negative pulse test is required, and the unidirectional SCR, due to its structural feature (as shown in fig. 1), has a very large resistance due to the long neutral region (the long distance from the cathode P + to the anode N +) of the parasitic reverse conducting diode in the body. A large residual voltage is generated during the negative ESD/EOS test, which greatly affects the protection capability of the device. And the mode of the parallelly connected reverse conducting diode of break-over can make SCR forward capacitance greatly increased, can't satisfy the small signal loss requirement, consequently this application provides a novel SCR TVS structure that neither influences forward capacitance can optimize the reverse conducting ability again greatly.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provide a thyristor transient voltage suppression protection device structure integrated with a reverse conducting diode, which does not influence the forward capacitance of the SCR and can greatly reduce the resistance of the reverse conducting diode. In order to achieve the technical purpose, the embodiment of the invention adopts the technical scheme that:
the first embodiment;
a SCR transient voltage suppression protection device structure of an integrated reverse conducting diode comprises: a P-type substrate on which an N-type epitaxy is grown; an N-type well region is manufactured on the left side above the N-type epitaxy, and a P-type well region is manufactured on the right side of the N-type well region and is tangent to the N-type well region; a first N + region and a first P + region tangent to the right side of the first N + region are formed on the inner surface of the N-type well region; a second N + region and a second P + region tangent to the right side of the second N + region are formed on the inner surface of the P-type well region; a third N + region for low-voltage triggering is manufactured across the junction of the N-type well region and the P-type well region and is used for forming a triggering region;
a reverse conducting diode is connected between the third N + region and the first P + region in the N-type well region by a lead; the anode of the reverse conducting diode is connected with the third N + region for low-voltage triggering, and the cathode of the reverse conducting diode is connected with the first P + region in the N-type well region;
the first N + region and the first P + region in the N-type well region are connected to serve as a device anode A, and the second N + region and the second P + region in the P-type well region are connected to serve as a device cathode K.
Further, the withstand voltage of the reverse conducting diode is larger than the highest clamping voltage of the SCR structure.
Example two;
a SCR transient voltage suppression protection device structure of an integrated reverse conducting diode comprises: a P-type substrate on which an N-type epitaxy is grown; an N-type well region is manufactured on the left side above the N-type epitaxy, and a P-type well region is manufactured on the right side of the N-type well region and is tangent to the N-type well region; a first N + region and a first P + region tangent to the right side of the first N + region are formed on the inner surface of the N-type well region; a second N + region and a second P + region tangent to the right side of the second N + region are formed on the inner surface of the P-type well region; a third N + region for low-voltage triggering is manufactured across the junction of the N-type well region and the P-type well region and is used for forming a triggering region;
a reverse conducting diode is connected between the third N + region and the second N + region in the P-type well region by a lead; the anode of the reverse conducting diode is connected with a second N + region in the P-type well region, and the cathode of the reverse conducting diode is connected with a third N + region for low-voltage triggering;
the first N + region and the first P + region in the N-type well region are connected to serve as a device anode A, and the second N + region and the second P + region in the P-type well region are connected to serve as a device cathode K.
The technical scheme provided by the embodiment of the invention has the following beneficial effects: the SCR transient voltage suppression protection device integrated with the reverse conducting diode can realize low reverse path resistance through the externally connected reverse conducting diode; for the structure shown in fig. 1, the body diode resistance is the sum of the resistances of the entire N-well region and P-well region, and since the doping cannot be too high, the resistance is extremely large; the structure of the present application includes, as in the first embodiment, a reverse resistor that includes a P-type well resistor and a reverse diode resistor, and since the reverse diode is connected to a middle trigger region, the input capacitance of the device is not affected, and therefore the reverse resistor can be designed to have any aspect ratio, and therefore the reverse diode resistor can be freely designed without much consideration, so that the structure of the present application can achieve a reverse parasitic resistance lower than that of a conventional device, and has a disadvantage that the reverse path turn-on voltage of the SCR structure will increase from 0.7V to about 1.4V, but for general applications, the change of the turn-on voltage can be accepted.
Drawings
Fig. 1 is a schematic diagram of a device structure in the prior art.
Fig. 2 is a schematic structural diagram of a device in the first embodiment of the present invention.
Fig. 3 is a schematic structural diagram of a device in the second embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The first embodiment; as shown in fig. 2;
the thyristor transient voltage suppression protection device structure integrated with the reverse conducting diode provided by the embodiment comprises: a P-type substrate 1, wherein an N-type epitaxy 2 grows on the P-type substrate 1; an N-type well region 3 is manufactured on the left side above the N-type epitaxy 2, and a P-type well region 4 is manufactured on the right side of the N-type well region 3 in a tangent mode; a first N + region 501 and a first P + region 601 tangent to the right side of the first N + region 501 are formed on the inner surface of the N-type well region 3; a second N + region 502 and a second P + region 602 tangent to the right side of the second N + region 502 are formed on the inner surface of the P-well region 4; a third N + region 503 for low voltage triggering is manufactured across the junction of the N-type well region 3 and the P-type well region 4 to form a triggering region; the trigger region is here for the purpose of reducing the trigger voltage of the device to meet low voltage applications;
a reverse conducting diode 7 is connected between the third N + region 503 and the first P + region 601 in the N-type well region 3 by a lead; the anode of the reverse conducting diode 7 is connected with the third N + region 503 for low-voltage triggering, and the cathode is connected with the first P + region 601 in the N-type well region 3; the withstand voltage of the reverse conducting diode 7 is set according to the highest clamping voltage of the whole SCR structure, and the forward discharging function can be ensured only by enabling the withstand voltage to be larger than the highest clamping voltage of the SCR structure;
a first N + region 501 and a first P + region 601 in the N-type well region 3 are connected to serve as a device anode A, and a second N + region 502 and a second P + region 602 in the P-type well region 4 are connected to serve as a device cathode K;
the working principle is that when the SCR capacitance is tested in the forward direction, as the first N + region 501 made on the inner surface of the N-type well region 3 is respectively short-circuited with the first P + region 601 made on the inner surface of the N-type well region 3 and the cathode of the reverse conducting diode 7, the total capacitance of the device is constantly the junction capacitance of the N-type well region 3 and the P-type well region 4, and therefore the parasitic capacitance of the reverse conducting diode 7 cannot cause the change of the total capacitance; when the SCR is started in the forward direction by high voltage, the SCR structure of the application can be started smoothly like the traditional SCR structure due to higher withstand voltage of the reverse conducting diode 7, so that a forward ESD path can be ensured; when a negative voltage appears at the anode a, the current enters the second P + region 602 in the P-well region 4 through the cathode K, passes through the P-well region 4, passes through the third N + region 503 in the middle, and then flows into the anode a through the reverse conducting diode 7, if the width-length ratio of the reverse conducting diode 7 is large, for example, 20: 1-50: 1, the resistance of this path will be much lower than the conventional device body diode resistance;
in the embodiment, a reverse freewheeling high-voltage diode is connected between the anode and the trigger region, the diode does not cause the increase of the positive parasitic capacitance of a Silicon Controlled Rectifier (SCR) and does not influence the positive trigger characteristic, and can provide a shorter negative current path and a lower dynamic resistance for the negative ESD/EOS pulse.
Example two, as shown in fig. 3;
the thyristor transient voltage suppression protection device structure integrated with the reverse conducting diode provided by the embodiment comprises: a P-type substrate 1, wherein an N-type epitaxy 2 grows on the P-type substrate 1; an N-type well region 3 is manufactured on the left side above the N-type epitaxy 2, and a P-type well region 4 is manufactured on the right side of the N-type well region 3 in a tangent mode; a first N + region 501 and a first P + region 601 tangent to the right side of the first N + region 501 are formed on the inner surface of the N-type well region 3; a second N + region 502 and a second P + region 602 tangent to the right side of the second N + region 502 are formed on the inner surface of the P-well region 4; a third N + region 503 for low voltage triggering is manufactured across the junction of the N-type well region 3 and the P-type well region 4 to form a triggering region; the trigger region is here for the purpose of reducing the trigger voltage of the device to meet low voltage applications;
a reverse conducting diode 7 is connected between the third N + region 503 and the second N + region 502 in the P-type well region 4 by a lead; the anode of the reverse conducting diode 7 is connected with the second N + region 502 in the P-type well region 4, and the cathode is connected with the third N + region 503 for low-voltage triggering; the withstand voltage of the reverse conducting diode 7 is set according to the highest clamping voltage of the whole SCR structure, and the forward discharging function can be ensured only by enabling the withstand voltage to be larger than the highest clamping voltage of the SCR structure;
a first N + region 501 and a first P + region 601 in the N-type well region 3 are connected to serve as a device anode A, and a second N + region 502 and a second P + region 602 in the P-type well region 4 are connected to serve as a device cathode K;
the working principle is that when the SCR capacitance is tested in the forward direction, because the second P + region 602 manufactured on the inner surface of the P-type well region 4 is respectively short-circuited with the second N + region 502 manufactured on the inner surface of the P-type well region 4 and the anode of the reverse conducting diode 7, the total capacitance of the device is constantly the junction capacitance of the N-type well region 3 and the P-type well region 4, and therefore the parasitic capacitance of the reverse conducting diode 7 cannot cause the change of the total capacitance; when the SCR is started in the forward direction under high voltage, the SCR structure can be smoothly started like the traditional SCR structure due to the fact that the withstand voltage of the reverse conducting diode 7 can be designed to be high, and therefore the forward ESD function can be guaranteed; when a negative voltage appears at the anode a, the current will enter the reverse conducting diode 7 through the cathode K, flow into the N-type well 3 through the third N + region 503 in the middle, and finally flow into the anode a, if the width-to-length ratio of the reverse conducting diode 7 is large, for example, 20: 1-50: 1, the resistance of this path will be much lower than the conventional device body diode resistance.
To sum up, the core idea of the SCR TVS structure for reducing reverse path resistance proposed in the present application is to introduce a reverse conducting diode that does not affect the overall parasitic capacitance of the SCR, and design the reverse conducting diode to appropriate parameters (such as a withstand voltage higher than the highest clamping voltage, a large width-to-length ratio, a compact layout, etc.), so as to greatly reduce the dynamic resistance of the TVS when discharging the negative ESD/EOS, thereby achieving better negative ESD/EOS performance, and the positive performance is not affected at all.
Finally, it should be noted that the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting, and although the present invention has been described in detail with reference to examples, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, which should be covered by the claims of the present invention.
Claims (2)
1. The utility model provides an integrated reverse conducting diode's silicon controlled rectifier transient voltage restraines protection device structure which characterized in that includes: a P-type substrate (1), wherein an N-type epitaxy (2) grows on the P-type substrate (1); an N-type well region (3) is manufactured on the left side above the N-type epitaxy (2), and a P-type well region (4) is manufactured on the right side of the N-type well region (3) in a tangent mode; a first N + region (501) and a first P + region (601) tangent to the right side of the first N + region (501) are formed on the inner surface of the N-type well region (3); a second N + region (502) and a second P + region (602) tangent to the right side of the second N + region (502) are formed on the inner surface of the P-type well region (4); a third N + region (503) for low-voltage triggering is manufactured across the junction of the N-type well region (3) and the P-type well region (4) and is used for forming a triggering region;
a reverse conducting diode (7) is connected between the third N + region (503) and the first P + region (601) in the N-type well region (3) by a lead; the anode of the reverse conducting diode (7) is connected with a third N + region (503) for low-voltage triggering, and the cathode of the reverse conducting diode is connected with a first P + region (601) in the N-type well region (3);
a first N + region (501) and a first P + region (601) in the N-type well region (3) are connected to serve as a device anode A, and a second N + region (502) and a second P + region (602) in the P-type well region (4) are connected to serve as a device cathode K;
the withstand voltage of the reverse conducting diode (7) is greater than the highest clamping voltage of the SCR structure;
the width-length ratio of the reverse conducting diode (7) is designed to be 20: 1-50: 1.
2. the utility model provides an integrated reverse conducting diode's silicon controlled rectifier transient voltage restraines protection device structure which characterized in that includes: a P-type substrate (1), wherein an N-type epitaxy (2) grows on the P-type substrate (1); an N-type well region (3) is manufactured on the left side above the N-type epitaxy (2), and a P-type well region (4) is manufactured on the right side of the N-type well region (3) in a tangent mode; a first N + region (501) and a first P + region (601) tangent to the right side of the first N + region (501) are formed on the inner surface of the N-type well region (3); a second N + region (502) and a second P + region (602) tangent to the right side of the second N + region (502) are formed on the inner surface of the P-type well region (4); a third N + region (503) for low-voltage triggering is manufactured across the junction of the N-type well region (3) and the P-type well region (4) and is used for forming a triggering region;
a reverse conducting diode (7) is connected between the third N + region (503) and the second N + region (502) in the P-type well region (4) by a lead; the anode of the reverse conducting diode (7) is connected with a second N + region (502) in the P-type well region (4), and the cathode of the reverse conducting diode is connected with a third N + region (503) for low-voltage triggering;
a first N + region (501) and a first P + region (601) in the N-type well region (3) are connected to serve as a device anode A, and a second N + region (502) and a second P + region (602) in the P-type well region (4) are connected to serve as a device cathode K;
the withstand voltage of the reverse conducting diode (7) is greater than the highest clamping voltage of the SCR structure;
the width-length ratio of the reverse conducting diode (7) is designed to be 20: 1-50: 1.
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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EP0803955A3 (en) * | 1996-04-25 | 1998-05-20 | Texas Instruments Incorporated | An electrostatic discharge protection circuit |
CN102569360A (en) * | 2012-03-09 | 2012-07-11 | 浙江大学 | Bidirectional triode thyristor based on diode auxiliary triggering |
CN107017248A (en) * | 2017-03-14 | 2017-08-04 | 电子科技大学 | A kind of low trigger voltage SCR structure triggered based on floating trap |
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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EP0803955A3 (en) * | 1996-04-25 | 1998-05-20 | Texas Instruments Incorporated | An electrostatic discharge protection circuit |
CN102569360A (en) * | 2012-03-09 | 2012-07-11 | 浙江大学 | Bidirectional triode thyristor based on diode auxiliary triggering |
CN107017248A (en) * | 2017-03-14 | 2017-08-04 | 电子科技大学 | A kind of low trigger voltage SCR structure triggered based on floating trap |
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