CN113345887B - Electrostatic protection device - Google Patents
Electrostatic protection device Download PDFInfo
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- CN113345887B CN113345887B CN202110892121.1A CN202110892121A CN113345887B CN 113345887 B CN113345887 B CN 113345887B CN 202110892121 A CN202110892121 A CN 202110892121A CN 113345887 B CN113345887 B CN 113345887B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
- H01L27/0262—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
Abstract
The invention relates to the technical field of semiconductors, and particularly discloses an electrostatic protection device, which comprises: the device comprises a first conduction type substrate and a second conduction type epitaxial layer, wherein a second conduction type well region and a first conduction type well region are arranged in the second conduction type epitaxial layer, a first N + region and a first P + region are arranged in the second conduction type well region, a second N + region and a second P + region are arranged in the first conduction type well region, a third N + region is arranged at the tangent position of the second conduction type well region and the first conduction type well region, a Zener injection ZP region is arranged between the third N + region and the second N + region, the third N + region is in contact with a Zener injection ZP region, a Schottky injection P-type region is arranged between the Zener injection ZP region and the second N + region, and the Schottky injection P-type region is respectively arranged at intervals with the Zener injection ZP region and the second N + region. The electrostatic protection device provided by the invention can solve the problems of negative clamping voltage rise and over-slow response speed caused by minority carrier storage effect.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to an electrostatic protection device.
Background
Electrostatic discharge (ESD) is ubiquitous in the processes of manufacturing, packaging, testing and using of chips, accumulated Static charges are released in a nanosecond-microsecond time by a current of several amperes or dozens of amperes, instantaneous power is dozens or hundreds of watts, and the destroying strength of the chips in a circuit system is extremely high. Statistically, more than 35% of chip failures are due to ESD damage. Therefore, in the design of chips or systems, the design of the esd protection module is directly related to the functional stability of the circuit system and the system reliability, and is very important for electronic products. TVS is a core device for system level ESD protection, and its performance is critical to the reliability of electronic systems.
However, for a Silicon-Controlled Rectifier (S-CR) device, the negative ESD energy is discharged through the body parasitic diode, and thus the body diode performance determines the negative ESD capability of the device. However, according to the conventional S-CR structure shown in fig. 1, the internal parasitic diode is a conventional PN junction diode, and since the diode has minority carrier storage effect, if the voltage is rapidly converted to negative after the positive conduction, a large number of minority carriers stored in the corresponding area will seriously affect the release of negative ESD energy, and the ESD actual test waveform is the waveform of such rapid positive and negative alternation.
Therefore, how to solve the problem of negative clamp voltage rise caused by the minority carrier effect and the problem of too slow response speed becomes a technical problem to be solved by those skilled in the art.
Disclosure of Invention
The invention provides an electrostatic protection device, which solves the problems of negative clamping voltage rising caused by minority carrier storage effect and over-slow response speed in the related technology.
As an aspect of the present invention, there is provided an electrostatic protection device, including: the semiconductor device comprises a first conductive type substrate and a second conductive type epitaxial layer arranged on the first conductive type substrate, wherein a second conductive type well region and a first conductive type well region are arranged in the second conductive type epitaxial layer, the second conductive type well region is tangentially arranged with the first conductive type well region, a first N + region and a first P + region are arranged in the second conductive type well region, the first N + region and the first P + region are tangentially arranged, a second N + region and a second P + region are arranged in the first conductive type well region, the second N + region and the second P + region are tangentially arranged, a third N + region is arranged at the tangential position of the second conductive type well region and the first conductive type well region, a Zener injection ZP region is arranged between the third N + region and the second N + region, and the third N + region is contacted with the Zener injection ZP region, a Schottky injection P-type area is arranged between the Zener injection ZP area and the second N + area, and the Schottky injection P-type area is respectively arranged at intervals with the Zener injection ZP area and the second N + area.
Furthermore, the first N + region, the first P + region and the schottky injection P-type region are connected to serve as an anode of the electrostatic protection device, and the second N + region and the second P + region are connected to serve as a cathode of the electrostatic protection device.
Furthermore, the first N + region is connected with the first P + region and then serves as an anode of the electrostatic protection device, the second N + region is connected with the second P + region and then serves as a cathode of the electrostatic protection device, a schottky diode is arranged between the schottky injection P-type region and the anode of the electrostatic protection device, the anode of the schottky diode is connected with the schottky injection P-type region, and the cathode of the schottky diode is connected with the anode of the electrostatic protection device.
Furthermore, the first N + region is connected with the first P + region and then serves as an anode of the electrostatic protection device, the second N + region is connected with the second P + region and then serves as a cathode of the electrostatic protection device, a plurality of schottky diodes connected in series are arranged between the schottky injection P-type region and the anode of the electrostatic protection device, the anode of the schottky diodes connected in series is connected with the schottky injection P-type region, and the cathode of the schottky diodes connected in series is connected with the anode of the electrostatic protection device.
Further, a schottky injection N-type region is disposed between the first P + region and the third N + region, and the schottky injection N-type region is separately disposed from the first P + region and the third N + region.
Furthermore, the schottky injection N-type region is connected with the schottky injection P-type region to form two integrated schottky diodes, the first N + region is connected with the first P + region to serve as an anode of the electrostatic protection device, and the second N + region is connected with the second P + region to serve as a cathode of the electrostatic protection device.
Further, the third N + region is arranged tangentially to the zener-implanted ZP region.
Further, the third N + region intersects the zener-implanted ZP region.
Further, the first conductive type substrate comprises a P-type substrate, and the second conductive type epitaxial layer comprises an N-type epitaxial layer.
Further, the first conductivity type well region includes a P-type well region and the second conductivity type well region includes an N-type well region.
The electrostatic protection device provided by the invention can rapidly conduct the Schottky diode in the body when the ESD voltage is suddenly changed from positive to negative, so that the delay caused by the minority carrier storage effect of the traditional PN junction diode is greatly reduced, the electrostatic protection device has better protection capability on the oscillation type ESD pulse protection, and the negative performance of the electrostatic protection device is favorably improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention.
Fig. 1 is a schematic structural diagram of an electrostatic protection device in the prior art.
Fig. 2 is a schematic structural diagram of an embodiment of an electrostatic protection device provided in the present invention.
Fig. 3 is a schematic structural diagram of another embodiment of the electrostatic protection device provided by the present invention.
Fig. 4 is a schematic structural diagram of a third embodiment of the electrostatic protection device provided by the invention.
Detailed Description
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict. The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings.
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged under appropriate circumstances in order to facilitate the description of the embodiments of the invention herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In this embodiment, an electrostatic protection device is provided, and fig. 2 is a schematic structural diagram of an electrostatic protection device provided according to an embodiment of the present invention, as shown in fig. 2, including: a first conductivity type substrate 22 and a second conductivity type epitaxial layer 21 disposed on the first conductivity type substrate 22, a second conductivity type well region 11 and a first conductivity type well region 12 are disposed in the second conductivity type epitaxial layer 21, the second conductivity type well region 11 is disposed in a tangent to the first conductivity type well region 12, a first N + region 111 and a first P + region 112 are disposed in the second conductivity type well region 11, the first N + region 111 and the first P + region 112 are disposed in a tangent to each other, a second N + region 121 and a second P + region 122 are disposed in the first conductivity type well region 12, the second N + region 121 and the second P + region 122 are disposed in a tangent to each other, a third N + region 13 is disposed at a tangent position of the second conductivity type well region 11 to the first conductivity type well region 12, a zener ZP region 14 is disposed between the third N + region 13 and the second N + region 121, the third N + region 13 is in contact with the zener-implanted ZP region 14, a schottky-implanted P-type region 15 is disposed between the zener-implanted ZP region 14 and the second N + region 121, and the schottky-implanted P-type region 15 is spaced apart from the zener-implanted ZP region 14 and the second N + region 121, respectively.
The electrostatic protection device provided by the embodiment of the invention can rapidly conduct the Schottky diode in the body when the ESD voltage is suddenly changed from positive to negative, so that the delay caused by the minority carrier storage effect of the traditional PN junction diode is greatly reduced, the electrostatic protection device has better protection capability on the oscillation type ESD pulse protection, and the negative performance of the electrostatic protection device is favorably improved.
Specifically, as shown in fig. 2, the first N + region 111, the first P + region 112 and the schottky injection P-type region 15 are connected to serve as an anode 30 of the esd protection device, and the second N + region 121 and the second P + region 122 are connected to serve as a cathode 31 of the esd protection device.
It should be understood that, in the electrostatic protection device provided by the embodiment of the present invention, when an ESD high voltage occurs at the anode, by providing the third N + region and the zener injection ZP region at the boundary between the second conductivity type well region and the first conductivity type well region for triggering the SCR, since the breakdown voltage of the third N + region and the zener injection ZP region is very low, the breakdown current thereof will flow through the body of the SCR device and trigger the SCR to operate, and when the ESD voltage at the anode oscillates (such as parasitic inductance and the like) for some reason, so that it rapidly becomes a negative voltage, a negative ESD current will flow into the anode through the schottky diode formed by the cathode, the second P + region, the first conductivity type well region and the schottky injection P region contacting with the metal. Because the Schottky diode does not have the minority carrier storage effect and does not need to pass through the second conduction type well region area, the resistance of the path is much smaller than that of a conventional device on one hand, and on the other hand, the device can well avoid the negative minority carrier storage effect so as to increase the response speed of the device.
As another embodiment of the electrostatic protection device of the present invention, as shown in fig. 3, the first N + region 111 is connected to the first P + region 112 and then serves as an anode 30 of the electrostatic protection device, the second N + region 121 is connected to the second P + region 122 and then serves as a cathode 31 of the electrostatic protection device, a schottky diode 16 is disposed between the schottky injection P-type region 15 and the anode 30 of the electrostatic protection device, an anode of the schottky diode 16 is connected to the schottky injection P-type region 15, and a cathode of the schottky diode 16 is connected to the anode 30 of the electrostatic protection device.
It should be understood that, in the embodiment of the present invention, an externally hanging schottky diode 16 is connected between the schottky injection P-type region 15 and the anode 30 of the esd protection device, the anode of the externally hanging schottky diode 16 is connected to the schottky injection P-type region 15 through metal, and the cathode of the schottky diode 16 is connected to the anode 30 of the esd protection device through metal.
As another embodiment of the esd protection device of the present invention, the first N + region is connected to the first P + region and then serves as an anode of the esd protection device, the second N + region is connected to the second P + region and then serves as a cathode of the esd protection device, a plurality of schottky diodes are connected in series between the schottky injection P-type region and the anode of the esd protection device, the anode of the schottky diodes connected in series is connected to the schottky injection P-type region, and the cathode of the schottky diodes connected in series is connected to the anode of the esd protection device.
In this embodiment, the number of schottky diodes may be plural.
In summary, no matter the number of the externally-hung Schottky diodes is one or more, the forward conduction voltage of the Schottky diodes is generally only 0.3-0.4V, and the forward conduction voltage of the conventional PN junction diodes is 0.7V, so that the series voltage of the externally-hung Schottky diodes and the integrated Schottky diodes can reach the level of 0.7V of the conventional PN junction diodes, and the functional requirements are met. On the other hand, because the breakdown voltage of the schottky diode is usually lower, the breakdown voltage of the path can be improved by the external schottky diode in a series connection mode so as to prevent the external schottky diode from being conducted by the forward ESD voltage.
As another embodiment of the electrostatic protection device of the present invention, as shown in fig. 4, a schottky injection N-type region 17 is disposed between the first P + region 112 and the third N + region 13, and the schottky injection N-type region 17 is disposed at a distance from the first P + region 112 and the third N + region 13, respectively.
In the embodiment of the present invention, the schottky injection N-type region 17 is connected to the schottky injection P-type region 15 to form two integrated schottky diodes, the first N + region 111 is connected to the first P + region 112 to serve as the anode 30 of the esd protection device, and the second N + region 121 is connected to the second P + region 122 to serve as the cathode 31 of the esd protection device.
The embodiment of the invention realizes better integration level by integrating the Schottky diode string.
In some embodiments, the third N + region 13 is positioned tangentially to the zener-implanted ZP region 14.
In some embodiments, the third N + region 13 is disposed across the zener-implanted ZP region 14.
In the embodiment of the present invention, the first conductivity type substrate 22 includes a P-type substrate, and the second conductivity type epitaxial layer 21 includes an N-type epitaxial layer.
In the embodiment of the present invention, the first conductivity type well region 12 includes a P-type well region, and the second conductivity type well region 11 includes an N-type well region.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.
Claims (9)
1. An electrostatic protection device, comprising: the semiconductor device comprises a first conductive type substrate and a second conductive type epitaxial layer arranged on the first conductive type substrate, wherein a second conductive type well region and a first conductive type well region are arranged in the second conductive type epitaxial layer, the second conductive type well region is tangentially arranged with the first conductive type well region, a first N + region and a first P + region are arranged in the second conductive type well region, the first N + region and the first P + region are tangentially arranged, a second N + region and a second P + region are arranged in the first conductive type well region, the second N + region and the second P + region are tangentially arranged, a third N + region is arranged at the tangential position of the second conductive type well region and the first conductive type well region, a Zener injection ZP region is arranged between the third N + region and the second N + region, and the third N + region is contacted with the Zener injection ZP region, a Schottky injection P-type area is arranged between the Zener injection ZP area and the second N + area, and the Schottky injection P-type area is respectively arranged at intervals with the Zener injection ZP area and the second N + area;
the first N + region, the first P + region and the Schottky injection P-type region are connected and then serve as an anode of the electrostatic protection device, and the second N + region and the second P + region are connected and then serve as a cathode of the electrostatic protection device.
2. The ESD protection device of claim 1 wherein the first N + region is connected to the first P + region and serves as an anode of the ESD protection device, the second N + region is connected to the second P + region and serves as a cathode of the ESD protection device, a Schottky diode is disposed between the Schottky injection P-type region and the anode of the ESD protection device, the anode of the Schottky diode is connected to the Schottky injection P-type region, and the cathode of the Schottky diode is connected to the anode of the ESD protection device.
3. The ESD protection device of claim 1 wherein the first N + region is connected to the first P + region and serves as an anode of the ESD protection device, the second N + region is connected to the second P + region and serves as a cathode of the ESD protection device, a plurality of Schottky diodes are arranged in series between the Schottky injection P-type region and the anode of the ESD protection device, the anode of the Schottky diode in series is connected to the Schottky injection P-type region, and the cathode of the Schottky diode in series is connected to the anode of the ESD protection device.
4. An electrostatic protection device according to any of claims 1 to 3, wherein the third N + region is arranged tangentially to the Zener implanted ZP region.
5. An electrostatic protection device according to any of claims 1 to 3, wherein the third N + region is arranged across the Zener implanted ZP region.
6. The electrostatic protection device according to claim 1, wherein the first conductivity type substrate comprises a P-type substrate and the second conductivity type epitaxial layer comprises an N-type epitaxial layer.
7. The electrostatic protection device according to claim 1, wherein the first conductivity type well region comprises a P-type well region, and the second conductivity type well region comprises an N-type well region.
8. An electrostatic protection device, comprising: the semiconductor device comprises a first conductive type substrate and a second conductive type epitaxial layer arranged on the first conductive type substrate, wherein a second conductive type well region and a first conductive type well region are arranged in the second conductive type epitaxial layer, the second conductive type well region is tangentially arranged with the first conductive type well region, a first N + region and a first P + region are arranged in the second conductive type well region, the first N + region and the first P + region are tangentially arranged, a second N + region and a second P + region are arranged in the first conductive type well region, the second N + region and the second P + region are tangentially arranged, a third N + region is arranged at the tangential position of the second conductive type well region and the first conductive type well region, a Zener injection ZP region is arranged between the third N + region and the second N + region, and the third N + region is contacted with the Zener injection ZP region, a Schottky injection P-type area is arranged between the Zener injection ZP area and the second N + area, and the Schottky injection P-type area is respectively arranged at intervals with the Zener injection ZP area and the second N + area;
and a Schottky injection N-type region is arranged between the first P + region and the third N + region and is respectively arranged at intervals with the first P + region and the third N + region.
9. The ESD device of claim 8 wherein the Schottky implant N-type region is connected to the Schottky implant P-type region to form two integrated Schottky diodes, the first N + region is connected to the first P + region to serve as an anode of the ESD device, and the second N + region is connected to the second P + region to serve as a cathode of the ESD device.
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| CN114759026B (en) * | 2022-04-21 | 2023-04-28 | 电子科技大学 | Novel double-hysteresis electrostatic protection device |
| CN117038720B (en) * | 2023-10-07 | 2024-01-26 | 江苏应能微电子股份有限公司 | Dual Zener well SCR device, manufacturing process and stacking structure thereof |
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| CN101246885A (en) * | 2008-03-05 | 2008-08-20 | 浙江大学 | Controllable silicon used for electrostatic discharge protection |
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| CN102569360A (en) * | 2012-03-09 | 2012-07-11 | 浙江大学 | Bidirectional triode thyristor based on diode auxiliary triggering |
| CN106298764B (en) * | 2015-05-19 | 2019-06-28 | 中芯国际集成电路制造(上海)有限公司 | A kind of semiconductor devices and electronic device |
| CN109065535A (en) * | 2018-08-20 | 2018-12-21 | 上海华力微电子有限公司 | A kind of silicon-controlled rectifier structure and its manufacturing method |
| CN111180439A (en) * | 2020-01-06 | 2020-05-19 | 常州工学院 | Electrostatic protection device of integrated circuit chip applied to FinFET process and preparation method thereof |
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