CN108428697A - A kind of low-capacitance bidirectional band negative resistance TVS device - Google Patents
A kind of low-capacitance bidirectional band negative resistance TVS device Download PDFInfo
- Publication number
- CN108428697A CN108428697A CN201711097623.5A CN201711097623A CN108428697A CN 108428697 A CN108428697 A CN 108428697A CN 201711097623 A CN201711097623 A CN 201711097623A CN 108428697 A CN108428697 A CN 108428697A
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- Prior art keywords
- tss
- tvs
- chips
- series connection
- chip
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Links
- 230000002457 bidirectional effect Effects 0.000 title abstract description 6
- 238000002360 preparation method Methods 0.000 claims abstract description 10
- 239000003990 capacitor Substances 0.000 claims abstract description 4
- 238000005538 encapsulation Methods 0.000 claims abstract description 4
- 238000003466 welding Methods 0.000 claims abstract description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 8
- 229910052802 copper Inorganic materials 0.000 claims description 8
- 239000010949 copper Substances 0.000 claims description 8
- 229910000679 solder Inorganic materials 0.000 claims description 8
- 238000005476 soldering Methods 0.000 claims description 8
- 238000004806 packaging method and process Methods 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 2
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000001052 transient effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 210000004709 eyebrow Anatomy 0.000 description 1
- 210000000720 eyelash Anatomy 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Emergency Protection Circuit Devices (AREA)
Abstract
The invention discloses a kind of low-capacitance bidirectional band negative resistance TVS devices and preparation method thereof, a low capacitance TSS chip including overlapping up and down and a TVS chip, the low capacitance TSS chips and the TVS chips upper and lower surface are respectively together with frame welding, and intermediate frame is that the low capacitance TSS chips and the TVS chips share.Traditional TVS device Surge handling capability and the chip space of a whole page are proportional relationships, and small device capacitor can not be obtained while obtaining big surge capacity.The present invention is allowed and device while having both the characteristic of big surge capacity and low capacitance, and device has encapsulation volume small, at low cost, the high advantage of reliability by the method for laminated sheet package.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of to carry TSS (Thyristor), also known as surge presses down
Low-capacitance TVS (the Transient Voltage Suppressors) device and its manufacturing method of combinations brake tube.
Background technology
With the development of electronic information technology, semiconductor devices small, high density and multifunction, especially just
The consumption electronic product for taking formula has strict requirements to board area, while the response device time fast one also being required to meet high speed number
According to the transmission of circuit, device will not be deteriorated to ensure electronic equipment after ensureing the glitch by multiple voltage and current again
Due quality.
Transient Voltage Suppressor (TVS) is a kind of semiconductor devices for voltage transient and carrying out surge protection, just can be very
Good solves these problems.It has clamp coefficient very little, and small, response is fast, and leakage current is small, high reliability.Cause
And it is used widely in the protection of voltage transient and surge.Protection for high-frequency circuit then needs low capacitance or super
Low-capacitance TVS (LCTVS) reduces the decaying of high-frequency circuit signal to reduce interference of the parasitic capacitance to circuit.
The negative effect that TVS surge capacities increase with the increase of the chip space of a whole page, but bring therewith is exactly with the space of a whole page
Increase capacitance can be increasing.We compel low capacitance, the TVS device demand of big surge, small electric leakage with the development of science and technology
In the eyebrows and eyelashes.In order to meet to big surge capacity, the demand of low capacitance.TVS and TSS Series Packages are used the present invention provides a kind of
Method, to ensure that device entire device capacitor in the case of big surge capacity (8/20 1KV or more) is small (being less than 20PF).
Invention content
In order to solve the above technical problems, the present invention uses following technical solution：
A kind of two-way TVS device with series connection TSS, including the low capacitance TSS chips overlapped up and down and a TVS cores
Piece, the low capacitance TSS chips and the TVS chips upper and lower surface are respectively together with frame welding, and intermediate frame is
The low capacitance TSS chips and the TVS chips share.
The low capacitance TSS chips refer to the chip that chip capacity is less than 20PF.
The TVS device is that capacitance range is 1-20PF, and Surge handling capability reaches TVS device (the 8-20 waveforms of 1KV or more
2 Ω inner walkways).
The frame of the centre could alternatively be copper sheet.
The manufacturing method of the above-mentioned two-way TVS device with series connection TSS comprising：
Step A：TVS chips are bonded with lower frame with solder；
Step B：It is bonded with solder in TSS chips and upper frame；
Step C：Carry out Reflow Soldering solidified solder；
Step D：TVS chips and TSS chips are overlapped successively, frame or copper sheet are inserted among device and carried out using weld tabs
Connection；
Step E：Reflow Soldering is cured；
Step F：Plastic packaging, test.
The beneficial effects of the invention are as follows：The present invention is realized double using low capacitance TSS chips and high-power TVS chip-in series
To negative resistance charactertistic, there is strong Surge handling capability while realizing low capacitance；The present invention can make on the higher circuit of frequency
With, and, at low cost, reliability high advantage small with encapsulation volume.
Description of the drawings
Fig. 1 is the status diagram of manufacturing method step A of the low-capacitance bidirectional with negative resistance TVS device of the present invention.
Fig. 2 is the status diagram of manufacturing method step B of the low-capacitance bidirectional with negative resistance TVS device of the present invention.
Fig. 3 is the status diagram of manufacturing method step D of the low-capacitance bidirectional with negative resistance TVS device of the present invention.
Specific implementation mode
The two-way TVS device and preparation method thereof with series connection TSS of the present invention is carried out specifically below in conjunction with the accompanying drawings
It is bright.
As shown in Figs. 1-3, the two-way TVS device with series connection TSS of the invention includes the low capacitance TSS overlapped up and down
Chip 400 and a TVS chips 100, low capacitance TSS chips and TVS chips upper and lower surface are welded on one with frame 200,500 respectively
It rises, and intermediate frame 600 is that low capacitance TSS chips and TVS chips share.
Low capacitance TSS chips refer to chip capacity be less than 20PF chip.
TVS device is that capacitance range is 1-20PF, and Surge handling capability reaches TVS device (2 Ω of 8-20 waveforms of 1KV or more
Inner walkway).
Intermediate frame could alternatively be copper sheet.
Its preparation process is as shown in Figs. 1-3 comprising：
Step A：TVS chips 100 are bonded with lower frame 200 with solder 300；
Step B：It is bonded with solder 300 with upper frame 500 in TSS chips 400；
Step C：Carry out Reflow Soldering solidified solder；
Step D：TVS chips and TSS chips are overlapped successively, frame or copper sheet 600 are inserted among device and use weld tabs
It is attached；
Step E：Reflow Soldering is cured；
Step F：Plastic packaging, test.
In a preferred embodiment of the invention, in step A：The TVS chip spaces of a whole page used are 4.0mm, operating voltage
For 48V.
In a preferred embodiment of the invention, in step B：The TSS chip spaces of a whole page used are 1.4mm, operating voltage
For 8V, capacitance 18PF.
In a preferred embodiment of the invention, in step C：The Reflow Soldering temperature used is 260 DEG C.
In a preferred embodiment of the invention, in step D：It is carried out and centre using size and the matched weld tabs of chip
Isolation copper sheet is welded, and intermediate isolating copper sheet area and large chip are area matched.
In a preferred embodiment of the invention, Reflow Soldering temperature is 220 DEG C in step E.
In a preferred embodiment of the invention, in step F：What is used is encapsulated as SMC encapsulation, device Surge handling capability
Reach 1KV or more, device capacitor reaches 20PF hereinafter, two-way antisurge, band negative resistance charactertistic.
The present invention is elaborated above, but described above, only preferable embodiment of the invention, should not be limited
Determine the range that the present invention is implemented.That is, it is every according to equivalent changes and modifications etc. made by the present patent application range, all should still it belong to
In in the patent covering scope of the present invention.
Claims (11)
1. a kind of two-way TVS device with series connection TSS, which is characterized in that a low capacitance TSS chip including overlapping up and down
With a TVS chip, the low capacitance TSS chips and the TVS chips upper and lower surface respectively together with frame welding, and in
Between frame be that the low capacitance TSS chips and the TVS chips share.
2. the two-way TVS device according to claim 1 with series connection TSS, which is characterized in that the low capacitance TSS
Chip refers to the chip that chip capacity is less than 20PF.
3. the two-way TVS device according to claim 1 with series connection TSS, which is characterized in that the TVS device refers to
Capacitance range is 1-20PF, and Surge handling capability reaches the TVS device of 1KV or more.
4. the two-way TVS device according to claim 1 with series connection TSS, which is characterized in that the frame of the centre can
To replace with copper sheet.
5. carrying the preparation method of the two-way TVS device of series connection TSS, feature according to any one of claims 1-4
It is comprising：
Step A：TVS chips are bonded with lower frame with solder；
Step B：It is bonded with solder in TSS chips and upper frame；
Step C：Carry out Reflow Soldering welding；
Step D：TVS chips and TSS chips are overlapped successively, frame or copper sheet are inserted among device and connected using weld tabs
It connects；
Step E：Reflow Soldering is welded；
Step F：Plastic packaging, test.
6. the preparation method of the two-way TVS device according to claim 5 with series connection TSS, which is characterized in that step A
In：The TVS chip spaces of a whole page used are 4.0mm, operating voltage 48V.
7. the preparation method of the two-way TVS device according to claim 5 with series connection TSS, which is characterized in that step B
In：The TSS chip spaces of a whole page used are 1.4mm, operating voltage 8V, capacitance representative 18PF.
8. the preparation method of the two-way TVS device according to claim 5 with series connection TSS, which is characterized in that step C
In：The Reflow Soldering temperature used is 260 DEG C of high-temperature region.
9. the preparation method of the two-way TVS device according to claim 5 with series connection TSS, which is characterized in that step D
In：Using size and the matched weld tabs of chip welded with intermediate isolating copper sheet, intermediate isolating copper sheet area and big core
Piece is area matched.
10. the preparation method of the two-way TVS device according to claim 5 with series connection TSS, which is characterized in that step E
Middle Reflow Soldering temperature is 260 DEG C of high-temperature region highest.
11. the preparation method of the two-way TVS device according to claim 5 with series connection TSS, which is characterized in that step F
In：What is used is encapsulated as SMC encapsulation, and device Surge handling capability reaches 1KV or more, and device capacitor reaches 20PF hereinafter, two-way anti-
Surge, band negative resistance charactertistic.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711097623.5A CN108428697A (en) | 2017-11-09 | 2017-11-09 | A kind of low-capacitance bidirectional band negative resistance TVS device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711097623.5A CN108428697A (en) | 2017-11-09 | 2017-11-09 | A kind of low-capacitance bidirectional band negative resistance TVS device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108428697A true CN108428697A (en) | 2018-08-21 |
Family
ID=63155766
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711097623.5A Pending CN108428697A (en) | 2017-11-09 | 2017-11-09 | A kind of low-capacitance bidirectional band negative resistance TVS device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108428697A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109300994A (en) * | 2018-09-27 | 2019-02-01 | 上海长园维安微电子有限公司 | Low residual voltage TVS device of a kind of puppet negative resistance type and preparation method thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103427409A (en) * | 2013-08-20 | 2013-12-04 | 绍兴旭昌科技企业有限公司 | Surge protector |
| CN104269835A (en) * | 2014-09-19 | 2015-01-07 | 华为技术有限公司 | Protection device, electronic equipment and power supply |
| CN105552873A (en) * | 2016-01-05 | 2016-05-04 | 深圳市槟城电子有限公司 | Surge protection device |
| WO2017032168A1 (en) * | 2015-08-27 | 2017-03-02 | 中兴通讯股份有限公司 | Protection circuit for interface with oscillation characteristic and method thereof |
| CN207602569U (en) * | 2017-11-09 | 2018-07-10 | 上海长园维安微电子有限公司 | A kind of low-capacitance bidirectional band negative resistance TVS device |
-
2017
- 2017-11-09 CN CN201711097623.5A patent/CN108428697A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103427409A (en) * | 2013-08-20 | 2013-12-04 | 绍兴旭昌科技企业有限公司 | Surge protector |
| CN104269835A (en) * | 2014-09-19 | 2015-01-07 | 华为技术有限公司 | Protection device, electronic equipment and power supply |
| WO2017032168A1 (en) * | 2015-08-27 | 2017-03-02 | 中兴通讯股份有限公司 | Protection circuit for interface with oscillation characteristic and method thereof |
| CN105552873A (en) * | 2016-01-05 | 2016-05-04 | 深圳市槟城电子有限公司 | Surge protection device |
| CN207602569U (en) * | 2017-11-09 | 2018-07-10 | 上海长园维安微电子有限公司 | A kind of low-capacitance bidirectional band negative resistance TVS device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109300994A (en) * | 2018-09-27 | 2019-02-01 | 上海长园维安微电子有限公司 | Low residual voltage TVS device of a kind of puppet negative resistance type and preparation method thereof |
| CN109300994B (en) * | 2018-09-27 | 2023-05-30 | 上海维安半导体有限公司 | Pseudo negative resistance type low residual voltage TVS device and preparation method thereof |
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| Date | Code | Title | Description |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: Seven road 201202 Shanghai Pudong New Area Shiwan No. 1001 Applicant after: Shanghai Wei'an Semiconductor Co., Ltd Address before: 201202 Shanghai city Pudong New Area Town Road No. 1001 to seven Shiwan Building 2 Applicant before: Shanghai Changyuan Wayon Microelectronics Co., Ltd. |
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| CB02 | Change of applicant information |