CN108922885A - A kind of high-power unidirectional TVS device - Google Patents
A kind of high-power unidirectional TVS device Download PDFInfo
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- CN108922885A CN108922885A CN201810885772.6A CN201810885772A CN108922885A CN 108922885 A CN108922885 A CN 108922885A CN 201810885772 A CN201810885772 A CN 201810885772A CN 108922885 A CN108922885 A CN 108922885A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 34
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 34
- 239000010703 silicon Substances 0.000 claims abstract description 34
- 239000002184 metal Substances 0.000 claims abstract description 22
- 238000000605 extraction Methods 0.000 claims abstract description 4
- 238000009792 diffusion process Methods 0.000 description 6
- 230000005611 electricity Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0296—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices involving a specific disposition of the protective devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8611—Planar PN junction diodes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Ceramic Engineering (AREA)
- Emergency Protection Circuit Devices (AREA)
Abstract
The invention discloses a kind of high-power unidirectional TVS devices, it is characterised in that：Two-sided layout design is carried out on silicon wafer, wherein：Front side of silicon wafer domain includes the area P+, the area N+, contact hole, front cathodic metal；The area N+ surrounds the area N+ structure annular in shape in central area, the area P+, while there is interval between the area P+ and the area N+；Contact hole only opens the front area N+, so that front cathodic metal only draws the area N+ by contact hole；Silicon chip back side domain includes the area P+, the area N+, back anode metal；Silicon chip back side is directly all contacted with silicon chip back side entirety without dielectric layer, back anode metal, i.e., the area P+ of silicon chip back side and the area N+ is carried out short circuit extraction.The present invention carries out layout design by the front and back to chip, significantly improves the surge current ability of TVS device, while having lower clamp voltage, and does not need additionally to increase the space of a whole page.
Description
Technical field
The invention belongs to semiconductor protection device technical fields, more particularly to a kind of high-power unidirectional TVS (Transient
Voltage Suppressors) device.
Background technique
With the development that each class of electronic devices and mobile terminal are minimized to function diversification and volume, inside use
Integrated circuit is also rapidly developing, and the characteristic size and operating voltage of all kinds of chips are all constantly reducing, therefore to corresponding TVS
Protecting device, higher requirements are also raised, on the one hand requires TVS protection device area and volume smaller, constantly small-sized to match
Change circuit board；On the other hand, as mobile terminal is to safety and reliability increasingly higher demands, especially in mobile phone peace
Plate field has had been increased to 300V or more to the carrying out surge protection Capability Requirement at the end VBUS, therefore it is required that TVS protection device should
There is very high surge current protection ability, while having low clamp voltage again.
Traditional TVS protects device at present, in order to improve power, often by the method for increasing TVS device area, by
In increasing device area, the finished-product volume after leading to encapsulation increases, thus cannot meet all kinds of mobile terminal miniaturizations well
Demand, on the other hand increase TVS device area, for reduce clamp voltage the effect is unsatisfactory.In order to break through traditional skill
Art bottleneck obtains one kind and does not increase device area, just increases substantially the TVS protection device of power, and inventor sets by innovation
Meter, and have passed through practice production and obtain the present invention.
Summary of the invention
To solve above-mentioned deficiency of the prior art, present invention novelty provide a kind of high-power unidirectional TVS device,
It has many advantages, such as that high-power, small in size, integrated level is high, at low cost.
The technical scheme is that：
A kind of high-power unidirectional TVS device, it is characterised in that：Two-sided layout design is carried out on silicon wafer, wherein：
Front side of silicon wafer domain includes the area P+, the area N+, contact hole, front cathodic metal；The area N+ surrounds in central area, the area P+
The area N+ structure annular in shape, while there is interval between the area P+ and the area N+；Contact hole only opens the front area N+, so that front cathode is golden
Belong to and the area N+ is only drawn by contact hole；
Silicon chip back side domain includes the area P+, the area N+, back anode metal；Silicon chip back side is without dielectric layer, back anode metal
It is directly all contacted with silicon chip back side entirety, i.e., the area P+ of silicon chip back side and the area N+ is subjected to short circuit extraction.
Preferably, the area N+ and the area P+ of silicon chip back side are identical as the domain in the area N+ of front side of silicon wafer and the area P+.
Preferably, the length and width one of the length and width and silicon wafer of front cathodic metal and back anode metal
It causes.
Preferably, silicon wafer length is 1.2~2.0mm, width is 1.0~1.8mm, and the area P+ and the area N+ area ratio are 1:
1 to 1:The spacing in 6th, P+ area and the area N+ is 50~120 μm；More preferably, the area P+ and the area N+ area ratio are 1:3rd, P+ area and N
The spacing in+area is 60~80 μm.
Preferably, silicon wafer length is 0.8~1.6mm, width is 0.5~1.4mm, and the area P+ and the area N+ area ratio are 1:
2 to 1:The spacing in 5th, P+ area and the area N+ is 30~100 μm；More preferably, the area P+ and the area N+ area ratio are 1:3 to 1:4, P+
Area and the section N+ are away from being 45~55 μm.
In order to obtain the optimal TVS device of performance, it is the area P+ and the area N+ respectively that there are two important parameter settings by the present invention
Area ratio and the spacing in the area P+ and the area N+ can obtain surge current ability most by adjusting the two important parameters
Greatly, and the very low TVS of clamp voltage protects device.
The present invention carries out layout design by the front and back to chip, significantly improves the surge of TVS device
Current capacity, while there is lower clamp voltage, and do not need additionally to increase the space of a whole page.
Detailed description of the invention
Fig. 1 is the front domain basic structure of high-power unidirectional TVS device of the invention.
Fig. 2 is the back side domain basic structure of high-power unidirectional TVS device of the invention.
Specific embodiment
Present pre-ferred embodiments are provided with reference to the accompanying drawing, in order to explain the technical scheme of the invention in detail.
Embodiment 1：
The present embodiment chip outer dimension, length 1.8mm, width 1.2mm are suitable for compact package shell.
The area P+ 100 and 200 area ratio of the area N+ are 1:3；.
Wherein the spacing in the area P+ and the area N+ is 70 μm.
Metal area size is as chip overall dimensions.
The specific manufacturing method process of the present embodiment is：
Step 1：Selected silicon wafer is P type substrate, first grows oxide layer simultaneously as barrier layer in front side of silicon wafer and the back side.
The resistivity of P type substrate is 1 ± 0.5 Ω cm, with a thickness of 200 ± 20 μm；
Preferably, the oxidated layer thickness of growth is 0.6 μm.
Step 2：It is etched by photoetching and oxide layer, opens the region N+ of front side of silicon wafer and the back side, be then doped.
Preferably, doping way is that boiler tube applies source thermal diffusion and ion implanting, wherein more preferably, be by boiler tube into
Row thermal diffusion doping.
Step 3：Into furnace tube device, carries out High temperature diffusion and grow oxide layer in the area N+ simultaneously.
Preferably, the oxidated layer thickness of growth is identical as the thickness of oxide layer in step 1.
Step 4：It is etched by photoetching and oxide layer, opens the region P+ of front side of silicon wafer and the back side, be then doped.
Preferably, doping way is that boiler tube applies source thermal diffusion and ion implanting, wherein more preferably, be by boiler tube into
Row thermal diffusion doping.
Step 5：Into furnace tube device, carries out High temperature diffusion and grow oxide layer in the area P+ simultaneously.
Preferably, the oxidated layer thickness of growth is identical as the thickness of oxide layer in step 1.
Step 6：Gluing, exposure, development are carried out to front side of silicon wafer, 300 figure of contact hole is defined, then uses corrosive liquid
The oxide layer in front face hole is removed, while the oxide layer at the back side is also entirely removed.
Step 7：In the front and back splash-proofing sputtering metal 400 of silicon wafer, forms anode and draw and cathode extraction.
The TVS device manufactured and designed using this programme, has the characteristics that performance is strong, small in size, the most billow that can be born
Gushing electric current is 200A, can be subjected to the up to surge voltage impact of 350V or more, can than traditional TVS device performance boost 100%
It is applied to that the end mobile phone VBUS is newest requires standard to meet.
Embodiment 2：
The present embodiment chip outer dimension, length 1.8mm, width 1.2mm are suitable for compact package shell.
The area P+ 100 and 200 area ratio of the area N+ are 1:1；.
Wherein the spacing in the area P+ and the area N+ is 50 μm.
Metal area size is as chip overall dimensions.
The TVS device manufactured and designed using this programme, tool performance are slightly weaker than embodiment 1, the maximum surge electricity that can be born
Stream is 130A.
Embodiment 3：
The present embodiment chip outer dimension, length 1.8mm, width 1.2mm are suitable for compact package shell.
The area P+ 100 and 200 area ratio of the area N+ are 1:6；
Wherein the spacing in the area P+ and the area N+ is 120 μm.
Metal area size is as chip overall dimensions.
The TVS device manufactured and designed using this programme, tool performance are slightly weaker than embodiment 1, the maximum surge electricity that can be born
Stream is 160A.
Embodiment 4：
The present embodiment chip outer dimension, length 1.2mm, width 0.9mm, suitable for the outer of more small package form
Shell.
The area P+ and the area N+ area ratio are 1:4；
The spacing in the area P+ and the area N+ is 50 μm.
Preferably, metal area size is as chip overall dimensions.
The TVS device manufactured and designed using this programme, has the characteristics that the maximum that performance is strong, volume is smaller, can bear
Surge current is 130A, can be subjected to the up to surge voltage impact of 300V or more, than traditional TVS device performance boost 90%,
It can satisfy and be applied to that the end mobile phone VBUS is newest requires standard.
Embodiment 5：
The present embodiment chip outer dimension, length 1.2mm, width 0.9mm, suitable for the outer of more small package form
Shell.
The area P+ and the area N+ area ratio are 1:2；
The spacing in the area P+ and the area N+ is 30 μm.
Preferably, metal area size is as chip overall dimensions.
The TVS device manufactured and designed using this programme, performance are slightly weaker than embodiment 4, the maximum surge electricity that can be born
Stream is 70A.
Embodiment 6：
The present embodiment chip outer dimension, length 1.2mm, width 0.9mm, suitable for the outer of more small package form
Shell.
The area P+ and the area N+ area ratio are 1:5；
The spacing in the area P+ and the area N+ is 100 μm.
Preferably, metal area size is as chip overall dimensions.
The TVS device manufactured and designed using this programme, performance are slightly weaker than embodiment 4, the maximum surge electricity that can be born
Stream is 100A.
The above described is only a preferred embodiment of the present invention, being not intended to limit the present invention in any form.This
Although invention has been used as preferred embodiment to announce as above, however, it is not intended to limit the invention.It is any to be familiar with this field
Technical staff, in the case where not departing from Spirit Essence of the invention and technical solution, all using the method for the disclosure above and
Technology contents make many possible changes and modifications to technical solution of the present invention, or are revised as the equivalence enforcement of equivalent variations
Example.Therefore, anything that does not depart from the technical scheme of the invention, it is made to the above embodiment according to the technical essence of the invention
Any modification, equivalent replacement, equivalence changes and modification still fall within the range of technical solution of the present invention protection.
Claims (7)
1. a kind of high-power unidirectional TVS device, it is characterised in that：Two-sided layout design is carried out on silicon wafer, wherein：
Front side of silicon wafer domain includes the area P+, the area N+, contact hole, front cathodic metal；The area N+ surrounds the area N+ in central area, the area P+
Structure annular in shape, while there is interval between the area P+ and the area N+；Contact hole only opens the front area N+, so that front cathodic metal is logical
It crosses contact hole and only draws the area N+；
Silicon chip back side domain includes the area P+, the area N+, back anode metal；For silicon chip back side without dielectric layer, back anode metal is direct
It is all contacted with silicon chip back side entirety, i.e., the area P+ of silicon chip back side and the area N+ is subjected to short circuit extraction.
2. high-power unidirectional TVS device according to claim 1, it is characterised in that：The area N+ and the area P+ of silicon chip back side with
The area N+ of front side of silicon wafer is identical with the domain in the area P+.
3. high-power unidirectional TVS device according to claim 1, it is characterised in that：Front cathodic metal and back side sun
The length and width of pole metal and the length and width of silicon wafer are consistent.
4. high-power unidirectional TVS device according to claim 1, it is characterised in that：Silicon wafer length is 1.2~2.0mm, wide
Degree is 1.0~1.8mm, and the area P+ and the area N+ area ratio are 1:1 to 1:The spacing in 6th, P+ area and the area N+ is 50~120 μm.
5. high-power unidirectional TVS device according to claim 4, it is characterised in that：The area P+ and the area N+ area ratio are 1:
The spacing in 3rd, P+ area and the area N+ is 60~80 μm.
6. high-power unidirectional TVS device according to claim 1, it is characterised in that：Silicon wafer length is 0.8~1.6mm, wide
Degree is 0.5~1.4mm, and the area P+ and the area N+ area ratio are 1:2 to 1:The spacing in 5th, P+ area and the area N+ is 30~100 μm.
7. high-power unidirectional TVS device according to claim 6, it is characterised in that：More preferably, the area P+ and the area N+ face
Product ratio is 1:3 to 1:4th, P+ area and the section N+ are away from being 45~55 μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810885772.6A CN108922885A (en) | 2018-08-06 | 2018-08-06 | A kind of high-power unidirectional TVS device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810885772.6A CN108922885A (en) | 2018-08-06 | 2018-08-06 | A kind of high-power unidirectional TVS device |
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| Publication Number | Publication Date |
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| CN108922885A true CN108922885A (en) | 2018-11-30 |
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| CN201810885772.6A Pending CN108922885A (en) | 2018-08-06 | 2018-08-06 | A kind of high-power unidirectional TVS device |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014206177A1 (en) * | 2013-06-25 | 2014-12-31 | 无锡华润上华半导体有限公司 | Method for preparing insulated gate bipolar transistor of trench fs structure |
| CN104409507A (en) * | 2014-12-08 | 2015-03-11 | 武汉大学 | Low-on-resistance VDMOS device and preparing method thereof |
| WO2017118028A1 (en) * | 2016-01-05 | 2017-07-13 | 深圳市槟城电子有限公司 | Surge protector device |
| CN206451709U (en) * | 2016-11-30 | 2017-08-29 | 上海芯石微电子有限公司 | A kind of Half bridge rectifier schottky device for being applicable small-sized encapsulated |
| CN206742243U (en) * | 2017-05-16 | 2017-12-12 | 上海长园维安微电子有限公司 | A kind of two-way TVS device with anti-paralleled diode |
| CN108039390A (en) * | 2017-11-22 | 2018-05-15 | 天津大学 | Contactless protection ring single-photon avalanche diode and preparation method |
| CN208722877U (en) * | 2018-08-06 | 2019-04-09 | 上海长园维安微电子有限公司 | A kind of high-power unidirectional TVS device |
-
2018
- 2018-08-06 CN CN201810885772.6A patent/CN108922885A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014206177A1 (en) * | 2013-06-25 | 2014-12-31 | 无锡华润上华半导体有限公司 | Method for preparing insulated gate bipolar transistor of trench fs structure |
| CN104409507A (en) * | 2014-12-08 | 2015-03-11 | 武汉大学 | Low-on-resistance VDMOS device and preparing method thereof |
| WO2017118028A1 (en) * | 2016-01-05 | 2017-07-13 | 深圳市槟城电子有限公司 | Surge protector device |
| CN206451709U (en) * | 2016-11-30 | 2017-08-29 | 上海芯石微电子有限公司 | A kind of Half bridge rectifier schottky device for being applicable small-sized encapsulated |
| CN206742243U (en) * | 2017-05-16 | 2017-12-12 | 上海长园维安微电子有限公司 | A kind of two-way TVS device with anti-paralleled diode |
| CN108039390A (en) * | 2017-11-22 | 2018-05-15 | 天津大学 | Contactless protection ring single-photon avalanche diode and preparation method |
| CN208722877U (en) * | 2018-08-06 | 2019-04-09 | 上海长园维安微电子有限公司 | A kind of high-power unidirectional TVS device |
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Address after: Seven road 201202 Shanghai Pudong New Area Shiwan No. 1001 Applicant after: Shanghai Wei'an Semiconductor Co., Ltd Address before: 201202 Shanghai city Pudong New Area Town Road No. 1001 to seven Shiwan Building 2 Applicant before: Shanghai Changyuan Wayon Microelectronics Co., Ltd. |