CN208781854U

CN208781854U - A kind of unidirectional TVS device of big surge

Info

Publication number: CN208781854U
Application number: CN201821258814.5U
Authority: CN
Inventors: 蒋骞苑; 王允; 苏海伟; 赵德益; 杜牧涵; 赵志方; 张彩霞; 徐亚静; 冯星星; 吴青青; 张利明
Original assignee: SHANGHAI CHANGYUAN WAYON MICROELECTRONICS CO Ltd
Current assignee: Shanghai Wei'an Semiconductor Co., Ltd
Priority date: 2018-08-06
Filing date: 2018-08-06
Publication date: 2019-04-23
Anticipated expiration: 2028-08-06

Abstract

The utility model discloses a kind of big unidirectional TVS devices of surge, including P type substrate silicon wafer, the front area N+, the back side area N+, the P type substrate front side of silicon wafer is equipped with insulating medium layer, the front area N+ front cathodic metal is drawn by contact hole, the area the back side N+ and substrate P silicon wafer draw back anode metal simultaneously, so that the back side area N+ and substrate P silicon wafer are shorted.The utility model passes through in the increased region N+ in the substrate slice back side, form parasitic NPN transistor, and to and domain do metal extraction simultaneously, the emitter and base stage for making parasitic NPN transistor are shorted, it realizes under the conditions of same homalographic, the surge capacity of TVS is greatly improved, TVS device obtained has many advantages, such as that high-power, small in size, integrated level is high, at low cost.

Description

A kind of unidirectional TVS device of big surge

Technical field

The utility model belongs to semi-conductor discrete device field, is related to a kind of protection device and designs and manufactures, more particularly to A kind of unidirectional TVS device of big surge.

Background technique

Transient Voltage Suppressor (Transient Voltage Suppressors, abbreviation TVS) one kind generally uses Device is protected, it has the response speed and sizable surge ability being exceedingly fast.When its both ends are subjected to the high energy of moment When stroke, the impedance value between both ends can be become Low ESR from high impedance with high speed by TVS, and to release, a moment is big Electric current, its both end voltage clamper one it is scheduled numerically, to protect late-class circuit chip not by high voltage transient point The impact of peak pulse has ensured the safe operation of circuit system and module, therefore TVS is a kind of essential protection class device Part.

With the continuous development of IC chip, the characteristic size and operating voltage of all kinds of chips are all constantly reducing, Therefore to corresponding TVS protection device, higher requirements are also raised, on the one hand requires the area of TVS protection device increasingly It is small, to match the circuit board constantly reduced；On the other hand, with all kinds of mobile terminal devices to safety and reliability increasingly High requirement therefore it is required that TVS protection device should have very high surge current protection ability, while having low clamper electricity again Pressure.

TVS traditional at present protects device, in order to improve power, improves wave often by TVS device area is increased The method for gushing ability, due to increasing device area, the finished-product volume after leading to encapsulation increases, thus cannot meet well all kinds of The demand of mobile terminal miniaturization, on the other hand increases TVS device area, and for reducing clamp voltage, the effect is unsatisfactory.

Utility model content

For overcome the deficiencies in the prior art, traditional technology bottleneck is broken through, the utility model provides a kind of big surge Unidirectional TVS device.

The technical solution of the utility model is:

A kind of unidirectional TVS device of big surge, including P type substrate silicon wafer, the front area N+, the back side area N+, the P type substrate silicon Piece front is equipped with insulating medium layer, and front cathodic metal, the area the back side N+ and P lining are drawn by contact hole by the front area N+ Bottom silicon wafer draws back anode metal simultaneously, so that the back side area N+ and substrate P silicon wafer are shorted.

Preferably, the contact hole window is smaller than the positive area N+, it is further preferable that the every side of contact hole is smaller by 5 than the positive area N+ ~12 μm.

The preparation method of the above-mentioned unidirectional TVS device of big surge the following steps are included:

Step 1: the mixed solvent of selection P type substrate silicon wafer, usability sulfuric acid and hydrogen peroxide is cleaned, then in silicon wafer Front and back grow oxide layer simultaneously；

Step 2: in front side of silicon wafer by gluing, exposure, development, the positive region N+ is defined, then in silicon chip back side By gluing, exposure, development, the back side region N+ is defined, subsequently into acid tank, by the oxide layer of front and back opened areas Removal, then photoresist is removed.

Step 3: the area front side of silicon wafer N+ and the back side area N+ are doped simultaneously.

Step 4: High temperature diffusion knot is carried out in furnace tube device；

Step 5: the oxide layer on silicon wafer two sides all being removed, insulating medium layer then is deposited to front side of silicon wafer, is then led to Cross photoetching, lithographic technique makes front face hole；

Step 6: in the front and back splash-proofing sputtering metal of silicon wafer, forming anode and draw and cathode extraction.

Preferably, the resistivity of P type substrate is 0.5~5 Ω * cm in step 1, it is more excellent with a thickness of 150~250 μm Choosing, resistivity is 1~2 Ω * cm, with a thickness of 180~220 μm；

Preferably, the oxidated layer thickness that step 1 is grown is 0.5~1.2 μm.

Preferably, using buffer oxide layer etching liquid when step 2 removes removing oxide layer；

Preferably, the region N+ accounts for the 70%~85% of entire silicon chip surface product, more preferably, the region N+ in step 2 Account for the 80% of entire silicon chip surface product.

Preferably, step 3 carries out thermal diffusion doping by boiler tube, the doping simultaneously to front and back, doping are realized Source is phosphorus oxychloride (POCl₃), doping temperature is 850~1000 DEG C.

Preferably, the High temperature diffusion knot process conditions of step 4 are as follows: temperature range is 1100~1200 DEG C, when Between be 12~16 hours so that the junction depth in the area N+ is at 10~60 μm.

The utility model by the increased region N+ in the substrate slice back side, forming parasitic NPN transistor, and to and domain simultaneously Metal extraction is done, the emitter of parasitic NPN transistor and base stage is shorted, realizes under the conditions of same homalographic, significantly mention The high surge capacity of TVS, TVS device obtained have many advantages, such as that high-power, small in size, integrated level is high, at low cost.

Detailed description of the invention

Fig. 1 is that step 1 completes structure in the utility model embodiment 1；

Fig. 2 is that step 2 completes structure in the utility model embodiment 1；

Fig. 3 is that step 3 completes structure in the utility model embodiment 1；

Fig. 4 is that step 4 completes structure in the utility model embodiment 1；

Fig. 5 is that step 5 completes structure in the utility model embodiment 1；

Fig. 6 is that step 6 completes structure in the utility model embodiment 1；

Fig. 7 is to be finally completed structure in the utility model embodiment 2；

Fig. 8 is to be finally completed structure in the utility model embodiment 3；

Fig. 9 is to be finally completed structure in the utility model embodiment 4；

In figure, 10 be P type substrate, and 20 be oxide layer, and 30 be the area N+, and 40 be dielectric layer, and 50 be front cathodic metal, 60 For back anode metal

Specific embodiment

The utility model preferred embodiment is provided, with reference to the accompanying drawing the technical solution of the utility model is described in detail.

Embodiment 1:

Step 1: firstly, selecting P type substrate silicon wafer, chemical solvent (mixed solvent of sulfuric acid and hydrogen peroxide) cleaning is carried out, Then oxide layer is grown simultaneously in the front and back of silicon wafer.

Preferably, the resistivity of P type substrate is 0.5~5 Ω * cm, with a thickness of 150~250 μm, more preferably, electricity Resistance rate is 1~2 Ω * cm, with a thickness of 180~220 μm；

Preferably, the oxidated layer thickness of growth is 0.5~1.2 μm.It is as shown in Figure 1 that this step completes structure.

Preferably, using buffer oxide layer etching liquid when removing removing oxide layer.

Preferably, the region N+ accounts for the 70%~85% of entire silicon chip surface product, more preferably, the region N+ is accounted for entirely The 80% of silicon chip surface product.It is as shown in Figure 2 that this step completes structure.

Preferably, carrying out thermal diffusion doping by boiler tube, the doping simultaneously to front and back, doped source may be implemented For phosphorus oxychloride (chemical formula POCl₃), doping temperature is 850~1000 DEG C.It is as shown in Figure 3 that this step completes structure.

Step 4: High temperature diffusion knot is carried out in furnace tube device.

Preferably, pyroprocess process conditions are, temperature range is 1100~1200 DEG C, and the time is 12~16 small When, so that the junction depth in the area N+ is at 10~60 μm.It is as shown in Figure 4 that this step completes structure.

Step 5: the oxide layer on silicon wafer two sides all being removed, insulating medium layer then is deposited to front side of silicon wafer, is then led to Cross photoetching, lithographic technique makes front face hole.

Preferably, contact hole window is smaller than the positive area N+, more preferably, the every side of contact hole is smaller by 5 than the positive area N+ ~12 μm.It is as shown in Figure 5 that this step completes structure.

Step 6: in the front and back splash-proofing sputtering metal of silicon wafer, forming anode and draw and cathode extraction.This step completes knot Structure is as shown in Figure 6.

Embodiment 2

Another preferred embodiment, such as Fig. 7 are obtained by adjusting back side N+ zone position.

Embodiment 3

Another preferred embodiment, such as Fig. 8 are obtained by adjusting dielectric layer, the front area N+ and back side N+ zone position.

Embodiment 4

Another preferred embodiment, such as Fig. 9 are obtained by adjusting dielectric layer and front N+ zone position.

The utility model has following technical advantage than traditional unidirectional TVS device:

(1) the unidirectional TVS device structure of tradition is innovated, by the way that in the increased region N+ in the substrate slice back side, formation is posted Raw NPN transistor, and metal extraction is done simultaneously to substrate P and the back side region N+, make the emitter and base stage of parasitic NPN transistor It is shorted.When the in running order reverse breakdown of the main diode of TVS, this parasitic NPN transistor is also started to work, and utilizes NPN The Current amplifier characteristic of transistor so that the current capacity of TVS device entirety is greatly improved, and obtains rapid Hui Te Property.Therefore the electric current of TVS device can be greatly promoted under the premise of not increasing TVS device area using the utility model Ability, hoisting power, maximum surge current can be improved 50%~70%, and obtain excellent unidirectional rapid return characteristic, have pole Big application value.

(2) manufacturing process of the utility model is simple, and at most only needing three reticles, (positive N+, back side N+, front connect Contact hole), therefore have process flow shorter, control precision is high, high yield rate, the advantages such as at low cost.

The above descriptions are merely preferred embodiments of the present invention, not makees in any form to the utility model Limitation.Although the utility model has been used as preferred embodiment to announce as above, it is not intended to limit the utility model.

Claims

1. a kind of unidirectional TVS device of big surge, which is characterized in that including P type substrate silicon wafer, the front area N+, the back side area N+ is described P type substrate front side of silicon wafer is equipped with insulating medium layer, and front cathodic metal, the back side are drawn by contact hole by the front area N+ The area N+ and substrate P silicon wafer draw back anode metal simultaneously, so that the back side area N+ and substrate P silicon wafer are shorted.

2. the described unidirectional TVS device of big surge according to claim 1, which is characterized in that the contact hole window is than positive N+ Area is small.

3. according to the big unidirectional TVS device of surge described in claim 2, which is characterized in that the every side of contact hole is smaller by 5 than the positive area N+ ~12 μm.