CN207587737U - Triode - Google Patents
Triode Download PDFInfo
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- CN207587737U CN207587737U CN201721826624.4U CN201721826624U CN207587737U CN 207587737 U CN207587737 U CN 207587737U CN 201721826624 U CN201721826624 U CN 201721826624U CN 207587737 U CN207587737 U CN 207587737U
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- conduction type
- triode
- fairlead
- type
- doped region
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- 229910052751 metal Inorganic materials 0.000 claims abstract description 73
- 239000002184 metal Substances 0.000 claims abstract description 73
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 claims description 95
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 49
- 239000000758 substrate Substances 0.000 claims description 41
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 37
- 239000007788 liquid Substances 0.000 claims description 27
- 238000005260 corrosion Methods 0.000 claims description 20
- 230000007797 corrosion Effects 0.000 claims description 19
- 230000008859 change Effects 0.000 claims description 3
- 230000005611 electricity Effects 0.000 claims description 2
- 238000000034 method Methods 0.000 description 36
- 229910001415 sodium ion Inorganic materials 0.000 description 33
- 230000008569 process Effects 0.000 description 31
- FKNQFGJONOIPTF-UHFFFAOYSA-N Sodium cation Chemical compound [Na+] FKNQFGJONOIPTF-UHFFFAOYSA-N 0.000 description 23
- 238000000137 annealing Methods 0.000 description 19
- 238000002161 passivation Methods 0.000 description 19
- 238000004519 manufacturing process Methods 0.000 description 12
- 238000005530 etching Methods 0.000 description 9
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 8
- 239000013078 crystal Substances 0.000 description 8
- 229910052698 phosphorus Inorganic materials 0.000 description 8
- 239000011574 phosphorus Substances 0.000 description 8
- 230000009102 absorption Effects 0.000 description 6
- 238000010521 absorption reaction Methods 0.000 description 6
- 230000000903 blocking effect Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000003647 oxidation Effects 0.000 description 5
- 238000007254 oxidation reaction Methods 0.000 description 5
- 238000001259 photo etching Methods 0.000 description 5
- 230000015556 catabolic process Effects 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 230000006698 induction Effects 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- OOMSNAKIPQWBDX-UHFFFAOYSA-N [Si]=O.[P] Chemical compound [Si]=O.[P] OOMSNAKIPQWBDX-UHFFFAOYSA-N 0.000 description 2
- -1 boron ion Chemical class 0.000 description 2
- 230000001939 inductive effect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- AFCIMSXHQSIHQW-UHFFFAOYSA-N [O].[P] Chemical compound [O].[P] AFCIMSXHQSIHQW-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910001439 antimony ion Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000011734 sodium Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
The utility model provides a kind of triode, including dielectric layer, wherein, consistency close to the dielectric layer of the segment thickness of second conductive type epitaxial layer is higher than the consistency of the dielectric layer of the segment thickness far from second conductive type epitaxial layer, fairlead thus, it is possible to be formed in the dielectric layer is inclined-plane fairlead, the one end of the cross-sectional width of the fairlead from close to described second conductive type epitaxial layer one end to far from second conductive type epitaxial layer becomes larger, the most thin thickness that the inclined-plane fairlead can allow metal electrode to be covered at fairlead incline bench reaches more than the 70% of flat place.Further, good first metal electrode of fairlead Step Coverage, the second metal electrode and third metal electrode realize triode can steady operation under high current.
Description
Technical field
The utility model is related to technical field of integrated circuits, more particularly to a kind of triode.
Background technology
In the development of ic manufacturing technology, the Analogous Integrated Electronic Circuits of bipolar device composition is because of its high pressure, high-power
The characteristics of pipe, plays important role always.Bipolar device is commonly referred to as drawing containing collector, base stage, three end of emitter
NPN type triode and PNP type triode.Collector, base stage, emitter are briefly referred to as C, B, E；For in integrated circuit
For NPN type triode/PNP type triode, current collection is extremely made in N-type/P in the N-type in p-type/N-type substrate/p-type epitaxial layer
Type doped region, base stage are that p-type/n-type region of formation is adulterated in N-type/p-type epitaxial layer, transmitting heavy doping shape extremely in base area
Into N-type/p type island region；In addition, the contact jaw of p-type/N-type substrate is usually drawn in integrated circuits from epi-layer surface, usually will
The exit of substrate is referred to as S.
The most important electrical parameter that NPN type/PNP type triode has these related with pressure resistance：Collector when base area is hanging
Breakdown voltage BVcbo, base stage counter substrate of the collector to base stage when hanging to breakdown voltage BVceo, the emitter of emitter
Breakdown voltage Vbs, collector is to the breakdown voltage Vcs of substrate.When it is positive in use, the collector of NPN type triode always
High potential is connect, this requires that Vcs is sufficiently high.Vcs is up to 120V in usual bipolar integrated circuit circuit.
Usual bipolar integrated circuit needs certain driving load capacity, and most of high-power circuit is operated in 20V-50V
Between, the general 100mA-3A of driving force is relatively common.If circuit drives is inductive load, then the point of moment in work
Peak voltage is likely to be breached nearly twice of normal working voltage, easily by circuit burnout, to avoid burning at this time, it is necessary to use
High-tension circuit.For example a maximal work voltage is 60V and exports the high voltage integrated circuit with inductive load of 5A, power end
The burr of moment 120V can be generated, just needs the Vcs of NPN type/positive-negative-positive device that can bear the voltage for being more than 120V at this time.This
When can wish to accomplish Vcs on 140V, preferably up to 150V, corresponding Normal practice be increase N-type/p-type epitaxial layer resistance
Rate, while increase N-type/p-type collector and the horizontal spacing of p-type/N-type isolation, but easily made in this way because electrical resistivity of epitaxy increases
Into surface leakage so that less reliable；Becoming larger for lateral dimension increases chip area, increases manufacturing cost.
Moreover, it is well known that the pollutant for causing ic failure is mainly sodium ion (Na+), Na+ can be in chip list
Quickly movement causes device electrical parameter to drift about in the silica in face.It is in IC manufacturing usually to prevent the method that Na+ stains
It, in this way can be in the process using pure equipment and high resistant pure water, and in chip surface covering passivation layer protection chip interior
The contamination of overwhelming majority Na+ is eliminated, but still has less a part of Na+ to be present in chip interior, some shadows are caused to the performance of circuit
It rings.
Utility model content
The purpose of this utility model is to provide a kind of triode, to improve the pressure resistance of triode and quality.
Based on above-mentioned purpose, the utility model provides a kind of triode, and the triode includes：
First conductivity type substrate；
The second conductive type epitaxial layer in first conductivity type substrate；
The first conduction in second conductive type epitaxial layer is extended to from the second conductive type epitaxial layer surface
First doped region of type doping regions and the second conduction type；
Second in the first conduction type doped region is extended to from the first conduction type doped region surface
Second doped region of conduction type；
Dielectric layer on second conductive type epitaxial layer, close to the part of second conductive type epitaxial layer
The consistency of the dielectric layer of thickness is higher than the consistency of the dielectric layer of the segment thickness far from second conductive type epitaxial layer；
And
Fairlead, the fairlead extend to the second conductive type epitaxial layer surface from the dielectric layer surface.
Optionally, in the triode, the fairlead is inclined-plane fairlead, and the cross-sectional width of the fairlead is certainly
Become larger close to described second conductive type epitaxial layer one end to one end far from second conductive type epitaxial layer.
Optionally, in the triode, the dielectric layer includes being located on second conductive type epitaxial layer
Silicon oxide layer and the phosphorous dielectric layer on the silicon oxide layer.
Optionally, in the triode, the thickness of the silicon oxide layer is 1000 angstroms~2000 angstroms.
Optionally, in the triode, the phosphorous dielectric layer contains including being located at first on the silicon oxide layer
Phosphorus dielectric layer and the second phosphorous dielectric layer on the described first phosphorous dielectric layer, wherein, the first phosphorous dielectric layer
Consistency is higher than the consistency of the described second phosphorous dielectric layer.
Optionally, in the triode, the thickness of the first phosphorous dielectric layer is 3000 angstroms~5000 angstroms, described
The thickness of second phosphorous dielectric layer is 3000 angstroms~5000 angstroms.
Optionally, in the triode, corrosion rate of the first phosphorous dielectric layer in corrosive liquid is 600
The angstrom min of angstrom min~900, corrosion rate of the second phosphorous dielectric layer in corrosive liquid are 1000 angstrom min~2500
Angstrom min.
Optionally, in the triode, the corrosive liquid is HF and NH4The concentration ratio of F is 1:The corrosion of (4~8)
Liquid.
Optionally, in the triode, the fairlead includes：First fairlead, the second fairlead and third are drawn
String holes, the triode further include：First metal electrode, the second metal electrode and third metal electrode, wherein, first gold medal
Belong to electrode to connect with the second doped region of second conduction type by first fairlead, second metal electrode
It is connect by second fairlead with the first conduction type doped region, the third metal electrode passes through the third
Fairlead is connect with the first doped region of second conduction type.
Optionally, in the triode, the triode further includes the first conduction type divider wall, and described first leads
Electric type of isolation wall extends to the first conductivity type substrate surface from the second conductive type epitaxial layer surface.
Optionally, in the triode, the fairlead further includes the 4th fairlead, and the triode further includes
Four metal electrodes, the 4th metal electrode are connect by the 4th fairlead with the first conduction type divider wall.
Optionally, in the triode, the triode further includes covering first metal electrode, described second
Metal electrode, the third metal electrode, the 4th metal electrode and the phosphorous dielectric layer surface passivation layer.
Optionally, in the triode, first conduction type is p-type, and second conduction type is N
Type；Alternatively, first conduction type is N-type, and second conduction type is p-type.
Optionally, in the triode, the triode is further included positioned at the first conductivity type substrate surface
The second conduction type buried layer, wherein, second conductive type epitaxial layer covers the second conduction type buried layer.
Optionally, in the triode, the first doped region of second conduction type includes the second conductive-type
Deep first doped region of type and to extend to described second from the deep first doped region surface of second conduction type conductive
Second conductive-type of deep first doped region in deep first doped region of type and laterally beyond second conduction type
Shallow first doped region of type, wherein, the regional depth of deep first doped region of second conduction type is than described second
The regional depth of shallow first doped region of conduction type is big.
Optionally, in the triode, shallow first doped region of second conduction type is laterally beyond described
The cross-sectional width of the deep first doped region part of second conduction type is more than 0 μm and less than or equal to 8 μm.
Optionally, in the triode, the first conduction type doped region is conductive as base stage, described second
First doped region of type is as collector, and the second doped region of second conduction type is as emitter.
Optionally, in the triode, the thickness of second conductive type epitaxial layer is 10 microns~18 microns,
The resistivity of second conductive type epitaxial layer is the ohmcm of 4 ohmcms~10.
In triode provided by the utility model, in the dielectric layer, close to second conductive type epitaxial layer
The consistency of the dielectric layer of segment thickness is than the densification of the dielectric layer of the segment thickness far from second conductive type epitaxial layer
Degree is high, and the fairlead thus, it is possible to be formed in the dielectric layer is inclined-plane fairlead, and the cross-sectional width of the fairlead leans on certainly
Nearly described second conductive type epitaxial layer one end becomes larger to one end far from second conductive type epitaxial layer, and the inclined-plane draws
The most thin thickness that string holes can allow metal electrode to be covered at fairlead incline bench reaches more than the 70% of flat place.Further
, good first metal electrode of fairlead Step Coverage, the second metal electrode and third metal electrode realize triode can
Steady operation is under high current.
Further, the dielectric layer includes silicon oxide layer and the phosphorous dielectric layer on the silicon oxide layer, phosphorous
Dielectric layer is in addition to can be good at stopping Na+ ions, moreover it is possible to by a small amount of Na+ Ions Absorptions contained in the silicon oxide layer to containing
It is fixed in phosphorus dielectric layer, and Na+ ions is made to neutralize as electroneutral.Because the silicon oxide layer directly connects with the surface of triode
It touches, internal Na+ influences maximum to the Vcs of triode, is inhaled the Na+ in the silicon oxide layer by the phosphorous dielectric layer
It receives totally, and Na+ is fixed in the phosphorous dielectric layer, while Na+ is made to lose activity in electroneutral, it can be to avoid in three poles
The surface induction of pipe, which goes out charge, influences Vcs, so as to which the Vcs of triode that representative value is 120V is increased to 150 to 160V,
And the Na+ passed through in phosphorous dielectric layer blocking finished product application stains, so as to improve the quality of formed triode.Pass through institute
The inclined-plane fairlead stated the effect of the fixed Na+ of blocking absorption of phosphorous dielectric layer and formed improves formed triode
The ability of moment big voltage carrying capacity and steady operation under high current.
Description of the drawings
Fig. 1 is the structure diagram of the triode of the utility model embodiment；
Fig. 2 is the flow diagram of the manufacturing method of the triode of the utility model embodiment；
Fig. 3 to Fig. 6 is the integrated circuit structure formed in the manufacturing method of the triode of the utility model embodiment
Structure diagram.
Specific embodiment
Below in conjunction with the drawings and specific embodiments to the utility model proposes triode be described in further detail.According to
The advantages of explanation and claims below, the utility model and feature will become apparent from.It should be noted that attached drawing is using very
Simplified form and using non-accurate ratio, only to mesh that is convenient, lucidly aiding in illustrating the utility model embodiment
's.Particularly, the emphasis that each attached drawing needs are shown is different, often all employs different ratios.
It please refers to Fig.1, is the structure diagram of the triode of the utility model embodiment.As shown in Figure 1, three pole
Pipe includes：First conductivity type substrate 10；The second conductive type epitaxial layer 11 in first conductivity type substrate 10；
The first conduction type in second conductive type epitaxial layer 11 is extended to from 11 surface of the second conductive type epitaxial layer
First doped region 13 of 12 and second conduction type of doped region；Extend from 12 surface of the first conduction type doped region
The second conduction type doped region 14 into the first conduction type doped region 12；Outside second conduction type
Prolong the dielectric layer 15 on layer 11, close to the consistency ratio of the dielectric layer 15 of the segment thickness of second conductive type epitaxial layer 11
The consistency of the dielectric layer 15 of segment thickness far from second conductive type epitaxial layer 11 is high；And fairlead 19, it is described to draw
String holes 19 extends to 11 surface of the second conductive type epitaxial layer from 15 surface of dielectric layer.Wherein, the fairlead 19
For inclined-plane fairlead, the cross-sectional width of the fairlead 19 is from close described second conductive type epitaxial layer, 11 one end to far from institute
The one end for stating the second conductive type epitaxial layer 11 becomes larger.
Here, in the dielectric layer 15, close to the dielectric layer 15 of the segment thickness of second conductive type epitaxial layer 11
Consistency than far from second conductive type epitaxial layer 11 segment thickness dielectric layer 15 consistency it is high, thus, it is possible to
The fairlead 19 formed in the dielectric layer 15 is inclined-plane fairlead, and the cross-sectional width of the fairlead 19 is from close to described the
Two conductive type epitaxial layers, 11 one end becomes larger to one end far from second conductive type epitaxial layer 11, the inclined-plane fairlead
The 19 most thin thickness that metal electrode can be allowed to be covered at 19 incline bench of fairlead reach more than the 70% of flat place.Further
, good first metal electrode of 19 Step Coverage of fairlead, the second metal electrode and third metal electrode realize triode
Can steady operation under high current.
In the embodiment of the present application, first conduction type can be p-type, or N-type；Correspondingly, described
Two conduction types can be N-type, or p-type.Specifically, when first conduction type is p-type, described second is conductive
Type is N-type；When first conduction type is N-type, second conduction type is p-type.In the embodiment of the present application, with
First conduction type is p-type, and second conduction type is is described for N-type, that is, in the embodiment of the present application
In, the triode of formation is NPN type triode.
Wherein, the first conduction type doped region 12 is used as base stage, the first doped region of second conduction type
Domain 13 is used as collector, and the second doped region 14 of second conduction type is used as emitter.
In the embodiment of the present application, the resistivity of first conductivity type substrate 10 is the Europe of 1 ohmcm~20
Nurse centimetre.Further, first conductivity type substrate 10 is the first conduction type<111>Crystal orientation substrate first is led
Electric type<100>Crystal orientation substrate.The thickness of second conductive type epitaxial layer 11 is 10 microns~18 microns, and described second leads
The resistivity of electric type epitaxial layer 11 is the ohmcm of 4 ohmcms~10.Further, outside second conduction type
Prolong layer 11 as the second conduction type<111>Crystal orientation epitaxial layer or the second conduction type<100>Crystal orientation epitaxial layer.It is possible thereby into
One step improves the performance of formed triode.
Further, the triode further includes the second conduction type positioned at 10 surface of the first conductivity type substrate
Buried layer 17, wherein, second conductive type epitaxial layer 11 covers the second conduction type buried layer 17.
In the embodiment of the present application, the dielectric layer 15 includes the oxidation being located on second conductive type epitaxial layer 11
The silicon layer 15a and phosphorous dielectric layer 15b on the silicon oxide layer 15a.Phosphorous dielectric layer 15b is in addition to can be good at stopping
Na+ ions, moreover it is possible to will consolidate it in a small amount of Na+ Ions Absorptions to phosphorous dielectric layer 15b contained in the silicon oxide layer 15a
It is fixed, and Na+ ions is made to neutralize as electroneutral.Because the silicon oxide layer 15a is directly contacted with the surface of triode, internal Na
+ maximum is influenced on the Vcs of triode, the Na+ in the silicon oxide layer 15a is absorbed cleanly by the phosphorous dielectric layer 15b,
And Na+ is fixed in the phosphorous dielectric layer 15b, while Na+ is made to lose activity in electroneutral, it can be to avoid in triode
Surface induction, which goes out charge, influences Vcs, so as to which the Vcs of triode that representative value is 120V is increased to 150 to 160V, and lead to
The Na+ crossed in phosphorous dielectric layer 15b blockings finished product application stains, so as to improve the quality of formed triode.
Preferably, the thickness of the silicon oxide layer 15a is 1000 angstroms to 2000 angstroms.
Preferably, phosphorus content is 3%~8% in the phosphorous dielectric layer 15b, so as to reach splendid Na+ ions
Blocking and absorption fixed effect.Specifically, the phosphorous dielectric layer 15b is containing phosphor silicon oxide (PSG), the performance containing phosphor silicon oxide
It is stable, cheap, the quality of formed triode can be improved with relatively low manufacture cost.
Further, the phosphorous dielectric layer 15b includes the first phosphorous dielectric layer being formed on the silicon oxide layer 15a
150 and the second phosphorous dielectric layer 151 for being formed on the described first phosphorous dielectric layer 150, wherein, the first phosphorous dielectric layer
150 corrosion rate is lower than the corrosion rate of the described second phosphorous dielectric layer 151 namely the first phosphorous dielectric layer 150
Consistency is higher than the consistency of the described second phosphorous dielectric layer 151, so as to be easily formed inclined-plane fairlead.
Preferably, corrosion rate of the described first phosphorous dielectric layer 150 in corrosive liquid for 600 angstrom min~900 angstrom/
Minute, corrosion rate of the second phosphorous dielectric layer 151 in corrosive liquid is the angstrom min of 1000 angstrom mins~2500.Example
Such as, corrosion rate of the described first phosphorous dielectric layer 150 in corrosive liquid be 650 angstrom mins, the second phosphorous dielectric layer
151 corrosion rate in corrosive liquid is 1200 angstrom mins；For another example, corruption of the described first phosphorous dielectric layer 150 in corrosive liquid
Erosion rate is 800 angstrom mins, and corrosion rate of the second phosphorous dielectric layer 151 in corrosive liquid is 2000 angstrom mins etc..
Wherein, the corrosive liquid can select HF and NH4The concentration ratio of F is 1:The corrosive liquid of (4~8).For example, the corrosive liquid can be with
Select HF and NH4The concentration ratio of F is 1:4.5 corrosive liquid；For another example the corrosive liquid can select HF and NH4The concentration ratio of F is 1:
6 corrosive liquid etc..
In the embodiment of the present application, in order to avoid two layers phosphorous dielectric layer (i.e. described first phosphorous dielectric layer 150 and described
Second phosphorous dielectric layer 151) superposition after overall thickness it is too big so that the triode formed is larger.Preferably, described
The thickness of one phosphorous dielectric layer 150 is 3000 angstroms~5000 angstroms, the thickness of the second phosphorous dielectric layer 151 for 3000 angstroms~
5000 angstroms.Wherein, the thickness of the described first phosphorous dielectric layer 150 can be equal with the thickness of the described second phosphorous dielectric layer 151,
It can not also be equal.
In the embodiment of the present application, the thickness of the thickness of the silicon oxide layer 15a phosphorous dielectric layer 15b is small very
More, therefore, influence of the consistency/corrosion rate for the shape of fairlead 20 is smaller.Preferably, the silicon oxide layer 15a
The consistency phosphorous dielectric layer 15b consistency it is high.
Further, the fairlead 19 includes the first fairlead 190, the second fairlead 191 and third fairlead 192,
First fairlead 190, second fairlead 191 and the third fairlead 192 are from the phosphorous dielectric layer 15b tables
Face extends to 11 surface of the second conductive type epitaxial layer, first fairlead 190, second fairlead 191 and institute
It is inclined-plane fairlead to state third fairlead 192, wherein, first fairlead 190, second fairlead 191 and described
The cross-sectional width of third fairlead 192 is from conductive to separate described second close to described second conductive type epitaxial layer, 11 one end
One end of type epitaxial layer 11 becomes larger (herein namely first fairlead 190, second fairlead 191 and the third
Fairlead 192 is in funnel-form, first fairlead 190, second fairlead 191 and the third fairlead 192
Cross-sectional width becomes larger from bottom to top).
Wherein, first fairlead 190, second fairlead 191 and the third fairlead 192 can be by normal
The etching process of rule is formed.In the embodiment of the present application, since the corrosion rate of the described first phosphorous dielectric layer 150 is than described
The corrosion rate of two phosphorous dielectric layers 151 is low, and therefore, performing common etching process to the phosphorous dielectric layer 15b can shape
Into cross-sectional width from close described second conductive type epitaxial layer, 11 one end to separate second conductive type epitaxial layer 11
The first fairlead 190, the second fairlead 191 and the third fairlead 192 that one end becomes larger.
Please continue to refer to Fig. 1, in the embodiment of the present application, the triode further includes：First metal electrode 160, second
Metal electrode 161 and third metal electrode 162, wherein, first metal electrode 160 by first fairlead 190 with
Second doped region 14 of second conduction type connects, and second metal electrode 161 passes through second fairlead 191
It is connect with the first conduction type doped region 12, the third metal electrode 162 passes through the third fairlead 192 and institute
The first doped region 13 for stating the second conduction type connects.Due to first fairlead 190, second fairlead 191 and
The third fairlead 192 is inclined-plane fairlead, and the inclined-plane fairlead can allow metal electrode to be covered on incline bench
Most thin thickness reach more than the 70% of flat place, thus, it is possible to form that thickness is big, reliability is high the at fairlead step
One metal electrode 160, the second metal electrode 161 and third metal electrode 162 improve the electric current that formed triode is stablized
Ability.
Further, the triode further includes the first conduction type divider wall 18, the first conduction type divider wall
18 extend to 10 surface of the first conductivity type substrate from 11 surface of the second conductive type epitaxial layer.I.e. described first leads
Electric type of isolation wall 18 runs through second conductive type epitaxial layer 11.
The fairlead 19 further includes the 4th fairlead 193, and the triode further includes the 4th metal electrode 163；It is described
4th fairlead 193 extends to 11 surface of the second conductive type epitaxial layer from the phosphorous dielectric layer 15b surfaces, and described
Four fairleads 193 are inclined-plane fairlead, and the cross-sectional width of the 4th fairlead 193 is from close to the second conduction type extension
11 one end of layer become larger to one end far from second conductive type epitaxial layer 11；4th metal electrode 163 is by described
4th fairlead 193 is connect with the first conduction type divider wall 18.I.e. here, the phosphorous dielectric layer 15b and the oxygen
Be formed simultaneously in SiClx layer 15a first fairlead 190, second fairlead 191, the third fairlead 192 and
4th fairlead 193.
In the embodiment of the present application, the first doped region 13 of second conduction type includes the depth of the second conduction type
First doped region 130 and to extend to described second from deep first doped region, 130 surface of second conduction type conductive
Second of deep first doped region 130 in deep first doped region 130 of type and laterally beyond second conduction type
Shallow first doped region 131 of conduction type, wherein, the region of deep first doped region 130 of second conduction type is deep
Degree is bigger than the regional depth of shallow first doped region 131 of second conduction type.Preferably, second conduction type
Shallow first doped region 131 is laterally beyond the cross-sectional width of deep first doped region, 130 part of second conduction type
More than 0 μm and less than or equal to 8 μm.
Further, deep first doped region 130 of second conduction type is from the second conduction type extension 11
Surface is extended to 10 direction of the first conductivity type substrate to be connected with the second conduction type buried layer 17.Here, institute
State the surface of shallow first doped region 131 of the second conduction type and deep first doped region 130 of second conduction type
Surface for same surface (be herein deep first doped region 130 of second conduction type surface be entirely located in it is described
In the surface of shallow first doped region 131 of second conduction type), and all from 11 surface of the second conduction type extension to institute
State the extension of 10 direction of the first conductivity type substrate.Thus, it is possible to greatly improve the saturation voltage drop of formed triode.
Further, the triode further include covering first metal electrode 160, second metal electrode 161,
The passivation layer 20 of the third metal electrode 162, the 4th metal electrode 163 and the phosphorous dielectric layer 15b surfaces.Preferably
, the passivation layer 20 includes the second passivation layer 201 of the first passivation layer 200 and covering first passivation layer 200, i.e., described
Passivation layer 20 is multilayered structure, so as to improve the quality and reliability of the passivation layer 20.
Examining Vceo normal works, obtained parameter is as follows in the triode of the above structure of 60V：Vcs=160V,
Vcbo=150V, Vceo=80V, Vbs=80V；Area is made from it as 1200000um2Efferent duct can drive the electric current of 5A,
The triode is not damaged when steady operation exports 5A and superposition moment Vcs is more than 120V burrs.
Correspondingly, the present embodiment also provides a kind of manufacturing method of above-mentioned triode.It please refers to Fig.2, is that this practicality is new
The flow diagram of the manufacturing method of the triode of type embodiment.As shown in Fig. 2, the manufacturing method of the triode mainly includes
Following steps：
Step S30：First conductivity type substrate is provided；
Step S31：The second conductive type epitaxial layer is formed, it is conductive that second conductive type epitaxial layer is located at described first
In type substrates；
Step S32：Form the first doped region of the first conduction type doped region and the second conduction type, described first
First doped region of conduction type doped region and second conduction type is from the second conductive type epitaxial layer table
Face is extended in second conductive type epitaxial layer；
Step S33：Form the second doped region of the second conduction type, the second doped region of second conduction type
It is extended in the first conduction type doped region from the first conduction type doped region surface；
Step S34：Dielectric layer is formed, the dielectric layer is located on second conductive type epitaxial layer, and close described the
The consistency of the dielectric layer of the segment thickness of two conductive type epitaxial layers is than the part far from second conductive type epitaxial layer
The consistency of the dielectric layer of thickness is high；And
Step S35：Fairlead is formed, the fairlead is extended to from the dielectric layer surface outside second conduction type
Prolong layer surface.
Subsequently, Fig. 1 to Fig. 6 will be combined, specifically describes the manufacturing method of the triode of the utility model embodiment,
In, Fig. 3 to Fig. 6 is that the structure of the integrated circuit structure formed in the manufacturing method of the triode of the utility model embodiment is shown
It is intended to.
First, it please refers to Fig.3, in the embodiment of the present application, provides the first conductivity type substrate 10 first, described first leads
The resistivity of electric type substrates 10 is the ohmcm of 1 ohmcm~20；Further, first conductivity type substrate
10 be the first conduction type<111>Crystal orientation substrate or the first conduction type<100>Crystal orientation substrate.
Then, in the embodiment of the present application, photoetching and etching technics are performed to first conductivity type substrate 10, with dew
Go out the second conduction type buried region (being not shown in Fig. 3)；Doping and annealing are performed to the second conduction type buried region
Technique, to form the second conduction type buried layer 17.Specifically, can buffer first be performed to first conductivity type substrate 10
Skill；Then, one layer of thermal oxide layer (being not shown in Fig. 3) is formed on 10 surface of the first conductivity type substrate, wherein, the heat
The thickness of oxide layer can be 5000 angstroms~10000 angstroms；Then, using the thermal oxide layer as mask, to first conductive-type
Type substrate 10 performs photoetching and wet-etching technology, to form one second conduction type in first conductivity type substrate 10
Buried region；Followed by, can be used antimony ion to the second conduction type buried region perform doping process；And to doping after
The second conduction type buried region perform annealing process, so as to obtain the second conduction type buried layer 17.Here, due to lehr attendant
The influence of skill will form an oxide layer (being not shown in Fig. 3) on 10 surface of the first conductivity type substrate.
In the embodiment of the present application, further, continue to perform photoetching and etching to first conductivity type substrate 10
Technique forms second with the first divider wall 180 for forming the first conduction type namely in first conductivity type substrate 10
Before conductive type epitaxial layer 11, the first divider wall that first conductivity type substrate 10 forms the first conduction type is etched
180.Here, the first divider wall 180 of first conduction type is the one of the first conduction type divider wall 18 be subsequently formed
Part.
Then, the second conductive type epitaxial layer 11 is formed in first conductivity type substrate 10, i.e., described second leads
Electric type epitaxial layer 11 covers the first divider wall 180 of first conduction type and the second conduction type buried layer 17.
In the embodiment of the present application, the thickness of second conductive type epitaxial layer 11 is 10 microns~18 microns, second conductive-type
The resistivity of type epitaxial layer 11 is the ohmcm of 4 ohmcms~10.Further, second conductive type epitaxial layer
11 be the second conduction type<111>Crystal orientation epitaxial layer or the second conduction type<100>Crystal orientation epitaxial layer.
In the embodiment of the present application, after second conductive type epitaxial layer 11 is formed, also in the described second conduction
11 surface of type epitaxial layer forms a thermal oxide layer (being not shown in Fig. 3), convenient for subsequent execution doping process and improves follow-up
The quality and reliability of doping process.
It please refers to Fig.4, in the embodiment of the present application, then, second is performed to second conductive type epitaxial layer 11 and is led
Electric type doping and annealing process, to form deep first doped region 130 of the second conduction type, second conduction type
Deep first doped region 130 is close to the interior side side of the second conduction type buried layer 17.Here, second conduction type
Deep first doped region 130 be the second conduction type being subsequently formed the first doped region 130 a part.Here, institute
Deep first doped region 130 of the second conduction type is stated from 11 surface of the second conduction type extension to first conductive-type
10 direction of type substrate is extended to connect with the second conduction type buried layer 17, to improve finally formed integrated circuit triode
Saturation voltage drop.Likewise, when performing annealing process, one layer of thermal oxide layer will be formed simultaneously.
Then, the doping of the first conduction type and annealing process are performed to second conductive type epitaxial layer 11, in institute
State the second divider wall 181 that the first conduction type is formed on the first divider wall 180 of the first conduction type, first conductive-type
First divider wall of second divider wall 181 of type from 11 surface of the second conduction type extension to first conduction type
180 directions extend, and are connected with the first divider wall 180 of first conduction type, to form the first conduction type divider wall
18.I.e. described first conduction type divider wall 18 includes the first divider wall 180 of the first conduction type and is led positioned at described first
Second divider wall 181 of the first conduction type on the first divider wall 180 of electric type, wherein, first conduction type
First divider wall 180 is formed before the second conductive type epitaxial layer is formed, the second divider wall 181 of first conduction type
It is formed after the second conductive type epitaxial layer is formed.Here, the first conduction type divider wall 18 includes upper and lower two layers of knot
Structure (i.e. the first divider wall 180 of the first conduction type and the second divider wall 181 of the first conduction type).
In the embodiment of the present application, the thermal oxide layer then formed in the technical process such as removal annealing, exposes described second
The surface of conductive type epitaxial layer 11；Then layer of oxide layer is formed on 11 surface of the second conductive type epitaxial layer (i.e. again
Form one layer of undoped oxide layer, hereon referred to as the first oxide layer), in order to subsequent execution doping process and improve follow-up
The quality and reliability of doping process.Wherein, the oxide layer can be formed by thermal oxidation technology, and thickness is preferably 600 angstroms
~1000 angstroms.
Fig. 5 is please referred to, in the embodiment of the present application, it is conductive that first then is performed to second conductive type epitaxial layer 11
Type is adulterated and annealing process, to form the first conduction type doped region on 11 surface of the second conductive type epitaxial layer
12.Specifically, one open area of photoetching and etching technics formation can be first passed through, ion implanting then is performed to the open area
And annealing process, so as to form the first conduction type doped region 12, wherein, boron ion may be selected in injection ion.Wherein, in shape
It is covered in entire second into (mainly due to annealing process), will be formed simultaneously during the first conduction type doped region 12 and leads
One oxide layer (referred to here as the second oxide layer) on electric 11 surface of type epitaxial layer, the thickness of the oxide layer usually 5000 angstroms~
8000 angstroms.
Please continue to refer to Fig. 5, the doping of the second conduction type is then performed to second conductive type epitaxial layer 11 and is moved back
Ignition technique.It in the embodiment of the present application, will be in second conductive-type by second conduction type doping and annealing process
Shallow first doped region 131 of the second conduction type is formed in type epitaxial layer 11 and positioned at the first conduction type doped region 12
Second doped region 14 of the second internal conduction type.Wherein, the Doped ions can be phosphonium ion, and doping way can be with
The mode in source is carried for liquid.Second doped region 14 of second conduction type is from the first conduction type doped region
12 surfaces are extended in the first conduction type doped region 12.
I.e. here, the first doped region 13 of the second conduction type includes deep first doped region of the second conduction type
130 and second conduction type shallow first doped region 131, wherein, by the second conduction type twice doping and annealing process,
Form respectively deep first doped region 130 of the second conduction type and shallow first doped region 131 of the second conduction type, institute
Shallow first doped region 131 for stating the second conduction type prolongs from deep first doped region, 130 surface of second conduction type
It extends in deep first doped region 130 of second conduction type and deep first laterally beyond second conduction type mixes
Miscellaneous region 130, and the regional depth of deep first doped region 130 of second conduction type is than second conduction type
Shallow first doped region 131 regional depth it is big.Preferably, shallow first doped region 131 of second conduction type is horizontal
Cross-sectional width to deep first doped region, 130 part beyond second conduction type is more than 0 μm and less than or equal to 8 μ
m。
The collector of integrated circuit triode, base stage and emitter have been formed as a result, wherein, first conductive-type
Type doped region 12 is used as base stage, the first doped region 13 of second conduction type (deep the including the second conduction type
Shallow first doped region 131 of one doped region 130 and the second conduction type) as collector, second conduction type
Second doped region 14 is used as emitter.
Likewise, in the second doping for forming 131 and second conduction type of shallow first doped region of the second conduction type
It, will be with oxide layer (the referred to here as third for forming one layer of entire second conduction type extension 11 of covering during region 14
Oxide layer).In the embodiment of the present application, in order to improve the quality and reliability of integrated circuit triode being subsequently formed, first lead to
Super-corrosion process remove 11 surface of the second conductive type epitaxial layer oxide layer (i.e. the first oxide layer, the second oxide layer and
The summation of third oxide layer, hereon referred to as have oxide layer) one layer of top, i.e., member-retaining portion thickness oxide layer (i.e. have
Oxide layer), specifically, the thickness retained can be 2000 angstroms~3000 angstroms, wherein, hydrofluoric acid solution reality can be selected in etching process
It is existing；Then, layer of oxide layer being grown by thermal oxidation technology, the oxidated layer thickness newly grown is preferably 2500 angstroms~5000 angstroms,
The quality of oxide layer not only ensure that by the oxide layer of the new growth, while be also possible that the first conduction type doping
Second doped region, 14 surface in region 12, the first doped region 13 of second conduction type and second conduction type
Oxidated layer thickness it is identical, that is, improve the planarization of device surface.In the embodiment of the present application, then again to oxide layer (i.e.
The oxide layer and the summation of existing oxide layer newly grown) etching process is performed, the oxide layer for removing segment thickness (is newly grown
The summation of oxide layer and existing oxide layer), the oxide layer of member-retaining portion thickness (retains here, forming silicon oxide layer 15a
Segment thickness oxide layer), it is preferred that the thickness of the silicon oxide layer 15a be 1000 angstroms~2000 angstroms.Usually contain phosphorus oxidation
Layer stress and doping reason, it is impossible to be in direct contact with silicon, therefore will be subsequently formed by the silicon oxide layer 15a containing phosphorus oxygen
Change layer 15b to be spaced apart with second conductive type epitaxial layer 11, the relatively thin silicon oxide layer 15a is conducive to what is be subsequently formed
Phosphorous oxide layer 15b absorbs cleanly the sodium ion contained in the silicon oxide layer 15a.
Please continue to refer to Fig. 5, phosphorous oxide layer 15b is then formed on the silicon oxide layer 15a.
In the embodiment of the present application, phosphorous oxide layer 15b is formed on the silicon oxide layer 15a to specifically include：Described
One layer of phosphorous silica is deposited on silicon oxide layer 15a；Density annealing process is performed to the phosphorous silica, to form the
One phosphorous oxide layer 150；Wherein, the temperature of the density annealing process is 900 DEG C~1000 DEG C, and the density annealing process makes
Gas includes hydrogen and oxygen.Preferably, phosphorus content is 3%~8% in the described first phosphorous oxide layer 150, thickness
It is 3000 angstroms~5000 angstroms.Preferably, corrosion rate of the first phosphorous oxide layer 150 in corrosive liquid is 600 angstrom mins
~900 angstrom mins, wherein, the corrosive liquid can be HF and NH4The concentration ratio of F is 1:The corrosive liquid of (4~8).
In the embodiment of the present application, phosphorous oxide layer 15b is formed on the silicon oxide layer 15a specifically to further include：Institute
State one layer of phosphorous silica of deposit in the first phosphorous oxide layer 150；Density annealing process is performed to the phosphorous silica,
To form the second phosphorous oxide layer 151；Wherein, the temperature of the density annealing process is 700 DEG C~900 DEG C, and the density is moved back
The gas that ignition technique uses includes hydrogen and oxygen.Preferably, in the described second phosphorous oxide layer 151 phosphorus content for 3%~
8%, thickness is 3000 angstroms~5000 angstroms.Preferably, corrosion rate of the second phosphorous oxide layer 151 in corrosive liquid is
The angstrom min of 1000 angstrom mins~2500, wherein, the corrosive liquid can be HF and NH4The concentration ratio of F is 1:The corruption of (4~8)
Lose liquid.The corrosion rate of i.e. described first phosphorous oxide layer 150 is lower than the corrosion rate of the described second phosphorous oxide layer 151.
Fig. 6 is please referred to, it is then (phosphorous including the first phosphorous oxide layer 150 and second herein to the phosphorous oxide layer 15b
Oxide layer 151) and the silicon oxide layer 15a (being herein collectively referred to as dielectric layer 15) execution etching process, to contain phosphorus oxidation described
The first fairlead 190, the second fairlead 191, third fairlead 192 and the 4th are formed in the layer 15b and silicon oxide layer 15a to draw
String holes 193, first fairlead 190, second fairlead 191,192 and the 4th fairlead 193 of the third fairlead
It is inclined-plane fairlead, wherein, first fairlead 190, second fairlead 191, the third fairlead 192 and
The cross-sectional width of four fairleads 193 is from close described second conductive type epitaxial layer, 11 one end to far from second conductive-type
One end of type epitaxial layer 11 becomes larger.
Then, a metal layer is sputtered on the phosphorous oxide layer 15b, is specifically as follows aluminum metal layer, according to work electricity
The size of stream, thickness are preferably 1.5 microns~2.5 microns.Then, photoetching and etching technics are performed to the metal layer, with
The first metal electrode 160, the second metal electrode 161,162 and the 4th metal electrode 163 of third metal electrode are formed, wherein, institute
It states the first metal electrode 160 to connect with the second doped region 14 of second conduction type by first fairlead, institute
It states the second metal electrode 161 to connect with the first conduction type doped region 12 by second fairlead, the third
Metal electrode 162 is connect by the third fairlead with the first doped region 13 of second conduction type, and the described 4th
Metal electrode 163 is connect by the 4th fairlead with the first conduction type divider wall 18.Here, first metal
Electrode 160, second metal electrode 161, the third metal electrode 162 and the 4th metal electrode 163 have larger
Thickness and higher reliability, improve formed integrated circuit triode transient voltage ability to bear.
It please refers to Fig.1, then, forms passivation layer 20, the passivation layer 20 covers first metal electrode 160, described
Second metal electrode 161, the third metal electrode 162, the 4th metal electrode 163 and the phosphorous oxide layer 15b tables
Face.Preferably, the passivation layer 20 is formed by multistep film-forming process, here, the passivation layer 20 includes the first passivation layer 200
And the second passivation layer 201 of covering first passivation layer 200, the passivation layer 20 is multilayered structure, described so as to improve
The quality and reliability of passivation layer 20.Specifically, the passivation layer can be mixed by fine and close silica material and silicon nitride material
It closes and is formed.In the embodiment of the present application, annealing process can be also further performed, to improve the quality of formed structure, wherein,
The gas of the annealing process can be the mixed gas of nitrogen and hydrogen, the temperature of the annealing process can be 360 DEG C~
480℃。
To sum up, it in the triode and its manufacturing method that are provided in the utility model embodiment, in the dielectric layer, leans on
The consistency ratio of the dielectric layer of the segment thickness of nearly second conductive type epitaxial layer is far from the second conduction type extension
The consistency of the dielectric layer of the segment thickness of layer is high, and the fairlead thus, it is possible to be formed in the dielectric layer is inclined-plane lead
Hole, the cross-sectional width of the fairlead is from close described second conductive type epitaxial layer one end to far from second conduction type
One end of epitaxial layer becomes larger, and the inclined-plane fairlead can allow the most thin thickness that metal electrode covers at fairlead incline bench
Reach more than 70% flat place.Further, good first metal electrode of fairlead Step Coverage, the second metal electrode and
Third metal electrode realize triode can steady operation under high current.
Further, the dielectric layer includes silicon oxide layer and the phosphorous dielectric layer on the silicon oxide layer, phosphorous
Dielectric layer is in addition to can be good at stopping Na+ ions, moreover it is possible to by a small amount of Na+ Ions Absorptions contained in the silicon oxide layer to containing
It is fixed in phosphorus dielectric layer, and Na+ ions is made to neutralize as electroneutral.Because the silicon oxide layer directly connects with the surface of triode
It touches, internal Na+ influences maximum to the Vcs of triode, is inhaled the Na+ in the silicon oxide layer by the phosphorous dielectric layer
It receives totally, and Na+ is fixed in the phosphorous dielectric layer, while Na+ is made to lose activity in electroneutral, it can be to avoid in three poles
The surface induction of pipe, which goes out charge, influences Vcs, so as to which the Vcs of triode that representative value is 120V is increased to 150 to 160V,
And the Na+ passed through in phosphorous dielectric layer blocking finished product application stains, so as to improve the quality of formed triode.Pass through institute
The inclined-plane fairlead stated the effect of the fixed Na+ of blocking absorption of phosphorous dielectric layer and formed improves formed triode
The ability of moment big voltage carrying capacity and steady operation under high current.
Foregoing description is only the description to the utility model preferred embodiment, not to any limit of the scope of the utility model
Calmly, any change, the modification that the those of ordinary skill in the utility model field does according to the disclosure above content, belonging to right will
Seek the protection domain of book.
Claims (18)
1. a kind of triode, which is characterized in that the triode includes：
First conductivity type substrate；
The second conductive type epitaxial layer in first conductivity type substrate；
The first conduction type in second conductive type epitaxial layer is extended to from the second conductive type epitaxial layer surface
First doped region of doped region and the second conduction type；
The second conduction in the first conduction type doped region is extended to from the first conduction type doped region surface
Second doped region of type；
Dielectric layer on second conductive type epitaxial layer, close to the segment thickness of second conductive type epitaxial layer
Dielectric layer consistency than far from second conductive type epitaxial layer segment thickness dielectric layer consistency it is high；And
Fairlead, the fairlead extend to the second conductive type epitaxial layer surface from the dielectric layer surface.
2. triode as described in claim 1, which is characterized in that the fairlead is inclined-plane fairlead, the fairlead
The one end of cross-sectional width from close to described second conductive type epitaxial layer one end to far from second conductive type epitaxial layer becomes
Greatly.
3. triode as claimed in claim 2, which is characterized in that the dielectric layer includes being located at outside second conduction type
Prolong the silicon oxide layer on layer and the phosphorous dielectric layer on the silicon oxide layer.
4. triode as claimed in claim 3, which is characterized in that the thickness of the silicon oxide layer is 1000 angstroms~2000 angstroms.
5. triode as claimed in claim 3, which is characterized in that the phosphorous dielectric layer includes being located on the silicon oxide layer
The first phosphorous dielectric layer and the second phosphorous dielectric layer on the described first phosphorous dielectric layer, wherein, described first is phosphorous
The consistency of dielectric layer is higher than the consistency of the described second phosphorous dielectric layer.
6. triode as claimed in claim 5, which is characterized in that the thickness of the first phosphorous dielectric layer for 3000 angstroms~
5000 angstroms, the thickness of the second phosphorous dielectric layer is 3000 angstroms~5000 angstroms.
7. triode as claimed in claim 5, which is characterized in that corrosion speed of the first phosphorous dielectric layer in corrosive liquid
Rate is the angstrom min of 600 angstrom mins~900, and corrosion rate of the second phosphorous dielectric layer in corrosive liquid is 1000 A/min
The angstrom min of clock~2500.
8. triode as claimed in claim 7, which is characterized in that the corrosive liquid is HF and NH4The concentration ratio of F is 1:(4~
8) corrosive liquid.
9. triode as claimed in claim 2, which is characterized in that the fairlead includes：First fairlead, the second fairlead
And third fairlead, the triode further include：First metal electrode, the second metal electrode and third metal electrode, wherein, institute
It states the first metal electrode to connect with the second doped region of second conduction type by first fairlead, described second
Metal electrode is connect by second fairlead with the first conduction type doped region, and the third metal electrode passes through
The third fairlead is connect with the first doped region of second conduction type.
10. triode as claimed in claim 9, which is characterized in that the triode further includes the first conduction type divider wall,
The first conduction type divider wall extends to first conductivity type substrate from the second conductive type epitaxial layer surface
Surface.
11. triode as claimed in claim 10, which is characterized in that the fairlead further includes the 4th fairlead, and described three
Pole pipe further includes the 4th metal electrode, the 4th metal electrode by the 4th fairlead and first conduction type every
It is connected from wall.
12. triode as claimed in claim 11, which is characterized in that the triode further includes covering the first metal electricity
Pole, second metal electrode, the third metal electrode, the 4th metal electrode and the phosphorous dielectric layer surface it is blunt
Change layer.
13. the triode as described in any one of claim 1~12, which is characterized in that first conduction type is p-type,
And second conduction type is N-type；Alternatively, first conduction type is N-type, and second conduction type is p-type.
14. the triode as described in any one of claim 1~12, which is characterized in that the triode is further included positioned at institute
The second conduction type buried layer on the first conductivity type substrate surface is stated, wherein, described in the second conductive type epitaxial layer covering
Second conduction type buried layer.
15. the triode as described in any one of claim 1~12, which is characterized in that the first of second conduction type
Deep first doped region and deep first doped region from second conduction type that doped region includes the second conduction type
Surface extends in deep first doped region of second conduction type and laterally beyond deep the of second conduction type
Shallow first doped region of second conduction type of one doped region, wherein, deep first doped region of second conduction type
The regional depth in domain is bigger than the regional depth of shallow first doped region of second conduction type.
16. triode as claimed in claim 15, which is characterized in that shallow first doped region of second conduction type is horizontal
Cross-sectional width to the deep first doped region part beyond second conduction type is more than 0 μm and less than or equal to 8 μm.
17. the triode as described in any one of claim 1~12, which is characterized in that the first conduction type doped region
It is mixed as base stage, the first doped region of second conduction type as collector, the second of second conduction type in domain
Miscellaneous region is as emitter.
18. the triode as described in any one of claim 1~12, which is characterized in that second conductive type epitaxial layer
Thickness for 10 microns~18 microns, the resistivity of second conductive type epitaxial layer is 4 ohmcm~10 ohm
Centimetre.
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| CN109962103B (en) * | 2017-12-22 | 2023-12-22 | 杭州士兰微电子股份有限公司 | Triode and manufacturing method thereof |
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