CN103441125B - A kind of surge protection circuit based on bidirectional thyristor and manufacture method thereof - Google Patents
A kind of surge protection circuit based on bidirectional thyristor and manufacture method thereof Download PDFInfo
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Abstract
The present invention relates to electronic circuit and semiconductor technology, relate to a kind of surge protection circuit based on bidirectional thyristor specifically.A kind of surge protection circuit based on bidirectional thyristor of the present invention; it is characterized in that; comprise bidirectional thyristor, NPN type triode and PNP type triode; the emitter of described NPN type triode is connected with the P type door of bidirectional thyristor, base stage draws the first electrode; the emitter of described PNP type triode is connected with the N-type door of bidirectional thyristor, base stage draws the second electrode, and the collector electrode of third electrode, the other end and NPN type triode and the equal ground connection of collector electrode of PNP type triode are drawn in one end of described bidirectional thyristor.Beneficial effect of the present invention is, can realize the surge protection two-way able to programme to single line, can reduce chip area greatly simultaneously, thus reduces production cost.The present invention is particularly useful for surge protection circuit.
Description
Technical field
The present invention relates to electronic circuit and semiconductor technology, relate to a kind of surge protection circuit based on bidirectional thyristor specifically.
Background technology
Electronic circuit in use often can meet with the impact of the surge current that voltage transient is formed, and this even causes the damage of electronic circuit system by having a negative impact to the normal work of whole circuit.The source of surge mainly contains: the electric discharge in inductive load voltage transient, static discharge, thunder discharge, cloud layer or between cloud layer.In order to prevent the surge voltage of transition to the impact of whole Circuits System, improve the reliability of electronic system, surge protection becomes the problem that modem electronic circuitry must be considered.Thyristor-type surge protection circuit has accurate conducting, unlimited to repeat, voltage range wide (a few volt is to several kilovolts) and the quick superior function responding (ns level), is thus widely used in the protection of electric and electronic technical field, the communications field and various electronic circuit.
Common thyristor-type surge protection circuit as depicted in figs. 1 and 2, Fig. 1 is bi-directional two-wire programmable surge protection circuit, this circuit structure can set surge protection scope by the magnitude of voltage arranging electrode G1 and electrode G2 of programming, when there is forward (negative sense) surge in Line end, pnp (npn) triode ON, transistor emitter current trigger turn on thyristors, thus surge current of releasing, realize to circuit surge protection; Figure 2 shows that two-path bidirectional programmable surge protection circuit, during use, this circuit in parallel is needing the circuit two ends of protection, K1, K2 occur positive be greater than about 0.7V overvoltage time, diode current flow, by the voltage clamping of K1, K2 electrode at 0.7V, surge current of simultaneously releasing; K1, K2 occur negative be about the overvoltage of 0.7V lower than G terminal voltage time, Npn triode conducting, its emitter current triggers the conducting of p-type p gate thyristor, thus surge current of releasing, by the magnitude of voltage of programming setting G electrode, the voltage range of negative sense carrying out surge protection can be set.Therefore existing protective circuit is enough large in order to ensure surge current relieving capacity, there is the problem that surge protection circuit chip area is larger, is unfavorable for the current demand for circuit miniaturization, economization.
Summary of the invention
Technical problem to be solved by this invention, is exactly for the larger problem of current surge protection circuit chip area, proposes a kind of surge protection circuit based on bidirectional thyristor and manufacture method thereof.
The present invention solves the problems of the technologies described above adopted technical scheme: a kind of surge protection circuit based on bidirectional thyristor, it is characterized in that, comprise bidirectional thyristor, NPN type triode and PNP type triode, the emitter of described NPN type triode is connected with the P type door of bidirectional thyristor, base stage draws the first electrode, the emitter of described PNP type triode is connected with the N-type door of bidirectional thyristor, base stage draws the second electrode, third electrode is drawn in one end of described bidirectional thyristor, the collector electrode of the other end and NPN type triode and the equal ground connection of the collector electrode of PNP type triode.
Concrete, described bidirectional thyristor comprises the first N type semiconductor substrate 3, one end of described first N type semiconductor substrate 3 is provided with a P trap 4 and N-type diffuser ring 5, described N-type diffuser ring 5 is a pair and is separately positioned on the both sides of a P trap 4, a N trap 7 and P type gate pole 6 is formed in a described P trap 4, described P type gate pole 6 is arranged on the left side of a N trap 7, the 2nd P trap 9 and N-type gate pole 8 is formed in a described N trap 7, described N-type gate pole 8 is arranged on the right side of the 2nd P trap 9, injected by N-type in described 2nd P trap 9 and form short circuit hole 10, third electrode 2 is drawn on described 2nd P trap 9 surface, the other end of described first N type semiconductor substrate 3 is provided with a multiple alternate P district 11 and a N district 12.
Concrete, described NPN type triode comprises the second N type semiconductor substrate 13, one end of described second N type semiconductor substrate 13 is provided with the 3rd P trap 14, described 3rd P trap 14 comprises the first emitter region 15 and the first base 16, described first emitter region 15 is connected with P type gate pole 6, the first electrode 17 is drawn in described first base 16, the other end of described second N type semiconductor substrate 13 diffuses to form the first collector area 19 by N-type, described second N type semiconductor substrate 13 also comprises the 2nd P district 18, described 2nd P district 18 connects one end and the other end of the second N type semiconductor substrate 13.
Concrete, described PNP type triode comprises the 3rd N type semiconductor substrate 20, one end of described 3rd N type semiconductor substrate 20 is provided with the 4th P trap 21, described 4th P trap 21 is the second emitter region, be connected with N-type gate pole 8, the right side of described 4th P trap diffuses to form the second base 22 by N-type, the second electrode 25 is drawn in described second base 22, the other end of described 3rd N type semiconductor substrate 20 diffuses to form the second collector area 23 by P type, described 3rd N type semiconductor substrate 20 also comprises the 3rd P district 24, described 3rd P district 24 connects one end and the other end of the 3rd N type semiconductor substrate 20, described first electrode 17, third electrode 2 and the second electrode 25 are separated by oxide layer 1.
Based on a manufacture method for the surge protection circuit of bidirectional thyristor, it is characterized in that, comprising:
The first step: select thick 300 μm of sheet, the monocrystalline silicon piece of resistivity 15 ~ 25 Ω cm, stand-by after mark cleaning, oven dry;
Second step: the monocrystalline silicon piece obtained in the first step is carried out the process of silicon chip surface growth field oxide, carry out first time photoetching, be specially the dual surface lithography in isolated area the 2nd P district 18 and the 3rd P district 24, then carry out the boron diffusion of two-sided isolated area, the two matter diffusion of boron-aluminium or the two matter diffusion of gallium-aluminium;
3rd step: carry out second time photoetching and
thethird photo etching, then carry out a P trap 4, a P district 11 boron diffusion, diffusion conditions is: pre-deposited temperature 1050 DEG C ~ 1060 DEG C, time 5h, then districution temperature 1250 DEG C, time 20h ~ 25h, O
2flow is 700mL/min, N
2flow is 300mL/min;
4th step: carry out four mask, then carry out a N trap 7 phosphorus diffusion, condition is: pre-deposited temperature 980 DEG C ~ 1020 DEG C, O
2flow 200mL/min, N
2flow is 700mL/min, time 2 ~ 3h, then distribution occasion is temperature 1300 DEG C ~ 1310 DEG C, time 18h ~ 20h, O
2flow is 500mL/min, N
2flow is 700mL/min;
5th step: carry out the 5th photoetching, then carry out the 2nd P trap 9, NPN triode base 14, PNP triode emitter region 21 boron ion implantation, ion implanting conditions is: dosage 5e14cm
-2, energy 80KeV, then distribution occasion is temperature 1250 DEG C, time 10h ~ 15h, O
2flow is 700mL/min, N
2flow is 300mL/min;
6th step: carry out the 6th photoetching, then carry out gate pole short circuit hole 10N type ion implantation, ion implanting conditions is: dosage 1e15cm
-2, energy 50KeV, then distribution occasion is temperature 1310 DEG C, time 8h ~ 12h, O
2flow is 700mL/min, N
2flow is 300mL/min;
7th step: carry out the 7th photoetching, carry out P type gate pole 6 district, front, NPN triode base 16 contact lithograph, carry out the 8th photoetching, carry out the PNP triode back side second collector area 23 photoetching, carry out boron ion implantation, injection condition is: dosage 5e14cm
-2, energy 50KeV, then distribution occasion is temperature 1250 DEG C, time 2h ~ 4h, O
2flow is 700mL/min, N
2flow is 300mL/min;
8th step: carry out the 9th photoetching, carry out N-type gate pole 8 district, front, PNP triode base 22 contacts, N-type diffuser ring 5 photoetching, carry out the tenth photoetching, carry out N district 12 photoetching, carry out phosphonium ion injection, injection condition is: dosage 5e15cm
-2, energy 60KeV, then distribution occasion is temperature 1310 DEG C, time 3h ~ 5h, O
2flow is 500mL/min, N
2flow is 700mL/min;
9th step: carry out the ten photoetching, etch contact hole;
Tenth step: carry out evaporation of metal, the 12 photoetching and anti-carve aluminium;
11 step: adopt alloy technique to process the device obtained in the tenth step, condition: furnace temperature 550 DEG C, vacuum degree 10
-3pa, time 10 ~ 30min, passivation;
12 step: carry out the tenth third photo etching, etch pressure welding point;
13 step: process annealing, temperature 500 DEG C ~ 510 DEG C, constant temperature 10min;
14 step: silicon chip preliminary survey, cut, shelve, sinter, packaging and testing.
Concrete, for carrying out the two matter diffusion of gallium-aluminium after photoetching described in second step, specifically comprise the following steps:
A. the silica colloidal source of being prepared by aluminum nitrate is evenly coated at silicon chip tow sides, thickness
after preliminary drying, silicon chip is pushed diffusion furnace flat-temperature zone, at 1300 DEG C ~ 1310 DEG C, N
2the lower pre-deposited 8h ~ 10h of protection,
B. carry out Ga pre-deposited, Ga source is Ga
2o
3powder, deposition conditions is: sheet temperature is 1250 DEG C ~ 1260 DEG C, and source temperature is 980 DEG C ~ 1000 DEG C, H
2flow 200 ~ 300mL/min, N
2flow is 80 ~ 100mL/min, TongYuan time 60 ~ 80min;
C. at 1330 DEG C, N
2carry out dopant redistribution 50 ~ 55h under protection, below 400 DEG C, take out silicon chip.
Beneficial effect of the present invention is, can realize the surge protection two-way able to programme to single line, can reduce chip area greatly simultaneously, thus reduces production cost.
Accompanying drawing explanation
Fig. 1 is the common surge protection circuit structural representation based on thyristor;
Fig. 2 is the another kind of common surge protection circuit structural representation based on thyristor;
Fig. 3 is the surge protection circuit equivalent structure schematic diagram based on bidirectional thyristor of the present invention;
Fig. 4 is the generalized section of the surge protection circuit based on bidirectional thyristor of the present invention;
Fig. 5 is a photo mask board schematic diagram of surge protection circuit manufacture method of the present invention;
Fig. 6 is the secondary photo mask board schematic diagram of surge protection circuit manufacture method of the present invention;
Fig. 7 is the third photo etching mask plate schematic diagram of surge protection circuit manufacture method of the present invention;
Fig. 8 is the four mask mask plate schematic diagram of surge protection circuit manufacture method of the present invention;
Fig. 9 is five photo mask board schematic diagrames of surge protection circuit manufacture method of the present invention;
Figure 10 is six photo mask board schematic diagrames of surge protection circuit manufacture method of the present invention;
Figure 11 is seven photo mask board schematic diagrames of surge protection circuit manufacture method of the present invention;
Figure 12 is eight photo mask board schematic diagrames of surge protection circuit manufacture method of the present invention;
Figure 13 is nine photo mask board schematic diagrames of surge protection circuit manufacture method of the present invention;
Figure 14 is ten photo mask board schematic diagrames of surge protection circuit manufacture method of the present invention;
Figure 15 is ten photo mask board schematic diagrames of surge protection circuit manufacture method of the present invention;
Figure 16 is 12 photo mask board schematic diagrames of surge protection circuit manufacture method of the present invention;
Figure 17 is ten third photo etching mask plate schematic diagrames of surge protection circuit manufacture method of the present invention.
Embodiment
Below in conjunction with drawings and Examples, describe technical scheme of the present invention in detail:
Bidirectional thyristor has two kinds of gate poles, externally draws three electrodes, is equivalent to the reverse parallel connection of two unidirectional thyristors, as long as add a trigger impulse on the gate pole of thyristor, no matter what polarity this pulse is, can makes bidirectional thyristor conducting.
As shown in Figure 1, for the schematic equivalent circuit of the surge protection circuit based on thyristor of the present invention, comprise bidirectional thyristor, NPN type triode and PNP type triode, the emitter of NPN type triode is connected with the P type door of bidirectional thyristor, base stage draws the first electrode G1, the emitter of PNP type triode is connected with the N-type door of bidirectional thyristor, base stage draws the second electrode G2, third electrode Line is drawn in one end of described bidirectional thyristor, the collector electrode of the other end and NPN type triode and the equal ground connection of the collector electrode of PNP type triode, the P type gate pole of bidirectional thyristor and N-type gate pole respectively with NPN type triode, the emitter of PNP type triode is connected, according to the characteristic of bidirectional thyristor, thus the conducting direction that just can control bidirectional thyristor by controlling the break-make of triode can release two-way surge current.
Operation principle of the present invention is: at the positive bias voltage that the first electrode G1 end adds the negative bias voltage of setting, the second electrode G2 end adds setting, if there is the surge current of negative sense in third electrode Line end, when the voltage difference that first electrode G1 and third electrode Line holds is greater than about 0.7V, NPN triode meeting conducting, its emitter current makes IGBT group conducting as the P type gate current of bidirectional thyristor, surge current to be released to ground, so just achieve the surge protection to subscriber's line; When the surge current of forward appears in third electrode Line end, thirdly hit Line end when being greater than about 0.7V with the voltage difference of the second electrode G2, PNP triode conducting, its emitter current makes IGBT group conducting as the N-type gate current of bidirectional thyristor, there is after turn on thyristors the ability of surge current of releasing, thus make the impact of electronic circuit from surge of rear end; After there is not surge or surge, thyristor current flows will be less than it and maintain electric current, and thyristor will be in off state, only have the Leakage Current that very little, not affect backend electronics circuit and normally work.The present invention can realize the surge protection to subscriber's line relatively easily, if need to carry out surge protection to many subscriber's lines only need use multiple circuit chip of the present invention simultaneously.
As shown in Figure 4, for the generalized section of the surge protection circuit based on bidirectional thyristor of the present invention, wherein, bidirectional thyristor comprises the first N type semiconductor substrate 3, one end of described first N type semiconductor substrate 3 is provided with a P trap 4 and N-type diffuser ring 5, described N-type diffuser ring 5 is a pair and is separately positioned on the both sides of a P trap 4, a described P trap 4 comprises a N trap 7 and P type gate pole 6, described P type gate pole 6 is arranged on the left side of a N trap 7, a described N trap 7 comprises the 2nd P trap 9 and N-type gate pole 8, described N-type gate pole 8 is arranged on the right side of the 2nd P trap 9, injected by N-type in described 2nd P trap 9 and form short circuit hole 10, third electrode 2 is drawn on described 2nd P trap 9 surface, the other end of described first N type semiconductor substrate 3 is provided with a multiple alternate P district 11 and a N district 12.NPN type triode comprises the second N type semiconductor substrate 13, one end of described second N type semiconductor substrate 13 is provided with the 3rd P trap 14, described 3rd P trap 14 comprises the first emitter region 15 and the first base 16, described first emitter region 15 is connected with P type gate pole 6, the first electrode 17 is drawn in described first base 16, the other end of described second N type semiconductor substrate 13 diffuses to form the first collector area 19 by N-type, described second N type semiconductor substrate 13 also comprises the 2nd P district 18, and described 2nd P district 18 connects one end and the other end of the second N type semiconductor substrate 13.PNP type triode comprises the 3rd N type semiconductor substrate 20, one end of described 3rd N type semiconductor substrate 20 is provided with the 4th P trap 21, described 4th P trap 21 is the second emitter region, be connected with N-type gate pole 8, the right side of described 4th P trap diffuses to form the second base 22 by N-type, the second electrode 25 is drawn in described second base 22, the other end of described 3rd N type semiconductor substrate 20 diffuses to form the second collector area 23 by P type, described 3rd N type semiconductor substrate 20 also comprises the 3rd P district 24, described 3rd P district 24 connects one end and the other end of the 3rd N type semiconductor substrate 20, described first electrode 17, third electrode 2 and the second electrode 25 are separated by oxide layer 1.Compared with the structure of visible with traditional employing two single p gate thyristors, new construction is more compact, chip area is less, significantly can improve the surge ability of protective circuit after optimal design.
Substrate in this circuit can use N-type substrate, also can use P type substrate.Except triode, the devices such as MOSFET, SCR, diode, SIT can also be used to control the conducting of bidirectional thyristor.
Present invention also offers a kind of manufacture method of the surge protection circuit based on bidirectional thyristor, main technological steps comprises:
The first step: select thick about 300 μm of sheet, resistivity 15 ~ 25 Ω cm monocrystalline silicon piece that defect is less simultaneously, stand-by after mark cleaning, oven dry;
Second step: the monocrystalline silicon piece obtained in the first step is carried out the process of silicon chip surface growth field oxide, carry out first time photoetching, be specially the dual surface lithography in isolated area the 2nd P district 18 and the 3rd P district 24, mask plate figure, as shown in Fig. 5 (front, the back side), then carries out the boron diffusion of two-sided isolated area, the two matter diffusion of boron-aluminium or the two matter diffusion of gallium-aluminium;
3rd step: carry out second time photoetching, mask plate figure as shown in Figure 6, carries out
thethird photo etching, as shown in Figure 7, then carry out a P trap 4, a P district 11 boron diffusion, diffusion conditions is mask plate figure: pre-deposited temperature 1050 DEG C ~ 1060 DEG C, time 5h, then districution temperature 1250 DEG C, time 20h ~ 25h, O
2flow is 700mL/min, N
2flow is 300mL/min;
4th step: carry out four mask, as shown in Figure 8, then carry out a N trap 7 phosphorus diffusion, condition is mask plate figure: pre-deposited temperature 980 DEG C ~ 1020 DEG C, O
2flow 200mL/min, N
2flow is 700mL/min, time 2 ~ 3h, then distribution occasion is temperature 1300 DEG C ~ 1310 DEG C, time 18h ~ 20h, O
2flow is 500mL/min, N
2flow is 700mL/min;
5th step: carry out the 5th photoetching, as shown in Figure 9, then carry out the 2nd P trap 9, NPN triode base 14, PNP triode emitter region 21 boron ion implantation, ion implanting conditions is mask plate figure: dosage 5e14cm
-2, energy 80KeV, then distribution occasion is temperature 1250 DEG C, time 10h ~ 15h, O
2flow is 700mL/min, N
2flow is 300mL/min;
6th step: carry out the 6th photoetching, as shown in Figure 10, then carry out gate pole short circuit hole 10N type ion implantation, ion implanting conditions is mask plate figure: dosage 1e15cm
-2, energy 50KeV, then distribution occasion is temperature 1310 DEG C, time 8h ~ 12h, O
2flow is 700mL/min, N
2flow is 300mL/min;
7th step: carry out the 7th photoetching, carry out P type gate pole 6 district, front, NPN triode base 16 contact lithograph, mask plate figure as shown in figure 11, carry out the 8th photoetching, carry out the PNP triode back side second collector area 23 photoetching, mask plate figure as shown in figure 12, carries out boron ion implantation, and injection condition is: dosage 5e14cm
-2, energy 50KeV, then distribution occasion is temperature 1250 DEG C, time 2h ~ 4h, O
2flow is 700mL/min, N
2flow is 300mL/min;
8th step: carry out the 9th photoetching, carry out N-type gate pole 8 district, front, PNP triode base 22 contacts, N-type diffuser ring 5 photoetching, mask plate figure as shown in figure 13, carry out the tenth photoetching, carry out N district 12 photoetching, mask plate figure as shown in figure 14, carries out phosphonium ion injection, and injection condition is: dosage 5e15cm
-2, energy 60KeV, then distribution occasion is temperature 1310 DEG C, time 3h ~ 5h, O
2flow is 500mL/min, N
2flow is 700mL/min;
9th step: carry out the ten photoetching, etch contact hole, mask plate figure as shown in figure 15;
Tenth step: carry out evaporation of metal, the 12 photoetching and anti-carve aluminium, mask plate figure as shown in figure 16;
11 step: alloy, condition: furnace temperature 550 DEG C, vacuum degree 10
-3pa, time 10 ~ 30min, passivation;
12 step: carry out the tenth third photo etching, etch pressure welding point, mask plate figure is as shown in figure 17;
13 step: process annealing, temperature 500 DEG C ~ 510 DEG C, constant temperature 10min;
14 step: silicon chip preliminary survey, cut, shelve, sinter, packaging and testing.
When carrying out the two matter diffusion of gallium-aluminium after photoetching in second step, specifically comprise the following steps:
A. the silica colloidal source of being prepared by aluminum nitrate is evenly coated at silicon chip tow sides, thickness
after preliminary drying, silicon chip is pushed diffusion furnace flat-temperature zone, 1300 DEG C ~ 1310 DEG C,
n 2 the lower pre-deposited 8h ~ 10h of protection,
B. carry out Ga pre-deposited, Ga source is Ga
2o
3powder, deposition conditions is: sheet temperature is 1250 DEG C ~ 1260 DEG C, and source temperature is 980 DEG C ~ 1000 DEG C, H
2flow 200 ~ 300mL/min, N
2flow is 80 ~ 100mL/min, TongYuan time 60 ~ 80min;
C. at 1330 DEG C, N
2carry out dopant redistribution 50 ~ 55h under protection, below 400 DEG C, take out silicon chip.
Claims (5)
1. the surge protection circuit based on bidirectional thyristor, it is characterized in that, comprise bidirectional thyristor, NPN type triode and PNP type triode, the emitter of described NPN type triode is connected with the P type door of bidirectional thyristor, base stage draws the first electrode, the emitter of described PNP type triode is connected with the N-type door of bidirectional thyristor, base stage draws the second electrode, and the collector electrode of third electrode, the other end and NPN type triode and the equal ground connection of collector electrode of PNP type triode are drawn in one end of described bidirectional thyristor, described bidirectional thyristor comprises the first N type semiconductor substrate (3), one end of described first N type semiconductor substrate (3) is provided with a P trap (4) and N-type diffuser ring (5), described N-type diffuser ring (5) is a pair and is separately positioned on the both sides of a P trap (4), a N trap (7) and P type gate pole (6) is formed in a described P trap (4), described P type gate pole (6) is arranged on the left side of a N trap (7), the 2nd P trap (9) and N-type gate pole (8) is formed in a described N trap (7), described N-type gate pole (8) is arranged on the right side of the 2nd P trap (9), injected by N-type in described 2nd P trap (9) and form short circuit hole (10), third electrode (2) is drawn on described 2nd P trap (9) surface, the other end of described first N type semiconductor substrate (3) is provided with a multiple alternate P district (11) and a N district (12).
2. a kind of surge protection circuit based on bidirectional thyristor according to claim 1, it is characterized in that, described NPN type triode comprises the second N type semiconductor substrate (13), one end of described second N type semiconductor substrate (13) is provided with the 3rd P trap (14), described 3rd P trap (14) comprises the first emitter region (15) and the first base (16), described first emitter region (15) is connected with P type gate pole (6), described first base (16) draws the first electrode (17), the other end of described second N type semiconductor substrate (13) diffuses to form the first collector area (19) by N-type, described second N type semiconductor substrate (13) also comprises the 2nd P district (18), described 2nd P district (18) connects one end and the other end of the second N type semiconductor substrate (13).
3. a kind of surge protection circuit based on bidirectional thyristor according to claim 2, it is characterized in that, described PNP type triode comprises the 3rd N type semiconductor substrate (20), one end of described 3rd N type semiconductor substrate (20) is provided with the 4th P trap (21), described 4th P trap (21) is the second emitter region, be connected with N-type gate pole (8), the right side of described 4th P trap diffuses to form the second base (22) by N-type, described second base (22) draws the second electrode (25), the other end of described 3rd N type semiconductor substrate (20) diffuses to form the second collector area (23) by P type, described 3rd N type semiconductor substrate (20) also comprises the 3rd P district (24), described 3rd P district (24) connects one end and the other end of the 3rd N type semiconductor substrate (20), described first electrode (17), third electrode (2) and the second electrode (25) are separated by oxide layer (1).
4. based on a manufacture method for the surge protection circuit of bidirectional thyristor, it is characterized in that, comprising:
The first step: select thick 300 μm of sheet, the monocrystalline silicon piece of resistivity 15 ~ 25 Ω cm, stand-by after mark cleaning, oven dry;
Second step: the monocrystalline silicon piece obtained in the first step is carried out the process of silicon chip surface growth field oxide, carry out first time photoetching, be specially the dual surface lithography in isolated area the 2nd P district (18) and the 3rd P district (24), then carry out the boron diffusion of two-sided isolated area, the two matter diffusion of boron-aluminium or the two matter diffusion of gallium-aluminium;
3rd step: carry out second time photoetching and third time photoetching, then a P trap (4), P district (11) boron diffusion is carried out, diffusion conditions is: pre-deposited temperature 1050 DEG C ~ 1060 DEG C, time 5h, then districution temperature 1250 DEG C, time 20h ~ 25h, O
2flow is 700mL/min, N
2flow is 300mL/min;
4th step: carry out four mask, then carry out N trap (7) phosphorus diffusion, condition is: pre-deposited temperature 980 DEG C ~ 1020 DEG C, O
2flow 200mL/min, N
2flow is 700mL/min, time 2 ~ 3h, then distribution occasion is temperature 1300 DEG C ~ 1310 DEG C, time 18h ~ 20h, O
2flow is 500mL/min, N
2flow is 700mL/min;
5th step: carry out the 5th photoetching, then carry out the 2nd P trap (9), NPN triode base (14), PNP triode emitter region (21) boron ion implantation, ion implanting conditions is: dosage 5e14cm
-2, energy 80KeV, then distribution occasion is temperature 1250 DEG C, time 10h ~ 15h, O
2flow is 700mL/min, N
2flow is 300mL/min;
6th step: carry out the 6th photoetching, then carry out gate pole short circuit hole (10) N-type ion implantation, ion implanting conditions is: dosage 1e15cm
-2, energy 50KeV, then distribution occasion is temperature 1310 DEG C, time 8h ~ 12h, O
2flow is 700mL/min, N
2flow is 300mL/min;
7th step: carry out the 7th photoetching, carry out P type gate pole (6) district, front, NPN triode base (16) contact lithograph, carry out the 8th photoetching, carry out collector area, the PNP triode back side second (23) photoetching, carry out boron ion implantation, injection condition is: dosage 5e14cm
-2, energy 50KeV, then distribution occasion is temperature 1250 DEG C, time 2h ~ 4h, O
2flow is 700mL/min, N
2flow is 300mL/min;
8th step: carry out the 9th photoetching, carry out N-type gate pole (8) district, front, PNP triode base (22) contact, N-type diffuser ring (5) photoetching, carry out the tenth photoetching, carry out N district (12) photoetching, carry out phosphonium ion injection, injection condition is: dosage 5e15cm
-2, energy 60KeV, then distribution occasion is temperature 1310 DEG C, time 3h ~ 5h, O
2flow is 500mL/min, N
2flow is 700mL/min;
9th step: carry out the ten photoetching, etch contact hole;
Tenth step: carry out evaporation of metal, the 12 photoetching and anti-carve aluminium;
11 step: adopt alloy technique to process the device obtained in the tenth step, condition: furnace temperature 550 DEG C, vacuum degree 10
-3pa, time 10 ~ 30min, passivation;
12 step: carry out the tenth third photo etching, etch pressure welding point;
13 step: process annealing, temperature 500 DEG C ~ 510 DEG C, constant temperature 10min;
14 step: silicon chip preliminary survey, cut, shelve, sinter, packaging and testing.
5. the manufacture method of a kind of surge protection circuit based on bidirectional thyristor according to claim 4, is characterized in that, for carrying out the two matter diffusion of gallium-aluminium after photoetching described in second step, specifically comprises the following steps:
A. the silica colloidal source of being prepared by aluminum nitrate is evenly coated at silicon chip tow sides, thickness
after preliminary drying, silicon chip is pushed diffusion furnace flat-temperature zone, at 1300 DEG C ~ 1310 DEG C, N
2the lower pre-deposited 8h ~ 10h of protection,
B. carry out Ga pre-deposited, Ga source is Ga
2o
3powder, deposition conditions is: sheet temperature is 1250 DEG C ~ 1260 DEG C, and source temperature is 980 DEG C ~ 1000 DEG C, H
2flow 200 ~ 300mL/min, N
2flow is 80 ~ 100mL/min, TongYuan time 60 ~ 80min;
C. at 1330 DEG C, N
2carry out dopant redistribution 50 ~ 55h under protection, below 400 DEG C, take out silicon chip.
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| CN106972014B (en) * | 2016-11-21 | 2019-07-19 | 富芯微电子有限公司 | A kind of anti-reverse power connection prevents two-way surge device and its manufacturing method |
| CN109148432A (en) * | 2017-06-15 | 2019-01-04 | 上海韦尔半导体股份有限公司 | Surge Protector and preparation method thereof |
| CN107658296A (en) * | 2017-10-25 | 2018-02-02 | 启东吉莱电子有限公司 | A kind of thyristor surge suppressor that there are three tunnels to protect and its manufacture method |
| CN107845631A (en) * | 2017-10-25 | 2018-03-27 | 启东吉莱电子有限公司 | A kind of high EB bipolar semiconductors protection device and its manufacture method |
| CN110010602B (en) * | 2019-04-09 | 2023-11-28 | 捷捷半导体有限公司 | Low-breakdown-voltage discharge tube and manufacturing method thereof |
| CN110112722B (en) * | 2019-06-04 | 2021-07-27 | 安徽华东光电技术研究所有限公司 | Surge suppression module and manufacturing method thereof |
| CN111627904B (en) * | 2020-06-04 | 2022-12-02 | 电子科技大学 | Programmable overvoltage protection device with VDMOS and thyristor |
| CN111627905B (en) * | 2020-06-04 | 2022-06-07 | 电子科技大学 | Programmable one-way protection device triggered by LDMOS (laterally diffused metal oxide semiconductor) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5274524A (en) * | 1990-12-07 | 1993-12-28 | Sgs-Thomson Microelectronics S.A. | Programmable protection circuit and its monolithic manufacturing |
| CN1131565C (en) * | 1997-12-30 | 2003-12-17 | St微电子公司 | Subscriber interface protection circuit |
| CN101640414A (en) * | 2009-08-26 | 2010-02-03 | 苏州晶讯科技股份有限公司 | Programmable semiconductor anti-surge protective device with deep trap structure |
-
2013
- 2013-07-08 CN CN201310284264.XA patent/CN103441125B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5274524A (en) * | 1990-12-07 | 1993-12-28 | Sgs-Thomson Microelectronics S.A. | Programmable protection circuit and its monolithic manufacturing |
| CN1131565C (en) * | 1997-12-30 | 2003-12-17 | St微电子公司 | Subscriber interface protection circuit |
| CN101640414A (en) * | 2009-08-26 | 2010-02-03 | 苏州晶讯科技股份有限公司 | Programmable semiconductor anti-surge protective device with deep trap structure |
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