CN105529275A - 薄膜晶体管及其制造方法 - Google Patents

薄膜晶体管及其制造方法 Download PDF

Info

Publication number
CN105529275A
CN105529275A CN201610076318.7A CN201610076318A CN105529275A CN 105529275 A CN105529275 A CN 105529275A CN 201610076318 A CN201610076318 A CN 201610076318A CN 105529275 A CN105529275 A CN 105529275A
Authority
CN
China
Prior art keywords
layer
metal
metal film
film layer
metallic oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610076318.7A
Other languages
English (en)
Inventor
闫梁臣
袁广才
徐晓光
王磊
彭俊彪
兰林锋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
South China University of Technology SCUT
BOE Technology Group Co Ltd
Original Assignee
South China University of Technology SCUT
BOE Technology Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by South China University of Technology SCUT, BOE Technology Group Co Ltd filed Critical South China University of Technology SCUT
Priority to CN201610076318.7A priority Critical patent/CN105529275A/zh
Publication of CN105529275A publication Critical patent/CN105529275A/zh
Priority to US15/515,004 priority patent/US10439070B2/en
Priority to PCT/CN2016/081696 priority patent/WO2017133114A1/zh
Priority to EP16843279.7A priority patent/EP3413335B1/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/16—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
    • C23C14/165—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon by cathodic sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/18—Metallic material, boron or silicon on other inorganic substrates
    • C23C14/185—Metallic material, boron or silicon on other inorganic substrates by cathodic sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/20—Metallic material, boron or silicon on organic substrates
    • C23C14/205—Metallic material, boron or silicon on organic substrates by cathodic sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/35—Sputtering by application of a magnetic field, e.g. magnetron sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/58—After-treatment
    • C23C14/5846—Reactive treatment
    • C23C14/5853—Oxidation
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D11/00—Electrolytic coating by surface reaction, i.e. forming conversion layers
    • C25D11/02—Anodisation
    • C25D11/022—Anodisation on selected surface areas
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D11/00—Electrolytic coating by surface reaction, i.e. forming conversion layers
    • C25D11/02—Anodisation
    • C25D11/04—Anodisation of aluminium or alloys based thereon
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D11/00—Electrolytic coating by surface reaction, i.e. forming conversion layers
    • C25D11/02—Anodisation
    • C25D11/26—Anodisation of refractory metals or alloys based thereon
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D11/00—Electrolytic coating by surface reaction, i.e. forming conversion layers
    • C25D11/02—Anodisation
    • C25D11/34—Anodisation of metals or alloys not provided for in groups C25D11/04 - C25D11/32
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02614—Transformation of metal, e.g. oxidation, nitridation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
    • H01L21/441—Deposition of conductive or insulating materials for electrodes
    • H01L21/443—Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02244—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02258—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by anodic treatment, e.g. anodic oxidation

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Electrochemistry (AREA)
  • Mechanical Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Thin Film Transistor (AREA)

Abstract

一种薄膜晶体管及其制造方法，薄膜晶体管制造方法包括：采用直流溅射法在基板上沉积金属薄膜层的步骤；将所述金属薄膜层中的金属完全氧化或者部分氧化形成金属氧化物薄膜层的步骤。薄膜晶体管具有紧密结合的栅极层和栅极绝缘层。本发明的薄膜晶体管的制造方法使得采用直流溅射制备薄膜晶体管变为可能，使用该方法制备得到的薄膜晶体管具有紧密结合的栅极层和栅极绝缘层，从而改善了绝缘效果。

Description

薄膜晶体管及其制造方法
技术领域
本公开涉及薄膜晶体管及其制造方法。
背景技术
近年来，新型平板显示(FPD)产业发展日新月异。消费者对于大尺寸、高分辨率平板显示的高需求量刺激着整个产业不断进行显示技术提升。而作为FPD产业核心技术的薄膜晶体管(TFT)背板技术，也在经历着深刻的变革。氧化物TFT不仅具有较高的迁移率，而且制作工艺简单，制造成本较低，还具有优异的大面积均匀性。因此氧化物TFT技术自诞生以来便备受业界瞩目。
氧化物半导体具有载流子迁移率较高、对可见光透明等优点，在平板显示的TFT基板领域，有替代用传统硅工艺制备的薄膜晶体管的趋势。但由于氧化物半导体有源层电导率较低，通常采用射频溅射的方法制备。相比于直流溅射，射频溅射具有速度慢、需要调匹配、工艺重复差、多元薄膜的成分不均匀以及射频辐射大等缺点。因此，工业生产一般不用射频溅射。此外，由于绝缘层和半导体有源层的工艺温度高、难以与柔性衬底兼容。
发明内容
本发明的实施例提供一种薄膜晶体管的制造方法，包括：采用直流溅射法在基板上沉积金属薄膜层的步骤；将所述金属薄膜层中的金属完全氧化或者部分氧化形成金属氧化物薄膜层的步骤。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，在所述采用直流溅射法在基板上沉积金属薄膜层的步骤之后，将所述金属薄膜层中的金属完全氧化或者部分氧化形成金属氧化物薄膜层的步骤之前，进一步包括对所述金属薄膜层图形化的步骤。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，在将所述金属薄膜层中的金属完全氧化或者部分氧化形成金属氧化物薄膜层的步骤之后，进一步包括对所述金属氧化物薄膜层图形化的步骤。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，所述采用直流溅射法在基板上沉积金属薄膜层的步骤包括：采用直流溅射法在所述基板上沉积第一金属薄膜层的步骤；和采用直流溅射法在所述第一金属薄膜层上沉积第二金属薄膜层的步骤。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，将所述金属薄膜层中的金属完全氧化或者部分氧化形成金属氧化物薄膜层的步骤包括：将所述第二金属薄膜层完全氧化为第二金属氧化物薄膜层，将所述第一金属薄膜层表面氧化形成第一金属氧化物薄膜层，所述第一金属薄膜层未被氧化的部分为第三金属薄膜层，所述第一金属氧化物薄膜层覆盖在所述第三金属薄膜层之上。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，在将所述金属薄膜层中的金属完全氧化或者部分氧化形成金属氧化物薄膜层的步骤之后，还包括对所述第二金属氧化物薄膜层图形化的步骤。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，所述基板温度与环境温度相同。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，所述第一金属薄膜层中的金属为铝、钽、钛或它们任意两者或三者的合金。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，所述第二金属薄膜层中的金属为锌、锡、铟或它们任意两者或三者的合金。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，所述第三金属薄膜层为栅极层，所述第一金属氧化物薄膜层为栅极绝缘层，所述第二金属氧化物薄膜层为有源层。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，所述基板为柔性基板。所述柔性基板材料例如可以为聚萘二甲酸乙二醇酯(PEN)、聚对苯二甲酸乙二酯(PET)、聚酰亚胺(PI)或者金属箔。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，所述第三金属薄膜层的厚度为100-1000nm，所述第二金属薄膜层的厚度为10-200nm，所述第一金属氧化物薄膜层的厚度为50-400nm。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，进一步包括在所述基板与沉积所述金属薄膜层的一侧相对的另一侧，设置水氧阻隔层或者缓冲层的步骤。
在本发明实施例提供的薄膜晶体管的制造方法中，例如，所述水氧阻隔层或者缓冲层的材料为氧化硅、氮化硅、氮氧化硅或氧化铝。
本发明的实施例还提供一种薄膜晶体管，包括：基板，依次设置在所述基板上的栅极层、栅极绝缘层以及有源层，其中所述栅极层的金属元素与所述栅极绝缘层的金属元素相同。
在本发明实施例提供的薄膜晶体管中，例如，所述栅极层与所述栅极绝缘层一体成型。
在本发明实施例提供的薄膜晶体管中，例如，所述栅极绝缘层是由所述栅极层的表层氧化而成，所述栅极绝缘层包覆所述栅极层的上表面和侧面。
在本发明实施例提供的薄膜晶体管中，例如，所述栅极绝缘层的图形与所述有源层的图形相同。或者，所述栅极绝缘层的图形大于所述有源层的图形。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例，而非对本发明的限制。
图1a-1e为本发明实施例中采用直流溅射法制造薄膜晶体管过程示意图；
图2为本发明一实施例提供的薄膜晶体管结构示意图；
图3为本发明另一实施例提供的薄膜晶体管结构示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例的附图，对本发明实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本发明的一部分实施例，而不是全部的实施例。基于所描述的本发明的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。
除非另作定义，本公开所使用的技术术语或者科学术语应当为本发明所属领域内具有一般技能的人士所理解的通常意义。本发明专利申请说明书以及权利要求书中使用的“第一”“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”或者“一”等类似词语也不表示数量限制，而是表示存在至少一个。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。
图1a-1e及图2示意了本发明的一个实施方式中薄膜晶体管的制造过程。如图1a所示，在基板10上采用直流溅射法沉积第一金属薄膜层20。所述第一金属薄膜层20中的金属为铝。需要说明的是，所述第一金属薄膜层20中的金属材料并不限于本实施方式中的铝，可以为任何可作栅极的金属材料，例如铝、钽、钛或它们任意两者或三者的合金。直流溅射是一种采用直流电源进行磁控溅射沉积薄膜的方法。在本实施例中，直流溅射采用Ar气等离子体，溅射气压为0.1-3Pa，直流电源功率是200W-5000W。在直流溅射操作过程中，不需要加热基板10。例如，在薄膜制备过程以及后续工艺步骤中，基板10的温度与环境温度相同，例如环境温度可以为15℃-35℃，或者例如为25℃。由于在直流溅射过程中基板温度较低，因此基板10可以采用柔性基板。例如，所述柔性基板材料可以为聚萘二甲酸乙二醇酯(PEN)、聚对苯二甲酸乙二酯(PET)、聚酰亚胺(PI)或者金属箔。
如图1b所示，采用直流溅射法在所述第一金属薄膜层20上沉积第二金属薄膜层30。所述第二金属薄膜层30中的金属为锌。需要说明的是，所述第二金属薄膜层30中的金属材料并不限于本实施方式中的锌，可以为任何氧化后可作为半导体有源层的金属材料，例如锌、锡、铟或它们任意两者或三者的合金。
如图1c所示，对所述第一金属薄膜层20和所述第二金属薄膜层30图形化，形成图形化之后的第一金属薄膜层21和第二金属薄膜层31。由于该图形化步骤采用同一掩模板一次完成，第一金属薄膜层21和第二金属薄膜层31具有相同的图形。
如图1d所示，对所述第一金属薄膜层21和所述第二金属薄膜层31进行氧化，将所述第二金属薄膜层31完全氧化为第二金属氧化物薄膜层32，而将所述第一金属薄膜层21部分氧化，形成未被氧化的第三金属薄膜层22和覆盖在所述第三金属薄膜层22之上的第一金属氧化物薄膜层23。由于所述第三金属薄膜层22与所述第一金属氧化物薄膜层23在氧化前都属于所述第一金属薄膜层21的一部分，可以理解，所述第三金属薄膜层22与所述第一金属氧化物薄膜层23紧密接触。此外，第三金属薄膜层22的金属元素与第一金属氧化物薄膜层23的金属元素相同。在本实施例中，所述第三金属薄膜层22作为栅极层，所述第一金属氧化物薄膜层23作为栅极绝缘层。传统的制备方法先沉积一层栅极层，再在栅极层上沉积一层栅极绝缘层，两层接触面难免存在缺陷或空隙，影响绝缘效果，并且栅极绝缘层也不能太薄。相反，在本发明的实施例中，如上所述，一体成型的第三金属薄膜层22与所述第一金属氧化物薄膜层23紧密接触，作为栅极绝缘层的第一金属氧化物薄膜层23与作为栅极层的第三金属薄膜层22之间较少存在空隙或缺陷，绝缘效果得到大大改善，并且作为栅极绝缘层的第一金属氧化物薄膜层23也可以制作得较薄。由于所述第一金属氧化物薄膜层23由所述第一金属薄膜层21的表面氧化而成，可以理解，所述第一金属氧化物薄膜层23包覆所述第三金属薄膜层22的上表面和侧面。如图1d所示，所述第三金属薄膜层22与所述基板10接触的表面为下表面；与所述下表面相对的表面为上表面；除上述上表面、下表面以外的其他表面为侧面。
例如，所述第一金属氧化物薄膜层23的厚度可以为50-400nm，或者为50-200nm，或者为80-160nm。为保证在氧化后还有足够厚度的第三金属薄膜层22作为栅极层，氧化前的第一金属薄膜层20/21厚度一般设置在100-1000nm。在上述氧化处理之后，作为栅极层的第三金属薄膜层22厚度一般在50-800nm，或者100-600nm，或者150-300nm。在本发明的实施例中，上述氧化的方法并不作特别的限定，可以采用本领域通用的方法，如化学氧化法、电化学氧化法等。例如，可以在含氧气氛中进行退火，或者在氧等离子体中进行离子注入，或者等离子体处理来氧化。以电化学氧化法为例，操作方法为：将基片放入电解质溶液的一端接电源阳极，电源阴极连接石墨或金属放入电解质溶液的另外一端并通电进行氧化。
如图1e所示，对所述第二金属氧化物薄膜层32图形化，形成图形化之后的第二金属氧化物薄膜层33。如上所述，构成第二金属薄膜层30的材料例如可以为锌、锡、铟或它们任意两者或三者的合金。对应的，构成第二金属氧化物薄膜层33的材料例如为氧化锌、氧化锡、氧化铟或者锌、锡、铟任意两者或三者的复合氧化物。上述复合氧化物例如可以是氧化铟锡ITO、氧化锌锡IZO等。作为半导体的所述第二金属氧化物薄膜层33可以作为有源层。
最后，如图2所示，采用直流溅射的方法在所述第二金属氧化物薄膜层33之上制备电极层并图形化形成源极41和漏极42。上述源极41和漏极42的材料为导电材料，可以为金属材料例如铝、铜、钼、钛、银、金、钽、钨、铬单质或铝合金等，可以为金属氧化物如ITO、AZO等，也可以是上述任意几种薄膜组成的多层薄膜，总厚度例如为100～2000nm。
在上述图1a-e及图2的实施方式中，图1e所示的第二次图形化步骤可以省略。也即在图1d所示的氧化步骤之后，直接在第二金属氧化物薄膜层32之上，采用直流溅射的方法制备电极层并图形化形成源极41和漏极42，得到具有如图3所示器件结构的TFT。由于省略了第二次图形化步骤，作为有源层的第二金属氧化物薄膜层32的图形与作为栅极绝缘层的第一金属氧化物薄膜层23的图形相同。而在图2所示的器件结构中，由于第二次图形化步骤，作为有源层的第二金属氧化物薄膜层32的图形小于作为栅极绝缘层的第一金属氧化物薄膜层23的图形。
例如，如图2所示，还可以进一步在所述基板10的外侧，也即与沉积金属薄膜层一侧相对的另一侧，设置水氧阻隔层或者缓冲层50。
所述水氧阻隔层或者缓冲层50的材料例如可以为氧化硅、氮化硅、氮氧化硅或氧化铝。
例如，还可以在氧化物有源层32的上方设置刻蚀阻挡层，防止蚀刻源漏电极时对薄膜晶体管的沟道处的氧化物有源层破坏。另外，还可以在源漏电极41/42上方设置钝化层。
需要说明的是，上面的实施例中以沉积两层金属薄膜层为例进行了描述，然而根据本发明的实施例并不限于此。根据本发明的实施例，可以利用直流溅射制作一层金属薄膜并氧化、或者连续制作三层以上的金属薄膜再氧化。所形成的氧化物层也并不限于形成薄膜晶体管的有源层或栅极绝缘层，而是可以用于其他任意合适的氧化物层。
本发明实施例的上述薄膜晶体管制造方法使得采用直流溅射法制备薄膜晶体管变为可能。由于薄膜晶体管中的氧化物为半导体或绝缘体，在本发明以前，一般认为无法采用直流溅射的方法直接制造薄膜晶体管。本领域通常采用射频溅射法制备薄膜晶体管。但是，射频溅射有诸多缺点例如速度慢、需要调匹配、工艺重复差、多元薄膜的成分不均匀以及射频辐射大等。本发明的发明人先采用直流溅射制备金属层，再氧化金属层形成金属氧化物半导体层或者金属氧化物绝缘层，巧妙地解决了无法采用直流溅射的方法直接制造薄膜晶体管的问题，一方面避免了射频溅射的上述缺点。另一方面，采用直流溅射法提高了成膜速率、无辐射、成本低、提高了工艺重复性同时又可以有效地控制氧空位。另外，采用传统的射频溅射法制备薄膜晶体管，由于绝缘层和半导体有源层的工艺温度高，导致无法使用柔性基板。而采用本发明实施例的直流溅射法制造薄膜晶体管则不存在这个问题。由于采用直流溅射法在基板上沉积金属薄膜的过程中，基板温度不会显著升高，使得柔性基板的使用成为可能。
本发明的实施例还提供一种采用直流溅射法制备的薄膜晶体管。如图2所示，本发明的实施例提供一种薄膜晶体管，该薄膜晶体管具有基板10以及依次形成在基板10上的栅极层22、栅极绝缘层23、半导体有源层33、源极41和漏极42。半导体有源层33的图形小于栅极绝缘层23的图形。栅极绝缘层23与栅极层22是一体成型的，或者说栅极绝缘层23与栅极层22原属于同一金属层，该金属层表面被氧化后形成栅极绝缘层23，剩余的部分则形成栅极层22。由于栅极绝缘层23与栅极层22一体成型，栅极绝缘层23与栅极层22紧密接触，栅极绝缘层23与栅极层22之间较少存在空隙或缺陷，绝缘效果得到大大改善，并且栅极绝缘层23也可以制作得较薄。例如，所述栅极绝缘层23的厚度可以为50-400nm，或者为50-200nm，或者为80-160nm。基板10可以采用柔性基板。例如，所述柔性基板材料可以为聚萘二甲酸乙二醇酯(PEN)、聚对苯二甲酸乙二酯(PET)、聚酰亚胺(PI)或者金属箔。源极41和漏极42的材料为导电材料，可以为金属材料例如铝、铜、钼、钛、银、金、钽、钨、铬单质或铝合金等，可以为金属氧化物如ITO、AZO等，也可以是上述任意几种薄膜组成的多层薄膜，总厚度为100-2000nm。
如图3所示为本发明另一实施例提供的一种薄膜晶体管，与图2所示的薄膜晶体管不同之处在于，半导体有源层32的图形与栅极绝缘层23的图形相同。
以下通过具体实施例说明本发明。
实施例1
一种金属氧化物薄膜晶体管，其结构如图2所示，包括基板10、栅极22、栅极绝缘层23、有源层33、源极41和漏极42，其制备方法包括如下步骤：
a.如图1a所示，在基板10上采用直流溅射的方法制备铝或钽金属薄膜层20，厚度为100～1000nm；
b.如图1b所示，在铝或钽薄膜上采用直流溅射的方法制备锌或锡金属薄膜层30，厚度为10～200nm；
c.如图1c所示，对铝或钽金属薄膜层20以及锌或锡金属薄膜层30同时进行图形化，形成铝或钽金属薄膜层21和锌或锡金属薄膜层31；
d.如图1d所示，进行电化学氧化，将锌或锡金属薄膜层完全氧化形成氧化锌或氧化锡薄膜层32，并将铝或钽金属薄膜层部分氧化，在上表面形成氧化铝或氧化钽薄膜层作为栅极绝缘层23(厚度50～400nm)，铝或钽金属薄膜层未被氧化的部分作为栅极22(厚度100～800nm)；
e.如图1e所示，将氧化锌或氧化锡薄膜层32图形化形成有源层33；
f.如图2所示，采用直流溅射的方法制备电极层并图形化形成源极41和漏极42。
步骤d的电化学氧化过程为：将基片放入电解质溶液的一端接电源阳极，电源阴极接石墨或金属放入电解质溶液的另外一端并通电进行氧化。
例如，还可以在氧化物有源层32的上方设置刻蚀阻挡层，防止蚀刻源漏电极时对氧化物有源层破坏。还可以在源漏电极41/42上方设置钝化层。
上述基板可以是玻璃基板或柔性基板，还可以进一步包括水氧阻隔层或缓冲层。
当所述衬底为柔性衬底时，柔性衬底具体设置为聚萘二甲酸乙二醇酯(PEN)、聚对苯二甲酸乙二酯(PET)、聚酰亚胺(PI)或者金属箔柔性衬底。
上述步骤f中的源极41和漏极42的材料为导电材料，可以为金属材料例如铝、铜、钼、钛、银、金、钽、钨、铬单质或铝合金等，可以为金属氧化物如ITO、AZO等，也可以是上述任意几种薄膜组成的多层薄膜，总厚度为100～2000nm。
采用本发明实施例1的制备方法，无需射频溅射、无辐射、成本低、均匀性与重复性好，在室温条件下制备，同时能减少氧空位、控制其自由载流子浓度，所制备的薄膜晶体管稳定性好。
实施例2
一种金属氧化物薄膜晶体管，其结构如图2所示，包括基板10、栅极22、栅极绝缘层23、有源层33、源极41和漏极42，其制备方法包括如下步骤：
a.如图1a所示，在玻璃基板10上采用直流溅射的方法制备钽金属薄膜层20，厚度为500nm；
b.如图1b所示，在钽金属薄膜层20上采用直流溅射的方法制备锌金属薄膜层30，厚度为40nm；
c.如图1c所示，对钽金属薄膜层20以及锌金属薄膜层30同时进行图形化，形成钽金属薄膜层21和锌金属薄膜层31；
d.如图1d所示，进行电化学氧化，将锌金属薄膜层31完全氧化形成氧化锌薄膜层32；并将钽金属薄膜层21部分氧化，在上表面形成氧化钽薄膜层作为栅极绝缘层23(厚度200nm)，钽金属薄膜层21未被氧化的部分作为栅极22(厚度300nm)；
e.如图1e所示，将氧化锌薄膜层32图形化形成有源层33；
f.如图2所示，采用直流溅射的方法制备钼电极层并图形化形成源极41和漏极42。
步骤d的电化学氧化过程为：将基片放入柠檬酸电解质溶液的一端接电源阳极，电源阴极接石墨或金属放入电解质溶液的另外一端并通电进行氧化。
采用本发明实施例2的制备方法，无需射频溅射、无辐射、成本低、均匀性与重复性好，在室温条件下制备，同时能减少氧空位、控制其自由载流子浓度，所制备的薄膜晶体管稳定性好。
实施例3
一种金属氧化物薄膜晶体管，其结构如图2所示，包括基板10、栅极22、栅极绝缘层23、有源层33、源极41和漏极42，其制备方法包括如下步骤：
a.如图1a所示，在柔性基板10上采用直流溅射的方法制备铝金属薄膜层20，厚度为300nm，柔性基板10的材料为聚萘二甲酸乙二醇酯(PEN)；
b.如图1b所示，在铝金属薄膜层20上采用直流溅射的方法制备锡金属薄膜层30，厚度为30nm；
c.如图1c所示，对铝金属薄膜层20以及锡金属薄膜层30同时进行图形化，形成铝金属薄膜层21和锡金属薄膜层31；
d.如图1d所示，进行电化学氧化，将锡金属薄膜层31完全氧化形成氧化锡薄膜层32，并将铝金属薄膜层21部分氧化，在上表面形成氧化铝薄膜层作为栅极绝缘层23(厚度200nm)，铝金属薄膜层未被氧化的部分作为栅极22(厚度100nm)；
e.如图1e所示，将氧化锡薄膜层32图形化形成有源层33；
f.采用直流溅射的方法制备钼电极层并图形化形成源极41和漏极42。
步骤d的电化学氧化过程为：将基片放入柠檬酸电解质溶液的一端接电源阳极，电源阴极接石墨或金属放入电解质溶液的另外一端并通电进行氧化。
采用本发明实施例3的制备方法，无需射频溅射、无辐射、成本低、均匀性与重复性好，在室温条件下制备，同时能减少氧空位、控制其自由载流子浓度，所制备的薄膜晶体管稳定性好。
以上所述仅是本发明的示范性实施方式，而非用于限制本发明的保护范围，本发明的保护范围由所附的权利要求确定。

Claims (20)

1.一种薄膜晶体管的制造方法，包括：
采用直流溅射法在基板上沉积金属薄膜层的步骤；
将所述金属薄膜层中的金属完全氧化或者部分氧化形成金属氧化物薄膜层的步骤。
2.根据权利要求1所述的方法，在所述采用直流溅射法在基板上沉积金属薄膜层的步骤之后，将所述金属薄膜层中的金属完全氧化或者部分氧化形成金属氧化物薄膜层的步骤之前，进一步包括对所述金属薄膜层图形化的步骤。
3.根据权利要求1或2所述的方法，在将所述金属薄膜层中的金属完全氧化或者部分氧化形成金属氧化物薄膜层的步骤之后，进一步包括对所述金属氧化物薄膜层图形化的步骤。
4.根据权利要求1或2所述的方法，所述采用直流溅射法在基板上沉积金属薄膜层的步骤包括：
采用直流溅射法在所述基板上沉积第一金属薄膜层的步骤；和
采用直流溅射法在所述第一金属薄膜层上沉积第二金属薄膜层的步骤。
5.根据权利要求4所述的方法，将所述金属薄膜层中的金属完全氧化或者部分氧化形成金属氧化物薄膜层的步骤包括：
将所述第二金属薄膜层完全氧化为第二金属氧化物薄膜层，将所述第一金属薄膜层表面氧化形成第一金属氧化物薄膜层，所述第一金属薄膜层未被氧化的部分为第三金属薄膜层，所述第一金属氧化物薄膜层覆盖在所述第三金属薄膜层之上。
6.根据权利要求5所述的方法，在将所述金属薄膜层中的金属完全氧化或者部分氧化形成金属氧化物薄膜层的步骤之后，还包括对所述第二金属氧化物薄膜层图形化的步骤。
7.根据权利要求1或2所述的方法，其中，所述基板温度与环境温度相同。
8.根据权利要求4所述的方法，其中，所述第一金属薄膜层中的金属为铝、钽、钛或它们任意两者或三者的合金。
9.根据权利要求4所述的方法，其中，所述第二金属薄膜层中的金属为锌、锡、铟或它们任意两者或三者的合金。
10.根据权利要求5所述的方法，其中，所述第三金属薄膜层为栅极层，所述第一金属氧化物薄膜层为栅极绝缘层，所述第二金属氧化物薄膜层为有源层。
11.根据权利要求1或2所述的方法，其中，所述基板为柔性基板。
12.根据权利要求11所述的方法，其中，所述柔性基板材料为聚萘二甲酸乙二醇酯(PEN)、聚对苯二甲酸乙二酯(PET)、聚酰亚胺(PI)或者金属箔。
13.根据权利要求5所述的方法，其中，所述第三金属薄膜层的厚度为100-1000nm，所述第二金属薄膜层的厚度为10-200nm，所述第一金属氧化物薄膜层的厚度为50-400nm。
14.根据权利要求1或2所述的方法，进一步包括在所述基板与沉积所述金属薄膜层的一侧相对的另一侧，设置水氧阻隔层或者缓冲层的步骤。
15.根据权利要求14所述的方法，其中，所述水氧阻隔层或者缓冲层的材料为氧化硅、氮化硅、氮氧化硅或氧化铝。
16.一种薄膜晶体管，包括：
基板，依次设置在所述基板上的栅极层、栅极绝缘层以及有源层，
其中所述栅极层的金属元素与所述栅极绝缘层的金属元素相同。
17.根据权利要求16所述的薄膜晶体管，其中，所述栅极层与所述栅极绝缘层一体成型。
18.根据权利要求16或17所述的薄膜晶体管，其中，所述栅极绝缘层是由所述栅极层的表层氧化而成，所述栅极绝缘层包覆所述栅极层的上表面和侧面。
19.根据权利要求16或17所述的薄膜晶体管，其中，所述栅极绝缘层的图形与所述有源层的图形相同。
20.根据权利要求16或17所述的薄膜晶体管，其中，所述栅极绝缘层的图形大于所述有源层的图形。
CN201610076318.7A 2016-02-03 2016-02-03 薄膜晶体管及其制造方法 Pending CN105529275A (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN201610076318.7A CN105529275A (zh) 2016-02-03 2016-02-03 薄膜晶体管及其制造方法
US15/515,004 US10439070B2 (en) 2016-02-03 2016-05-11 Thin-film transistor (TFT) and manufacturing method thereof
PCT/CN2016/081696 WO2017133114A1 (zh) 2016-02-03 2016-05-11 薄膜晶体管及其制造方法
EP16843279.7A EP3413335B1 (en) 2016-02-03 2016-05-11 Manufacturing method of a thin film transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610076318.7A CN105529275A (zh) 2016-02-03 2016-02-03 薄膜晶体管及其制造方法

Publications (1)

Publication Number Publication Date
CN105529275A true CN105529275A (zh) 2016-04-27

Family

ID=55771418

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610076318.7A Pending CN105529275A (zh) 2016-02-03 2016-02-03 薄膜晶体管及其制造方法

Country Status (4)

Country Link
US (1) US10439070B2 (zh)
EP (1) EP3413335B1 (zh)
CN (1) CN105529275A (zh)
WO (1) WO2017133114A1 (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106935658A (zh) * 2017-05-05 2017-07-07 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、阵列基板
WO2017133114A1 (zh) * 2016-02-03 2017-08-10 京东方科技集团股份有限公司 薄膜晶体管及其制造方法
CN111624236A (zh) * 2020-01-14 2020-09-04 黄辉 一种半导体薄膜气体传感器及其制备方法

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107634068A (zh) * 2017-06-23 2018-01-26 深圳市华星光电半导体显示技术有限公司 阵列基板及其制备方法、显示装置
CN113410365B (zh) * 2021-07-01 2023-11-24 山西中科潞安紫外光电科技有限公司 一种p-AlGaN外延基底的深紫外LED芯片及其制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009094535A (ja) * 2009-01-05 2009-04-30 Casio Comput Co Ltd 酸化亜鉛半導体膜
JP2010258206A (ja) * 2009-04-24 2010-11-11 Konica Minolta Holdings Inc 金属酸化物半導体の製造方法、金属酸化物半導体及びこれを用いた半導体素子、薄膜トランジスタ
CN104282576A (zh) * 2014-10-21 2015-01-14 北京大学深圳研究生院 一种金属氧化物薄膜晶体管制作方法
CN104299915A (zh) * 2014-10-21 2015-01-21 北京大学深圳研究生院 金属氧化物薄膜晶体管制备方法
CN105161423A (zh) * 2015-09-13 2015-12-16 华南理工大学 一种背沟道刻蚀型氧化物薄膜晶体管的制备方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5430248B2 (ja) * 2008-06-24 2014-02-26 富士フイルム株式会社 薄膜電界効果型トランジスタおよび表示装置
TWI396314B (zh) * 2009-07-27 2013-05-11 Au Optronics Corp 畫素結構、有機電激發光顯示單元及其製造方法
CN102122620A (zh) * 2011-01-18 2011-07-13 北京大学深圳研究生院 一种自对准薄膜晶体管的制作方法
CN102522429A (zh) * 2011-12-28 2012-06-27 华南理工大学 一种基于金属氧化物的薄膜晶体管及其制备方法和应用
CN103325840B (zh) * 2013-04-15 2016-05-18 北京大学深圳研究生院 薄膜晶体管及其制作方法
CN105374748B (zh) * 2015-10-13 2018-05-01 深圳市华星光电技术有限公司 薄膜晶体管基板的制作方法及制得的薄膜晶体管基板
CN105529275A (zh) 2016-02-03 2016-04-27 京东方科技集团股份有限公司 薄膜晶体管及其制造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009094535A (ja) * 2009-01-05 2009-04-30 Casio Comput Co Ltd 酸化亜鉛半導体膜
JP2010258206A (ja) * 2009-04-24 2010-11-11 Konica Minolta Holdings Inc 金属酸化物半導体の製造方法、金属酸化物半導体及びこれを用いた半導体素子、薄膜トランジスタ
CN104282576A (zh) * 2014-10-21 2015-01-14 北京大学深圳研究生院 一种金属氧化物薄膜晶体管制作方法
CN104299915A (zh) * 2014-10-21 2015-01-21 北京大学深圳研究生院 金属氧化物薄膜晶体管制备方法
CN105161423A (zh) * 2015-09-13 2015-12-16 华南理工大学 一种背沟道刻蚀型氧化物薄膜晶体管的制备方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017133114A1 (zh) * 2016-02-03 2017-08-10 京东方科技集团股份有限公司 薄膜晶体管及其制造方法
US10439070B2 (en) 2016-02-03 2019-10-08 Boe Technology Group Co., Ltd. Thin-film transistor (TFT) and manufacturing method thereof
CN106935658A (zh) * 2017-05-05 2017-07-07 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、阵列基板
CN106935658B (zh) * 2017-05-05 2021-03-26 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、阵列基板
US11075288B2 (en) 2017-05-05 2021-07-27 Boe Technology Group Co., Ltd. Thin film transistor, manufacturing method therefor, array substrate and display panel
CN111624236A (zh) * 2020-01-14 2020-09-04 黄辉 一种半导体薄膜气体传感器及其制备方法
CN111624236B (zh) * 2020-01-14 2023-12-26 黄辉 一种半导体薄膜气体传感器及其制备方法

Also Published As

Publication number Publication date
US10439070B2 (en) 2019-10-08
US20180090601A1 (en) 2018-03-29
WO2017133114A1 (zh) 2017-08-10
EP3413335B1 (en) 2022-10-26
EP3413335A1 (en) 2018-12-12
EP3413335A4 (en) 2019-09-11

Similar Documents

Publication Publication Date Title
CN105529275A (zh) 薄膜晶体管及其制造方法
US11398505B2 (en) Display substrate and manufacturing method thereof, display panel, and display device
US20160043227A1 (en) Thin film transistor and manufacturing method thereof
WO2017063292A1 (zh) 薄膜晶体管基板的制作方法及制得的薄膜晶体管基板
WO2016061715A1 (zh) 金属氧化物薄膜晶体管制备方法
EP3333900B1 (en) Manufacturing method for thin film transistor
CN103346089B (zh) 一种自对准双层沟道金属氧化物薄膜晶体管及其制作方法
CN106935658A (zh) 一种薄膜晶体管及其制备方法、阵列基板
CN105655389B (zh) 有源层、薄膜晶体管、阵列基板、显示装置及制备方法
CN105633170A (zh) 金属氧化物薄膜晶体管及其制备方法以及阵列基板和显示装置
CN104779302A (zh) 薄膜晶体管及其制作方法、阵列基板、显示装置
CN104916546B (zh) 阵列基板的制作方法及阵列基板和显示装置
CN104766803A (zh) Tft的制作方法及tft、阵列基板、显示装置
CN103985639B (zh) 一种薄膜晶体管及其制备方法、显示基板、显示装置
CN104952935A (zh) 一种薄膜晶体管结构及其制备方法
US10141340B2 (en) Thin-film-transistor, thin-film-transistor array substrate, fabricating methods thereof, and display panel
CN105977306A (zh) 一种自对准薄膜晶体管及其制备方法
CN104157610A (zh) 氧化物半导体tft基板的制作方法及其结构
CN107275007B (zh) 一种复合透明导电薄膜及其制备方法
CN105161423B (zh) 一种背沟道刻蚀型氧化物薄膜晶体管的制备方法
CN103021942B (zh) 阵列基板及其制造方法、显示装置
JP7074683B2 (ja) 導電パターン構造及びその製造方法、アレイ基板、表示装置
CN105470388A (zh) 有机半导体薄膜晶体管及其制作方法
CN104409362A (zh) 一种薄膜晶体管和阵列基板的制作方法及相应装置
CN110506335A (zh) 用于电子器件中金属化的电流诱导暗层形成

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20160427