CN105374748B - 薄膜晶体管基板的制作方法及制得的薄膜晶体管基板 - Google Patents

薄膜晶体管基板的制作方法及制得的薄膜晶体管基板 Download PDF

Info

Publication number
CN105374748B
CN105374748B CN201510659395.0A CN201510659395A CN105374748B CN 105374748 B CN105374748 B CN 105374748B CN 201510659395 A CN201510659395 A CN 201510659395A CN 105374748 B CN105374748 B CN 105374748B
Authority
CN
China
Prior art keywords
metal
thin film
film transistor
base plate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201510659395.0A
Other languages
English (en)
Other versions
CN105374748A (zh
Inventor
刘洋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to CN201510659395.0A priority Critical patent/CN105374748B/zh
Priority to US14/917,567 priority patent/US9881811B2/en
Priority to PCT/CN2015/099273 priority patent/WO2017063292A1/zh
Publication of CN105374748A publication Critical patent/CN105374748A/zh
Priority to US15/823,488 priority patent/US10128127B2/en
Application granted granted Critical
Publication of CN105374748B publication Critical patent/CN105374748B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/44Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02244Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02551Group 12/16 materials
    • H01L21/02554Oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02565Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02631Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66969Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28229Making the insulator by deposition of a layer, e.g. metal, metal compound or poysilicon, followed by transformation thereof into an insulating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Thin Film Transistor (AREA)

Abstract

本发明提供一种薄膜晶体管基板的制作方法及制得的薄膜晶体管基板。本发明的薄膜晶体管基板的制作方法,利用光阻图案作为掩膜,将金属层通过阳极氧化技术直接氧化作为栅极绝缘层或钝化层,同时形成栅电极或源/漏电极图形,整个制作工艺在常温下进行,可在不耐高温的柔性基底上制作,适用于柔性显示技术,不需要耐高温的柔性基板,也不需要使用昂贵的化学气相沉积等高温制程设备,能够大大降低柔性显示器制造的工艺成本。本发明制得的薄膜晶体管基板电学性能优良,适用于柔性显示器。

Description

薄膜晶体管基板的制作方法及制得的薄膜晶体管基板
技术领域
本发明涉及显示技术领域,尤其涉及一种薄膜晶体管基板的制作方法及制得的薄膜晶体管基板。
背景技术
可弯曲显示技术使显示器件的设计不再局限于平面化,而是提供多元的外形与设计,而轻薄、耐冲击的特性则适用于移动电话、PDA或笔记本电脑等便携式产品。这类显示器件柔软可变形且不易损坏,可以安装在弯曲的表面,可以制成人们梦寐以求的电子报刊、墙壁电视、可穿戴的显示器,淋漓尽致的展现有机半导体的魅力。
除此之外,开发柔性显示器件的另一个重要因素在于其工艺可以由sheet-fedBatch Processing(分批装片式制程)转换成Roll-to-Roll Manufacturing(滚动条式制程),意味着显示器件的制造成本可大幅降低。凭借与纸张相似的厚度及柔性、数字电子媒体的信息可更新性、机械性能上的优点、制造成本的优势,柔性显示器件极有可能替换目前的平面显示器件,在新兴市场取得商机。
TFT-LCD(液晶显示器)是指液晶显示器上的每一液晶像素点都是由集成在其后的薄膜晶体管来驱动,利用扫描的方法任意控制一个显示点的ON/OFF,从而可以做到高速度、高亮度、高对比度地显示信息。AMOLED(Active Matrix Oranic Light Emitting Diode,有源有机电致发光显示器件)同样可以用TFT(Thin Film Transistor,薄膜晶体管)驱动,每个像素配备具有开关功能的薄膜晶体管,而且每个像素配备一个电荷存储电容,外围驱动电路和显示阵列整个系统集成在同一基板上。与TFT-LCD的TFT结构不同之处在于,LCD采用电压驱动,而AMOLED采用电流驱动,其亮度与电流成正比,因此除了进行ON/OFF切换动作的选址TFT之外,还需要能让足够电流通过的ON阻抗较低的小型驱动TFT。SRAM(静态随机存储器)同样可以用TFT进行驱动。
传统的柔性显示器的薄膜晶体管制作过程中,由于工艺温度特别是等离子体增强化学气相沉积(PECVD,Plasma Enhanced Chemical Vapor Deposition)工艺温度较高,对基底温度要求较高,柔性显示器中的薄膜晶体管的基底一般采用有机高分子材料,很难承受较高的温度,阻碍了柔性显示技术的发展。
发明内容
本发明的目的在于提供一种薄膜晶体管基板的制作方法,整个制作工艺在常温下进行,适用于柔性显示技术,不需要耐高温的柔性基板,也不需要使用昂贵的化学气相沉积等高温制程设备,能够大大降低柔性显示器制造的工艺成本。
本发明的目的还在于提供一种薄膜晶体管基板,电学性能优良,适用于柔性显示器。
为实现上述目的,本发明提供一种薄膜晶体管基板的制作方法,包括以下步骤:
步骤1、提供一衬底基板,在所述衬底基板上沉积第一金属层;
步骤2、在所述第一金属层上涂布一光阻层,对所述光阻层进行图案化处理,仅保留第一光阻图案,以所述第一光阻图案为掩膜,对所述第一金属层进行阳极氧化处理,使得第一金属层上未被所述第一光阻图案覆盖的部分被氧化,转变为第一金属氧化物,被所述第一光阻图案覆盖的部分未被氧化,依旧为金属;
步骤3、从第一金属层上剥离所述第一光阻图案,继续对所述第一金属层进行阳极氧化处理,将之前被第一光阻图案覆盖的金属表面氧化,形成第一金属氧化物,使得下方未被氧化的金属形成栅极,位于所述栅极与衬底基板上方的第一金属氧化物构成栅极绝缘层;
步骤4、在所述栅极绝缘层上沉积金属氧化物半导体材料,通过一道光刻制程形成有源层;
步骤5、在所述有源层与栅极绝缘层上沉积第二金属层;
步骤6、在所述第二金属层上涂布一光阻层,对所述光阻层进行图案化处理,仅保留第二光阻图案,以所述第二光阻图案为掩膜,对所述第二金属层进行阳极氧化处理,使得第二金属层上未被所述第二光阻图案覆盖的部分被氧化,转变为第二金属氧化物,被所述第二光阻图案覆盖的部分未被氧化,依旧为金属;
步骤7、从第二金属层上剥离所述第二光阻图案,继续对所述第二金属层进行阳极氧化处理,将之前被第二光阻图案覆盖的金属表面氧化,形成第二金属氧化物,使得下方未被氧化的金属形成源极与漏极,位于所述源极、漏极、有源层、以及栅极绝缘层上方的第二金属氧化物构成钝化层;
步骤8、通过一道光刻制程在所述钝化层上对应漏极上方形成一通孔,然后在所述钝化层上沉积一透明导电薄膜,通过一道光刻制程对所述透明导电薄膜进行图案化处理,形成像素电极,所述像素电极通过所述通孔与漏极相接触。
所述第一金属层与第二金属层的材料为铝、镁、钛、铝合金、镁合金、钛合金中的至少一种。
所述金属氧化物半导体材料为ZnO、In2O3、SnO2中的一种或多种的组合。
所述像素电极的材料为氧化铟锡或氧化铟锌。
所述步骤1通过物理气相沉积法沉积所述第一金属层;所述步骤4通过物理气相沉积法沉积所述金属氧化物半导体材料;所述步骤5通过物理气相沉积法沉积所述第二金属层;所述步骤8通过物理气相沉积法沉积所述透明导电薄膜。
所述步骤2、步骤3、步骤6、步骤7中,所述阳极氧化处理过程中采用耐腐蚀导电材料作为阴极;采用弱酸或弱碱溶液作为电解质溶液。
所述阳极氧化处理过程中采用石墨或铂作为阴极;采用柠檬酸溶液或酒石酸铵溶液作为电解质溶液。
本发明还提供一种薄膜晶体管基板,包括:衬底基板、设于所述衬底基板上的栅极、设于所述栅极及衬底基板上的栅极绝缘层、设于所述栅极绝缘层上的有源层、设于所述有源层及栅极绝缘层上的源极与漏极、设于所述源极、漏极、有源层、及栅极绝缘层上的钝化层、以及设于所述钝化层上的像素电极;其中,所述栅极绝缘层的材料为栅极材料的氧化物,所述钝化层的材料为源极与漏极材料的氧化物。
所述钝化层上对应漏极上方形成有一通孔,所述像素电极通过该通孔与漏极相接触。
所述栅极、源极、及漏极的材料为铝、镁、钛、铝合金、镁合金、钛合金中的至少一种;所述有源层的材料为金属氧化物半导体材料;所述像素电极的材料为氧化铟锡或氧化铟锌。
本发明的有益效果:本发明提供一种薄膜晶体管基板的制作方法及制得的薄膜晶体管基板。本发明的薄膜晶体管基板的制作方法,利用光阻图案作为掩膜,将金属层通过阳极氧化技术直接氧化作为栅极绝缘层或钝化层,同时形成栅电极或源/漏电极图形,整个制作工艺在常温下进行,可在不耐高温的柔性基底上制作,适用于柔性显示技术,不需要耐高温的柔性基板,也不需要使用昂贵的化学气相沉积等高温制程设备,能够大大降低柔性显示器制造的工艺成本。本发明制得的薄膜晶体管基板电学性能优良,适用于柔性显示器。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其它有益效果显而易见。
附图中,
图1为阳极氧化技术的原理示意图;
图2为本发明的薄膜晶体管基板的制作方法步骤1的示意图;
图3为本发明的薄膜晶体管基板的制作方法步骤2的示意图;
图4为本发明的薄膜晶体管基板的制作方法步骤3的示意图;
图5为本发明的薄膜晶体管基板的制作方法步骤4的示意图;
图6为本发明的薄膜晶体管基板的制作方法步骤5的示意图;
图7为本发明的薄膜晶体管基板的制作方法步骤6的示意图;
图8为本发明的薄膜晶体管基板的制作方法步骤7的示意图;
图9为本发明的薄膜晶体管基板的制作方法步骤8的示意图暨本发明的薄膜晶体管基板的结构示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
本发明的发明构思为:基于金属氧化物半导体(TOS)薄膜晶体管(TFT)的制作工艺,结合阳极氧化技术,提出一种适用于柔性显示的薄膜晶体管基板的制作方法。阳极氧化(anodic oxidation)技术,是一种金属或合金的电化学氧化技术。金属及其合金在相应的电解液和特定的工艺条件下,由于外加电流的作用下,阳极金属失去电子,使电解质溶液发生电离,发生氧化反应,在阳极金属表面形成一层氧化膜,根据阳极氧化时间的不同,可以形成数纳米至数微米厚的薄膜。
请参阅图1,为阳极氧化技术的原理示意图,如图1所示,提供一金属铝制作的阳极100、以及一石墨或金属铂制作的阴极200,在阳极100与阴极200之间连接一恒压或恒流电源300后,将阳极100与阴极200均浸泡于电解质溶液400中,所述电解质溶液400为柠檬酸溶液、酒石酸铵溶液等弱酸或弱碱溶液,对阳极100与阴极200进行通电后,阳极100发生的电化学反应为:2Al+3H2O→Al2O3+6e+6H+,阴极200发生的电化学反应为:6H2O+6e→3H2+6OH-,由此可见,阳极100发生的反应为金属氧化反应。
基于上述阳极氧化技术,本发明设计利用光阻图案作为掩膜,将金属层通过阳极氧化技术直接氧化作为栅极绝缘层或钝化层,同时形成栅电极或源/漏电极图形,整个制作工艺在常温下进行,可在不耐高温的柔性基底上制作,甚至不需要化学气相沉积等昂贵的高温制程设备,能够大大降低柔性显示器制造的工艺成本。
请参阅图2-9,本发明首先提供一种薄膜晶体管基板的制作方法,包括以下步骤:
步骤1、如图2所示,提供一衬底基板1,在所述衬底基板1上沉积第一金属层10。
具体的,所述衬底基板1可以为柔性基板或者硬质基板。进一步的,所述柔性基板可以为有机高分子材料制作的基板;所述硬质基板可以为玻璃基板。
具体的,所述第一金属层10的材料为铝(Al)、镁(Mg)、钛(Ti)、铝合金、镁合金、钛合金中的至少一种。
具体的,通过物理气相沉积(Physical Vapor Deposition,PVD)等方法沉积所述第一金属层10。
步骤2、如图3所示,在所述第一金属层10上涂布一光阻层,对所述光阻层进行图案化处理,仅保留第一光阻图案12,以所述第一光阻图案12为掩膜,对所述第一金属层10进行阳极氧化处理,使得第一金属层10上未被所述第一光阻图案12覆盖的部分被氧化,转变为第一金属氧化物,被所述第一光阻图案12覆盖的部分未被氧化,依旧为金属。
步骤3、如图4所示,从第一金属层10上剥离所述第一光阻图案12,继续对所述第一金属层10进行阳极氧化处理,控制氧化时间,将之前被第一光阻图案12覆盖的金属表面氧化,形成第一金属氧化物,使得下方未被氧化的金属形成栅极2,位于所述栅极2与衬底基板1上方的第一金属氧化物构成栅极绝缘层3。
步骤4、如图5所示,在所述栅极绝缘层3上沉积金属氧化物半导体材料,通过一道光刻制程形成有源层(Active Layer)4。
优选的,所述金属氧化物半导体材料为ZnO、In2O3、SnO2中的一种或多种的组合。
具体的,通过物理气相沉积等方法沉积所述金属氧化物半导体材料。
具体的,所述光刻制程包括涂光阻、曝光、显影、及蚀刻过程。
步骤5、如图6所示,在所述有源层4与栅极绝缘层3上沉积第二金属层50。
具体的,所述第二金属层50的材料为铝(Al)、镁(Mg)、钛(Ti)、铝合金、镁合金、钛合金中的至少一种。
具体的,通过物理气相沉积等方法沉积所述第二金属层50。
步骤6、如图7所示,在所述第二金属层50上涂布一光阻层,对所述光阻层进行图案化处理,仅保留第二光阻图案52,以所述第二光阻图案52为掩膜,对所述第二金属层50进行阳极氧化处理,使得第二金属层50上未被所述第二光阻图案52覆盖的部分被氧化,转变为第二金属氧化物,被所述第二光阻图案52覆盖的部分未被氧化,依旧为金属。
步骤7、如图8所示,从第二金属层50上剥离所述第二光阻图案52,继续对所述第二金属层50进行阳极氧化处理,控制氧化时间,将之前被第二光阻图案52覆盖的金属表面氧化,形成第二金属氧化物,使得下方未被氧化的金属形成源极51与漏极53,位于所述源极51、漏极53、有源层4、以及栅极绝缘层3上方的第二金属氧化物构成钝化层6。
具体的,所述步骤2、步骤3、步骤6、步骤7中,所述阳极氧化处理过程中采用石墨或铂等耐腐蚀导电材料作为阴极100;采用柠檬酸溶液或酒石酸铵溶液等弱酸或弱碱溶液作为电解质溶液400。
步骤8、如图9所示,通过一道光刻制程在所述钝化层6上对应漏极53上方形成一通孔61,然后在所述钝化层6上沉积一透明导电薄膜,通过一道光刻制程对所述透明导电薄膜进行图案化处理,形成像素电极7,所述像素电极7通过所述通孔61与漏极53相接触。
具体的,所述像素电极7的材料为ITO(氧化铟锡)、或IZO(氧化铟锌)等透明导电材料。
具体的,通过物理气相沉积等方法沉积所述透明导电薄膜。
上述薄膜晶体管基板的制作方法,利用光阻图案作为掩膜,将金属层通过阳极氧化技术直接氧化作为栅极绝缘层或钝化层,同时形成栅电极或源/漏电极图形,整个制作工艺在常温下进行,可在不耐高温的柔性基底上制作,甚至不需要化学气相沉积等昂贵的高温制程设备,能够大大降低柔性显示器制造的工艺成本。
请参阅图9,本发明还提供一种薄膜晶体管基板,包括:衬底基板1、设于所述衬底基板1上的栅极2、设于所述栅极2及衬底基板1上的栅极绝缘层3、设于所述栅极绝缘层3上的有源层4、设于所述有源层4及栅极绝缘层3上的源极51与漏极53、设于所述源极51、漏极53、有源层4、及栅极绝缘层3上的钝化层6、以及设于所述钝化层6上的像素电极7;其中,所述栅极绝缘层3的材料为栅极2材料的氧化物,所述钝化层6的材料为源极51与漏极53材料的氧化物。
具体的,所述钝化层6上对应漏极53上方形成有一通孔61,所述像素电极7通过该通孔61与漏极53相接触。
具体的,所述衬底基板1可以为柔性基板或者硬质基板。进一步的,所述柔性基板可以为有机高分子材料制作的基板;所述硬质基板可以为玻璃基板。
具体的,所述栅极2的材料为铝(Al)、镁(Mg)、钛(Ti)、铝合金、镁合金、钛合金中的至少一种。
所述有源层4的材料为金属氧化物半导体材料,优选的,所述金属氧化物半导体材料为ZnO、In2O3、或SnO2中的一种或多种的组合。
所述源极51与漏极53的材料为铝(Al)、镁(Mg)、钛(Ti)、铝合金、镁合金、钛合金中的至少一种。
具体的,所述像素电极7的材料为ITO(氧化铟锡)、或IZO(氧化铟锌)等透明导电材料。
综上所述,本发明提供一种薄膜晶体管基板的制作方法及制得的薄膜晶体管基板。本发明的薄膜晶体管基板的制作方法,利用光阻图案作为掩膜,将金属层通过阳极氧化技术直接氧化作为栅极绝缘层或钝化层,同时形成栅电极或源/漏电极图形,整个制作工艺在常温下进行,可在不耐高温的柔性基底上制作,甚至不需要化学气相沉积等昂贵的高温制程设备,能够大大降低柔性显示器制造的工艺成本。本发明制得的薄膜晶体管基板电学性能优良,适用于柔性显示器。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

1.一种薄膜晶体管基板的制作方法,其特征在于,包括以下步骤:
步骤1、提供一衬底基板(1),在所述衬底基板(1)上沉积第一金属层(10);
步骤2、在所述第一金属层(10)上涂布一光阻层,对所述光阻层进行图案化处理,仅保留第一光阻图案(12),以所述第一光阻图案(12)为掩膜,对所述第一金属层(10)进行阳极氧化处理,使得第一金属层(10)上未被所述第一光阻图案(12)覆盖的部分被氧化,转变为第一金属氧化物,被所述第一光阻图案(12)覆盖的部分未被氧化,依旧为金属;
步骤3、从第一金属层(10)上剥离所述第一光阻图案(12),继续对所述第一金属层(10)进行阳极氧化处理,将之前被第一光阻图案(12)覆盖的金属表面氧化,形成第一金属氧化物,使得下方未被氧化的金属形成栅极(2),位于所述栅极(2)与衬底基板(1)上方的第一金属氧化物构成栅极绝缘层(3);
步骤4、在所述栅极绝缘层(3)上沉积金属氧化物半导体材料,通过一道光刻制程形成有源层(4);
步骤5、在所述有源层(4)与栅极绝缘层(3)上沉积第二金属层(50);
步骤6、在所述第二金属层(50)上涂布一光阻层,对所述光阻层进行图案化处理,仅保留第二光阻图案(52),以所述第二光阻图案(52)为掩膜,对所述第二金属层(50)进行阳极氧化处理,使得第二金属层(50)上未被所述第二光阻图案(52)覆盖的部分被氧化,转变为第二金属氧化物,被所述第二光阻图案(52)覆盖的部分未被氧化,依旧为金属;
步骤7、从第二金属层(50)上剥离所述第二光阻图案(52),继续对所述第二金属层(50)进行阳极氧化处理,将之前被第二光阻图案(52)覆盖的金属表面氧化,形成第二金属氧化物,使得下方未被氧化的金属形成源极(51)与漏极(53),位于所述源极(51)、漏极(53)、有源层(4)、以及栅极绝缘层(3)上方的第二金属氧化物构成钝化层(6);
步骤8、通过一道光刻制程在所述钝化层(6)上对应漏极(53)上方形成一通孔(61),然后在所述钝化层(6)上沉积一透明导电薄膜,通过一道光刻制程对所述透明导电薄膜进行图案化处理,形成像素电极(7),所述像素电极(7)通过所述通孔(61)与漏极(53)相接触。
2.如权利要求1所述的薄膜晶体管基板的制作方法,其特征在于,所述第一金属层(10)与第二金属层(50)的材料为铝、镁、钛、铝合金、镁合金、钛合金中的至少一种。
3.如权利要求1所述的薄膜晶体管基板的制作方法,其特征在于,所述金属氧化物半导体材料为ZnO、In2O3、SnO2中的一种或多种的组合。
4.如权利要求1所述的薄膜晶体管基板的制作方法,其特征在于,所述像素电极(7)的材料为氧化铟锡或氧化铟锌。
5.如权利要求1所述的薄膜晶体管基板的制作方法,其特征在于,所述步骤1通过物理气相沉积法沉积所述第一金属层(10);所述步骤4通过物理气相沉积法沉积所述金属氧化物半导体材料;所述步骤5通过物理气相沉积法沉积所述第二金属层(50);所述步骤8通过物理气相沉积法沉积所述透明导电薄膜。
6.如权利要求1所述的薄膜晶体管基板的制作方法,其特征在于,所述步骤2、步骤3、步骤6、步骤7中,所述阳极氧化处理过程中采用耐腐蚀导电材料作为阴极(100);采用弱酸或弱碱溶液作为电解质溶液(400)。
7.如权利要求6所述的薄膜晶体管基板的制作方法,其特征在于,所述阳极氧化处理过程中采用石墨或铂作为阴极(100);采用柠檬酸溶液或酒石酸铵溶液作为电解质溶液(400)。
8.一种由权利要求1-7任意一项所述的薄膜晶体管基板的制作方法制作而成的薄膜晶体管基板,其特征在于,包括:衬底基板(1)、设于所述衬底基板(1)上的栅极(2)、设于所述栅极(2)及衬底基板(1)上的栅极绝缘层(3)、设于所述栅极绝缘层(3)上的有源层(4)、设于所述有源层(4)及栅极绝缘层(3)上的源极(51)与漏极(53)、设于所述源极(51)、漏极(53)、有源层(4)、及栅极绝缘层(3)上的钝化层(6)、以及设于所述钝化层(6)上的像素电极(7);其中,所述栅极绝缘层(3)的材料为栅极(2)材料的氧化物,所述钝化层(6)的材料为源极(51)与漏极(53)材料的氧化物。
9.如权利要求8所述的薄膜晶体管基板,其特征在于,所述钝化层(6)上对应漏极(53)上方形成有一通孔(61),所述像素电极(7)通过该通孔(61)与漏极(53)相接触。
10.如权利要求8所述的薄膜晶体管基板,其特征在于,所述栅极(2)、源极(51)、及漏极(53)的材料为铝、镁、钛、铝合金、镁合金、钛合金中的至少一种;所述有源层(4)的材料为金属氧化物半导体材料;所述像素电极(7)的材料为氧化铟锡或氧化铟锌。
CN201510659395.0A 2015-10-13 2015-10-13 薄膜晶体管基板的制作方法及制得的薄膜晶体管基板 Active CN105374748B (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN201510659395.0A CN105374748B (zh) 2015-10-13 2015-10-13 薄膜晶体管基板的制作方法及制得的薄膜晶体管基板
US14/917,567 US9881811B2 (en) 2015-10-13 2015-12-28 Thin-film transistor substrate manufacturing method and thin-film transistor substrate manufactured with same
PCT/CN2015/099273 WO2017063292A1 (zh) 2015-10-13 2015-12-28 薄膜晶体管基板的制作方法及制得的薄膜晶体管基板
US15/823,488 US10128127B2 (en) 2015-10-13 2017-11-27 Thin-film transistor substrate manufacturing method and thin-film transistor substrate manufactured with same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510659395.0A CN105374748B (zh) 2015-10-13 2015-10-13 薄膜晶体管基板的制作方法及制得的薄膜晶体管基板

Publications (2)

Publication Number Publication Date
CN105374748A CN105374748A (zh) 2016-03-02
CN105374748B true CN105374748B (zh) 2018-05-01

Family

ID=55376811

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510659395.0A Active CN105374748B (zh) 2015-10-13 2015-10-13 薄膜晶体管基板的制作方法及制得的薄膜晶体管基板

Country Status (3)

Country Link
US (2) US9881811B2 (zh)
CN (1) CN105374748B (zh)
WO (1) WO2017063292A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108919575A (zh) * 2018-07-16 2018-11-30 惠科股份有限公司 阵列基板、显示面板及其制造方法

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104979406B (zh) * 2015-07-31 2018-05-25 京东方科技集团股份有限公司 薄膜晶体管、阵列基板及其制备方法和显示装置
CN105529275A (zh) * 2016-02-03 2016-04-27 京东方科技集团股份有限公司 薄膜晶体管及其制造方法
CN106024638A (zh) * 2016-07-20 2016-10-12 深圳市华星光电技术有限公司 薄膜晶体管及其制作方法
CN108172612B (zh) * 2016-12-07 2020-07-10 清华大学 一种薄膜晶体管及其制备方法
KR102676341B1 (ko) * 2016-12-30 2024-06-17 엘지디스플레이 주식회사 박막 트랜지스터, 그의 제조방법, 및 그를 포함한 표시장치
CN107086181B (zh) * 2017-04-18 2021-08-13 京东方科技集团股份有限公司 薄膜晶体管及其制作方法、阵列基板和显示器
CN107331708B (zh) * 2017-06-30 2020-06-16 京东方科技集团股份有限公司 薄膜晶体管的制作方法、阵列基板的制作方法及阵列基板、显示装置
CN107910375A (zh) * 2017-11-02 2018-04-13 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、阵列基板和显示装置
CN109728050A (zh) 2019-01-02 2019-05-07 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示面板和显示装置
CN109887930A (zh) * 2019-02-20 2019-06-14 深圳市华星光电技术有限公司 显示面板及其制作方法
CN112420926A (zh) * 2019-08-23 2021-02-26 天津大学 具有共栅极接触位点的限域生长的氧化铝介电层及其制备方法和应用
CN111146277A (zh) * 2020-01-02 2020-05-12 歌尔股份有限公司 场效应晶体管及其制备方法
CN111192889A (zh) * 2020-01-07 2020-05-22 京东方科技集团股份有限公司 光检测模块及其制备方法、光检测基板
CN111627923A (zh) * 2020-04-16 2020-09-04 福建华佳彩有限公司 一种半导体结构
CN112114460B (zh) * 2020-09-23 2022-12-23 北海惠科光电技术有限公司 基于阵列基板的绝缘单元及其制备方法、阵列基板及其制备方法、显示机构
CN112466931A (zh) 2020-11-27 2021-03-09 Tcl华星光电技术有限公司 电极结构及其制备方法、薄膜晶体管

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101894846A (zh) * 2009-05-21 2010-11-24 友达光电股份有限公司 电泳式显示器、主动元件阵列背板及其制造方法
CN102522429A (zh) * 2011-12-28 2012-06-27 华南理工大学 一种基于金属氧化物的薄膜晶体管及其制备方法和应用

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0730125A (ja) * 1993-07-07 1995-01-31 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JPH10242469A (ja) * 1997-02-27 1998-09-11 Sharp Corp 薄膜トランジスタの製造方法
CN101911269B (zh) * 2008-11-18 2013-05-01 松下电器产业株式会社 柔性半导体装置及其制造方法
KR20120048590A (ko) * 2009-07-31 2012-05-15 고쿠리츠 다이가쿠 호진 도호쿠 다이가쿠 반도체 장치, 반도체 장치의 제조 방법, 및 표시 장치
US8653517B2 (en) * 2010-04-06 2014-02-18 Hitachi, Ltd. Thin-film transistor and method for manufacturing the same
CN102332404A (zh) * 2011-09-21 2012-01-25 华南理工大学 基于阳极氧化绝缘层的薄膜晶体管的制备方法
CN102629628B (zh) * 2011-09-29 2016-06-01 京东方科技集团股份有限公司 一种tft阵列基板及其制造方法和液晶显示器
KR20140125181A (ko) * 2013-04-18 2014-10-28 삼성디스플레이 주식회사 평판표시장치용 백플레인 및 그의 제조방법

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101894846A (zh) * 2009-05-21 2010-11-24 友达光电股份有限公司 电泳式显示器、主动元件阵列背板及其制造方法
CN102522429A (zh) * 2011-12-28 2012-06-27 华南理工大学 一种基于金属氧化物的薄膜晶体管及其制备方法和应用

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108919575A (zh) * 2018-07-16 2018-11-30 惠科股份有限公司 阵列基板、显示面板及其制造方法

Also Published As

Publication number Publication date
US9881811B2 (en) 2018-01-30
CN105374748A (zh) 2016-03-02
US10128127B2 (en) 2018-11-13
US20180082856A1 (en) 2018-03-22
WO2017063292A1 (zh) 2017-04-20
US20170256421A1 (en) 2017-09-07

Similar Documents

Publication Publication Date Title
CN105374748B (zh) 薄膜晶体管基板的制作方法及制得的薄膜晶体管基板
CN107808895B (zh) 透明oled显示器及其制作方法
JP6552573B2 (ja) 半導体装置
US9876037B2 (en) Thin-film transistor array substrate and manufacturing method thereof
US9741752B1 (en) Method for manufacturing TFT substrate
WO2020258185A1 (zh) 显示基板及其制备方法、显示面板和显示装置
CN106653768A (zh) Tft背板及其制作方法
CN106449666B (zh) 阵列基板和显示装置
CN103715228A (zh) 阵列基板及其制造方法、显示装置
US10204922B2 (en) Thin film transistor, array substrate and manufacturing method thereof, and display device
CN103839973A (zh) 有源矩阵有机发光二极管阵列基板及制作方法和显示装置
US20170352534A1 (en) Array substrate, method for manufacturing the same, and display device
CN104538421A (zh) Oled显示基板及其制造方法
CN106898617A (zh) 基板及其制备方法、显示面板和显示装置
US9142653B2 (en) Method for manufacturing thin-film transistor array substrate
CN107799466A (zh) Tft基板及其制作方法
CN103887245A (zh) 一种阵列基板的制造方法
CN102629592A (zh) 阵列基板及其制作方法、显示装置
CN105529275A (zh) 薄膜晶体管及其制造方法
CN105097673A (zh) Tft基板结构的制作方法
CN106430083B (zh) 纳米级柱状物林的制作方法
CN105765724A (zh) 一种基于oled的tft阵列基板结构
CN107731352A (zh) 柔性电子玻璃透明导电氧化物薄膜电路制备方法
US10325935B2 (en) Display panel, production method of the same, and display apparatus
CN106661714A (zh) 利用锡金属靶形成锡氧化物层的方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant