CN105474543A - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN105474543A
CN105474543A CN201380079050.7A CN201380079050A CN105474543A CN 105474543 A CN105474543 A CN 105474543A CN 201380079050 A CN201380079050 A CN 201380079050A CN 105474543 A CN105474543 A CN 105474543A
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temperature detection
semiconductor device
diode
transistor
emitter
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石原三纪夫
日山一明
川濑达也
大佐贺毅
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

在半导体衬底(8)之上设置有晶体管(2)。对半导体衬底(8)的上表面的温度进行监测的温度检测用二极管(4)设置在半导体衬底(8)之上。外部电极(7)与晶体管(2)的发射极(E)、温度检测用二极管(4)的阴极(K)共同地连接。由此，能够省略温度检测用二极管(4)的阴极(K)用的外部电极，因此能够使装置小型化、提高组装性。

Description

半导体装置
技术领域
本发明涉及具有片上(on-chip)型温度检测用二极管的半导体装置，涉及能够使装置小型化、提高组装性的半导体装置。
背景技术
设置有IGBT或MOSFET等半导体芯片的半导体装置被用于对电流的接通和切断高速地进行切换的通断动作。如果持续进行通断动作，则芯片会由于流过芯片的电流和施加在芯片的电压的积分所得到的功率损耗而发热。如果芯片的温度超过工作保障范围，则有可能破坏芯片。
因此，为了使芯片的温度不超过工作保障值，使用了内置有片上型温度检测用二极管的半导体装置(例如，参照专利文献1)。由于二极管的VF与温度成正比地降低，因此通过监测VF的值能够检测芯片的温度。例如，通过基于该芯片温度而进行模块的过热保护或将芯片温度反馈至车辆的冷却系统的动作条件，从而能够使功率损耗最优化。
专利文献1：日本特开2009-159662号公报
发明内容
控制电路进行半导体装置的栅极、基极等的驱动及过热保护等。温度检测用二极管的阴极与该控制电路的基准电位(接地)连接。通常IGBT的发射极或MOSFET的源极也与基准电位连接。但是，在现有的半导体装置中，温度检测用二极管的阴极与IGBT的发射极在装置内相互分离。因此，需要将外部电极分别与各端子连接，成为产品尺寸的小型化的阻碍要因。另外，由于外部电极的数量多，因此也具有难以向设置有控制电路的控制基板进行装配、组装的成本变高这样的问题。
本发明就是为了解决上述这样的课题而提出的，其目的在于得到一种能够使装置小型化、提高组装性的半导体装置。
本发明涉及的半导体装置的特征在于，具有：半导体衬底；晶体管，其设置在所述半导体衬底之上；温度检测用二极管，其设置在所述半导体衬底之上，对所述半导体衬底的上表面的温度进行监测；以及外部电极，其与所述晶体管的发射极或源极、所述温度检测用二极管的阴极共同地连接。
发明的效果
利用本发明，能够使装置小型化、提高组装性。
附图说明
图1是表示本发明的实施方式1涉及的半导体装置的电路图。
图2是表示本发明的实施方式1涉及的半导体装置的俯视图。
图3是表示对比例涉及的半导体装置的电路图。
图4是表示本发明的实施方式2涉及的半导体装置的俯视图。
图5是表示本发明的实施方式3涉及的半导体装置的俯视图。
图6是表示本发明的实施方式4涉及的半导体装置的俯视图。
图7是表示本发明的实施方式5涉及的半导体装置的俯视图。
图8是表示本发明的实施方式5涉及的半导体装置的剖视图。
具体实施方式
参照附图，对本发明的实施方式涉及的半导体装置进行说明。对相同或相应的结构要素标注相同的标号，有时省略重复的说明。
实施方式1
图1是表示本发明的实施方式1涉及的半导体装置的电路图。在封装件1内设置有晶体管2、续流二极管3以及温度检测用二极管4。在此处，晶体管2为IGBT，但不限于此，也可以为MOSFET。外部电极5与晶体管2的栅极G连接，外部电极6与温度检测用二极管4的阳极A连接，外部电极7与晶体管2的发射极E(或者MOSFET的源极)、温度检测用二极管4的阴极K共同地连接。
图2是表示本发明的实施方式1涉及的半导体装置的俯视图。在半导体衬底8之上设置有晶体管2。对半导体衬底8的上表面的温度进行监测的温度检测用二极管4被设置在半导体衬底8之上。Al或者Cu等的多根导线9与晶体管2的发射极E连接。导线10在半导体衬底8之上将晶体管2的发射极E和温度检测用二极管4的阴极K相连接。
下面，与对比例进行比较而说明本实施方式的效果。图3是表示对比例涉及的半导体装置的电路图。在对比例中，由于晶体管2的发射极E与温度检测用二极管4的阴极K在装置内相互分离，因此需要将外部电极7、11分别与各端子连接。
与之相对，在本实施方式中由于在装置内部发射极E与阴极K相连接，因此能够省略温度检测用二极管4的阴极K用的外部电极11。由此，能够使装置小型化、提高组装性。另外，仅通过在已有的构造追加导线10即可将发射极E与阴极K进行连接。
实施方式2
图4是表示本发明的实施方式2涉及的半导体装置的俯视图。在实施方式1中将温度检测用二极管4配置在阳极A与阴极K之间，但在本实施方式中将温度检测用二极管4配置在芯片中央。即使如上述这样将温度检测用二极管4配置在除了阳极A与阴极K之间以外的位置，也能够取得与实施方式1同样的效果。
实施方式3
图5是表示本发明的实施方式3涉及的半导体装置的俯视图。将主电路配线的多根导线9之中的1根进行缝焊(stitch)而在芯片之上与温度检测用二极管4的阴极K连接。由此，在装置内部，晶体管2的发射极E与温度检测用二极管4的阴极K连接，因此能够对两者共用一个外部电极7。另外，与实施方式1、2相比能够改善组装效率。
实施方式4
图6是表示本发明的实施方式4涉及的半导体装置的俯视图。中继焊盘12配置在半导体衬底8的外部。Al或Cu等的导线13将中继焊盘12与晶体管2的发射极E或源极进行连接。Al或Cu等的导线14将中继焊盘12与温度检测用二极管4的阴极K进行连接。由此，在装置内部，晶体管2的发射极E与温度检测用二极管4的阴极K相连接，因此能够对两者共用一个外部电极7。另外，不需要将芯片上的导线键合点相对于已有的构造进行变更，不会对主电路的发射极配线造成影响。
实施方式5
图7是表示本发明的实施方式5涉及的半导体装置的俯视图。图8是表示本发明的实施方式5涉及的半导体装置的剖视图。电极板15配置在半导体衬底8之上。电极板15的背面通过焊料等导电性接合剂16与晶体管2的发射极E相连接。Al或Cu等的导线17将电极板15的上表面与温度检测用二极管4的阴极K进行连接。由此，在装置内部，晶体管2的发射极E与温度检测用二极管4的阴极K相连接，因此能够对两者共用1个外部电极7。另外，无需相对于将电极板15接合在芯片上表面的已有的构造，重新设计电极板15的构造。
此外，半导体衬底8不限于由硅所形成，也可以由与硅相比带隙较大的宽带隙半导体所形成。宽带隙半导体例如是碳化硅、氮化镓类材料或者金刚石。由这样的宽带隙半导体所形成的功率半导体装置因为耐压性、容许电流密度高，所以能够小型化。通过利用该小型化的装置，能够使安装了该装置的半导体模块也小型化。另外，由于装置的耐热性高，因此能够使散热器的散热鳍片小型化、能够使水冷部空冷化，所以能够使半导体模块进一步地小型化。另外，由于装置的功率损耗低且高效率，因此能够使半导体模块高效率化。
标号的说明
2晶体管，4温度检测用二极管，7外部电极，8半导体衬底，9、10、13、14、17导线，12中继焊盘，15电极板，E发射极，K阴极

Claims (5)

1.一种半导体装置，其特征在于，具有：
半导体衬底；
晶体管，其设置在所述半导体衬底之上；
温度检测用二极管，其设置在所述半导体衬底之上，对所述半导体衬底的上表面的温度进行监测；以及
外部电极，其与所述晶体管的发射极或源极、所述温度检测用二极管的阴极共同地连接。
2.根据权利要求1所述的半导体装置，其特征在于，
还具有导线，该导线将所述晶体管的发射极或源极与所述温度检测用二极管的阴极进行连接。
3.根据权利要求1所述的半导体装置，其特征在于，
还具有与所述晶体管的发射极或源极相连接的多根导线，
将所述多根导线之中的1根进行缝焊而与所述温度检测用二极管的阴极相连接。
4.根据权利要求1所述的半导体装置，其特征在于，还具有：
中继焊盘，其配置在所述半导体衬底的外部；
第1导线，其将所述中继焊盘与所述晶体管的发射极或源极进行连接；以及
第2导线，其将所述中继焊盘与所述温度检测用二极管的阴极进行连接。
5.根据权利要求1所述的半导体装置，其特征在于，还具有：
电极板，其配置在所述半导体衬底之上，背面与所述晶体管的发射极或源极相接合；以及
导线，其将所述电极板的上表面与所述温度检测用二极管的阴极进行连接。
CN201380079050.7A 2013-08-23 2013-08-23 半导体装置 Pending CN105474543A (zh)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110176446A (zh) * 2018-02-20 2019-08-27 三菱电机株式会社 半导体装置
WO2022011954A1 (zh) * 2020-07-17 2022-01-20 长鑫存储技术有限公司 半导体装置
US11430709B2 (en) 2020-07-17 2022-08-30 Changxin Memory Technologies, Inc. Semiconductor device
US11462257B2 (en) 2020-07-17 2022-10-04 Changxin Memory Technologies, Inc. Semiconductor device
US11521661B2 (en) 2020-07-17 2022-12-06 Changxin Memory Technologies, Inc. Semiconductor device

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112013007376T5 (de) 2013-08-28 2016-05-19 Mitsubishi Electric Corporation Halbleitervorrichtung
JP6665457B2 (ja) * 2015-09-16 2020-03-13 富士電機株式会社 半導体装置
JP2017069716A (ja) * 2015-09-29 2017-04-06 株式会社オートネットワーク技術研究所 半導体装置及び制御装置
JP6602480B2 (ja) * 2016-07-26 2019-11-06 三菱電機株式会社 半導体装置
CN110100314B (zh) * 2017-06-09 2022-08-09 富士电机株式会社 半导体装置及半导体装置的制造方法
EP3657186B1 (en) * 2017-07-18 2024-03-27 Sang-Hun Lee Rf power device capable of monitoring temperature and rf characteristics at wafer level
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JP7334435B2 (ja) * 2019-03-22 2023-08-29 富士電機株式会社 半導体装置および半導体装置の検査方法
GB201919194D0 (en) 2019-12-23 2020-02-05 Eaton Intelligent Power Ltd Ball valve with integral gear
US20230154815A1 (en) * 2020-04-27 2023-05-18 Rohm Co., Ltd. Semiconductor device
JP2022038003A (ja) * 2020-08-26 2022-03-10 三菱電機株式会社 半導体装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5642252A (en) * 1993-08-18 1997-06-24 Hitachi, Ltd. Insulated gate semiconductor device and driving circuit device and electronic system both using the same
US20040051145A1 (en) * 2000-09-29 2004-03-18 Takeshi Nobe Semiconductor device with protective functions
US20050156267A1 (en) * 2004-01-13 2005-07-21 Shogo Mori Semiconductor device provided with temperature detection function
CN103098198A (zh) * 2010-09-03 2013-05-08 三菱电机株式会社 半导体装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03188661A (ja) 1989-12-18 1991-08-16 Toshiba Corp 樹脂封止型半導体装置
JP3552888B2 (ja) 1997-11-11 2004-08-11 富士電機デバイステクノロジー株式会社 インテリジェントパワーモジュールおよびその試験方法
JP2000058820A (ja) * 1998-08-07 2000-02-25 Hitachi Ltd パワー半導体素子及びパワーモジュール
JP3509623B2 (ja) 1999-04-26 2004-03-22 トヨタ自動車株式会社 半導体スイッチ素子チップの温度検出構造および温度検出装置並びに半導体リレー
JP4710131B2 (ja) 2000-12-21 2011-06-29 株式会社豊田自動織機 半導体装置
JP3701228B2 (ja) 2001-11-01 2005-09-28 三菱電機株式会社 半導体装置
JP4323299B2 (ja) 2003-12-03 2009-09-02 三菱電機株式会社 半導体装置
JP2006049567A (ja) 2004-08-04 2006-02-16 Nissan Motor Co Ltd 半導体装置の使用方法及び半導体装置
JP2009159662A (ja) 2007-12-25 2009-07-16 Fuji Electric Systems Co Ltd 電力用半導体素子の制御回路
JP2009206140A (ja) 2008-02-26 2009-09-10 Sumitomo Electric Ind Ltd パワーモジュール
DE112013007376T5 (de) 2013-08-28 2016-05-19 Mitsubishi Electric Corporation Halbleitervorrichtung

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5642252A (en) * 1993-08-18 1997-06-24 Hitachi, Ltd. Insulated gate semiconductor device and driving circuit device and electronic system both using the same
US20040051145A1 (en) * 2000-09-29 2004-03-18 Takeshi Nobe Semiconductor device with protective functions
US20050156267A1 (en) * 2004-01-13 2005-07-21 Shogo Mori Semiconductor device provided with temperature detection function
CN103098198A (zh) * 2010-09-03 2013-05-08 三菱电机株式会社 半导体装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110176446A (zh) * 2018-02-20 2019-08-27 三菱电机株式会社 半导体装置
CN110176446B (zh) * 2018-02-20 2023-10-03 三菱电机株式会社 半导体装置
WO2022011954A1 (zh) * 2020-07-17 2022-01-20 长鑫存储技术有限公司 半导体装置
US11430709B2 (en) 2020-07-17 2022-08-30 Changxin Memory Technologies, Inc. Semiconductor device
US11462257B2 (en) 2020-07-17 2022-10-04 Changxin Memory Technologies, Inc. Semiconductor device
US11521661B2 (en) 2020-07-17 2022-12-06 Changxin Memory Technologies, Inc. Semiconductor device

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