CN105359267A - 包括具有至少部分被电介质层包围的多个金属芯的互连件的互连系统 - Google Patents

包括具有至少部分被电介质层包围的多个金属芯的互连件的互连系统 Download PDF

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Publication number
CN105359267A
CN105359267A CN201480038207.6A CN201480038207A CN105359267A CN 105359267 A CN105359267 A CN 105359267A CN 201480038207 A CN201480038207 A CN 201480038207A CN 105359267 A CN105359267 A CN 105359267A
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Prior art keywords
nude film
lead
dielectric
interconnection system
metal
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CN201480038207.6A
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CN105359267B (zh
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S·S·卡希尔
E·A·圣胡安
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Rosenberger Hochfrequenztechnik GmbH and Co KG
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Rosenberger Hochfrequenztechnik GmbH and Co KG
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Abstract

本发明涉及一种裸片互连系统，包括：第一裸片(1)，其具有多个连接压焊点(3)；以及至少一个互连件(10,20)，其从第一裸片(1)延伸出，其中该互连件包括具有芯直径的多个金属芯(12,42)、包围金属芯(12,42)的具有电介质厚度的电介质层(15,43)、以及贴装接地的外金属层(41)，其中电介质层(15,43)的至少一部分沿着多个金属芯(12,42)的长度包围邻接的金属芯(12,42)。

Description

包括具有至少部分被电介质层包围的多个金属芯的互连件的互连系统
技术领域
本发明涉及包括呈分立的封装裸片和同一封装裸片这两者的改进了的裸片到裸片或裸片到衬底的互连件。此外，本发明涉及阻抗不同的源和负载之间的改进了的互连所用的槽线。
此外，说明促使热传递远离裸片的热传递互连结构。这些互连结构在多裸片封装体和堆叠状裸片封装体中特别有用。
背景技术
电子器件和组件正以不断增加的速度并且在越来越高的频率范围内进行工作。普及的半导体封装体类型使用可以连接至衬底或引线框架的焊线，而该衬底或引线框架可以连接至第二级互连件、通孔、衬底或封装体走线或者焊球等，从而连接至电子器件的印刷电路板(PCB)。
然而，引线可能不具有包括刚性和强度的适当的机械性质。在其它实施例中，特别是在电介质层厚的情况下，裸片间距的限制可能不允许利用非重叠的电介质层涂布不同的引线。
此外，可能无法针对包括阻抗不同的源和负载之间的互连的特殊电气特性而优化传统的封装体引线。
此外，随着速度增加，功率要求和用以以远离裸片的方式传递废热的需求也增加。这对于堆叠的裸片而言成为特殊问题，其中利用衬底材料或其它发热裸片使叠层中的内部裸片的顶部和底部有效地绝缘。
发明内容
考虑到现有技术的这些问题和不足，因此本发明的目的是提供用于使具有至少一个裸片的半导体裸片封装体相互连接的互连系统，其中该系统在对电气特性的影响最小的情况下，改进了连接引线的机械性质。
在对电气特性的影响最小的情况下，可以通过使电介质层熔融到金属涂布带来改进裸片封装体所用的引线的机械性质。
在本发明中实现本领域技术人员将明白的上述和其它目的，其中本发明涉及一种互连系统，用于使半导体裸片封装体相互连接，所述互连系统包括：第一裸片，其具有多个连接压焊点；以及带状引线，其从所述第一裸片延伸出，所述带状引线包括具有芯直径的多个金属芯、包围所述金属芯的具有电介质厚度的电介质层和贴装接地的外金属层，其中电介质的至少一部分沿着所述多个金属芯的长度熔融在邻接的金属芯之间。
根据本发明，在对电气特性的影响最小的情况下，可以通过使电介质层熔融到金属涂布带来改进裸片封装体所用的引线的机械性质。
此外，可以通过使电介质层部分或全部熔融到部分或全部涂布的金属带来创建槽线。这样使得能够实现阻抗不同的源和负载之间的改进了的互连、以及向封装体或衬底安装的天线(包括贴片天线)的更好信号传递特性。
此外，热传递带互连结构可以促使热传递远离裸片。这种带互连结构在多裸片封装体和堆叠状裸片封装体中特别有用。
互连系统可以是多裸片互连系统，其包括第一裸片和第二裸片，各裸片分别具有多个连接压焊点，其中带状引线从第一裸片向第二裸片延伸。
互连系统可以是槽线互连系统，其包括第一裸片和第二裸片，各裸片分别具有多个连接压焊点，其中带状引线从第一裸片向第二裸片延伸。
互连系统可以是槽线互连系统，其包括具有多个连接压焊点的封装衬底，其中带状引线从封装衬底向第一裸片延伸。
可以使外金属层暴露至环境条件以便于进行热传递。另外或可选地，带状引线可以从第一裸片向散热片延伸。
从属权利要求与本发明的有利实施例有关。
附图说明
图1是用于改进了的机械性能和可接受的电气特性的、由合并成带的电介质和金属涂布引线构成的裸片到裸片互连结构的例示；
图2是由电介质和金属涂布引线构成的大裸片到小裸片互连结构的例示，其中由于较小裸片的间距减小，因此这些引线的沿长度的至少一部分合并成带；
图3和4分别以平面图和侧视图示出具有带状引线的封装体到封装体互连和裸片到裸片互连这两者；
图5示出用于制造具有外接地金属的电介质涂布引线的方法步骤；
图6示出用于制造具有外接地金属的电介质涂布引线的减成法；
图7示出包括具有外接地金属的电介质涂布引线的BGA封装体；
图8示出包括具有外接地金属的电介质涂布引线的引线框架封装体的一部分；
图9是用于形成针对互连要求而优化的电介质涂布以及部分或全部金属涂布引线的结构和方法的例示；
图10以平面图示出通过完全金属化的电介质涂布引线合并成部分金属化的槽线而相互连接的两个裸片；
图11示出封装化的裸片到裸片槽线互连和向衬底安装天线的单独槽线互连；
图12是用于改进的热传递性能的、由合并成带的电介质和金属涂布引线以及封装体的暴露外部构成的裸片到裸片互连结构的例示；
图13是用于改进的热传递性能的、在封装体内包括由电介质和金属涂布引线构成的裸片到裸片和裸片到外部连接的互连带状结构的堆叠状裸片封装体的例示；以及
图14和15分别以平面图和侧视图示出向主动或被动散热片进行传递的封装体到封装体带互连。
具体实施方式
如从图1看出，适合用于使半导体裸片封装体相互连接的带状引线可以由具有电介质涂布金属芯的引线构成，其中电介质涂层沿着引线的长度全部或部分熔融。电介质涂层被外接地金属覆盖，以提供期望的电气特性，同时还通过氧化或其它化学效应提高机械特性和抗聚合物降解性。如针对图1看出，分别具有连接压焊点3的第一裸片1和第二裸片2经由包括利用金属封装的熔融电介质涂层15的两个单独带10、20相互连接。用于形成带互连的工艺从将引线的金属芯12贴装至裸片和衬底连接压焊点3开始。利用电介质15涂布金属芯12，并且利用接地的金属使金属芯12金属化(从而可能需要单独的激光烧蚀或其它电介质去除步骤以使得能够到达接地连接压焊点)。对于空腔封装体，可以向裸片装配密封盖或其它罩。在其它情况下，可以利用塑封料、环氧圆顶封装体或其它适当的密封材料覆盖裸片，从而(利用带状引线)单独延伸到封装材料外或根据需要共同延伸到一个多裸片封装体中。
如从图2看出，适合使半导体裸片封装体相互连接的带状引线可以由具有电介质涂布金属芯12的引线构成，其中电介质涂层15沿着引线的长度仅部分熔融。在图2中，较小裸片的较小间距使得电介质材料在小裸片附近熔融。这由于边缘引线的电气环境与内部引线相比大大不同，因此这与不同且分开的引线相比可能降低电气特性的均匀性，但如果仅引线在较小裸片附近的有限长度具有熔融电介质，则该变化最小。
图3和4分别以平面图和侧视图示出如针对图1所论述的使用带状引线30的封装体到封装体连接、以及共用模压封装体中的裸片到裸片互连32和裸片到衬底带状连接34。如从图4可以看出，还支撑示出在堆叠的裸片之间延伸的带的堆叠的封装体36。
以下将说明图9～11所示的本发明的实施例。包括天线的适合使半导体裸片或其它有源或无源元件相互连接的部分金属化的带状引线可以由具有电介质涂布金属芯的引线构成，其中电介质涂层沿着引线的长度完全或部分熔融。电介质涂层仅被外接地金属部分覆盖以提供期望的槽线电气特性。用于形成带状互连的工艺从将引线的金属芯贴装至裸片和衬底连接压焊点开始。利用电介质涂布金属芯，并且利用连接至接地端的金属使该金属芯金属化(可能需要单独的激光烧蚀或其它电介质去除步骤以使得能够到达接地连接压焊点)。
如从图9看出，适合半导体裸片封装体的引线45、46、47可定位在衬底40上，并且可以由具有外接地金属41的电介质涂布金属芯42构成。如针对图9看出，可以选择性地使非均匀(或在特定实施例中为均匀的)电介质涂层金属化以调整包括阻抗的电气特性。可以根据需要针对封装体中的单个引线、引线组或所有引线发生所选择的部分金属。在图9中，示出包围金属芯42的部分金属化的熔融电介质带43的集合、以及所有可连接至同一裸片的单个部分金属化引线46和均匀电介质金属化引线47。部分槽线引线可以连接至其它裸片、衬底40所支撑的连接压焊点、或者包括贴片天线或其它天线的其它有源或无源器件。在一些实施例中，单个引线可以定义向包括但不限于发射天线的天线系统的槽线。实际上，形成沿着引线长度的一部分(通常为引线的与衬底40邻接的下侧)金属减少或整体去除的引线45、46，以选择性地修改引线的电气特性。
图10以平面图示出通过完全金属化的电介质涂布引线合并成部分金属化的槽线而相互连接的两个裸片48、49。在较小裸片49附近，熔融电介质44在金属化期间使(位于衬底附近的)下侧有阴影，这样得到在较大裸片附近具有接地连接所用的完全单独且全部金属化的引线并且在较小引线附近具有熔融且部分金属化的槽线的互连件。如应当理解，还可以进行向堆叠状的裸片或封装体的槽线互连。
图11示出封装化裸片到裸片槽线互连60和向衬底安装天线64的单独槽线互连62。向天线64的槽线连接62对于提供低源和高天线之间的中间阻抗连接而言可以是有利的。
以下将特别说明图12～15所示的本发明的实施例。如从图12看出，适合使半导体裸片封装体70相互连接的一个或多个高热传导率引线可以由具有电介质涂布金属芯72的引线71构成，其中电介质涂层沿着引线71的长度完全熔融、部分熔融或未熔融。可以将电介质完全或部分熔融的实施例表征为“带状”引线71，而可以将未熔融的引线称为引线或单个引线。带状或单个引线可以延伸到封装体70外进入环境空气内，从而有助于将热传递地远离封装体。可选地，可以通过包括流动气体或液体、导热率高的金属或其它散热片、热糊剂或透热性粘合剂的主动或被动热式散热片或者诸如压电冷却剂等的主动冷却剂，来以对流方式或通过接触使引线冷却。
电介质涂层73被外接地金属覆盖，其中该外接地金属提供期望的热特性和电气特性，同时通过氧化或其它化学效应还改进了机械特性或抗聚合物降解性。如针对图12看出，分别具有连接压焊点的第一裸片74和第二裸片75经由包括利用金属封装的熔融电介质涂层73的两个单独带71相互连接。用于形成带状互连的工艺从将引线的金属芯72贴装至裸片衬底连接压焊点开始。利用电介质73涂布金属芯72，并且通过金属接地使该金属芯金属化(可能需要单独的激光烧蚀或其它电介质去除步骤以使得能够到达接地连接压焊点)。对于空腔封装体，可以向裸片装配密封盖或其它罩。在其它情况下，可以利用塑封料、环氧圆顶封装体或其它适当的密封材料覆盖裸片，从而(利用带状引线)单独延伸到封装材料外或根据需要共同延伸到多裸片封装体中。在特定实施例中，可以使用TiW或其它金属或粘合性质优良的金属叠层来在封装之前外涂先前沉积的金属。例如，接地面金属可以包括TiW-Cu-TiW金属叠层。
如从图13看出，适合使半导体裸片封装体80相互连接或者在封装体内的裸片之间延伸的带状引线在堆叠状裸片82的实施例中特别有用。重布所需的裸片衬底83通常由导热性差的电气绝缘材料构成。使用由具有可接地的最外侧金属层的熔融电介质涂布金属芯构成的带状引线85，可以从内部裸片去除热、以及从裸片向衬底传递热。
图14和15分别以平面图和侧视图示出诸如针对图12所论述的使用带状引线95的封装体到封装体连接90、以及共用模压封装体中的裸片到裸片连接和裸片到衬底带状连接。如从图15可以看出，还支撑示出在堆叠状裸片之间延伸的带97的堆叠状封装体96。如从图14和15看出，将使封装体相互连接的带95贴装至“翼状的”散热铜或铝片或块99以提高热传递和散热。在期望的情况下，可以使用主动或被动的气体或液体冷却来从翼状的块去除热。
在上述实施例的至少一部分中，可以通过使半导体裸片封装中所使用的电介质涂布引线被形成为具有变化的电介质厚度来调整带的电气特性。可以通过改变电介质涂布次数和制造步骤来实现厚的厚度、薄的厚度和中间厚度。芯直径和电介质厚度这两者都可以改变。在特定实施例中，所沉积的电介质的成分可以改变，其中例如，不同的电介质材料包围金属芯，而电介质材料被可接地的金属涂布包围。这样例如使得能够将具有优良的防潮层或抗氧降解性等的高性能电介质薄薄地沉积在由低成本的电介质材料形成的厚的层上。在其它实施例中，具有变化的厚度的多层电介质由最外金属层接地的薄金属层隔开。
通常，薄的电介质层将提供低阻抗，从而适合功率线，厚的电介质有利于信号完整性，并且外金属层连接至相同的接地端。注意，芯直径和电介质厚度的组合是可以的，并且可以进行一系列的这些步骤以实现两个以上的阻抗。在特定实施例中，可以期望在功率线上具有大的芯以增加功率处理能力、降低功率线温度、以及/或者进一步降低电源以及将加剧接地反弹或功率跌落的接地线上的任何电感。由于许多封装体可以受益于具有三(3)个以上的不同电介质厚度的引线，因此中间厚度的电介质层也是有用的。例如，具有中间电介质厚度的引线可用于连接阻抗大大不同的源和负载以使功率传送最大化。例如，10欧姆的源可以连接至具有20欧姆的引线的40欧姆的负载。此外，由于电介质的成本可能高，因此可以使用厚的电介质来使重要的信号路径相互连接，其中可以利用厚度与功率引线相比更大但与重要的信号引线相比更小(中间)的电介质层来涂布状况或重置等不太重要的引线。有利地，这样可以减少电介质沉积材料的成本和时间。
可以与焊线直径相组合地选择电介质涂层的精确厚度，以针对各引线实现特别期望的阻抗值。
Z 0 = L C = 138 ϵ r · log ( b a ) - - - ( 1 )
在等式(1)中给出同轴线的特性阻抗，其中：L是每单位长度的电感，C是每单位长度的电容，a是焊线的直径，b是电介质的外径，并且εr是同轴电介质的相对介电常数。
如图5所示，在一个实施例中，具有外接地金属的电介质涂布引线的制造可以使用以下步骤来进行。清洗(50)裸片和衬底上的连接压焊点，并且使用引线接合机使裸片连接至连接压焊点(51)。可选地，可以贴装(52)第二直径的配线(例如，适合功率连接的较大直径的配线)，或者可以对裸片的区域进行遮掩(53)或保护以允许进行选择性沉积。可以沉积(54)成分相同或不同的电介质的一个或多个层，之后对电介质的一部分进行选择性激光或热烧蚀或者化学去除，以使得能够到达在电介质沉积步骤中所覆盖的接地接点(55)。该步骤是可选的，这是因为，在一些实施例中，不需要接地通孔。由于可以通过电容耦合建立虚拟RF接地，因此这对于以较高频率进行工作的裸片而言尤其如此。之后进行金属化(57)，从而利用形成引线的最外金属化层的金属层覆盖电介质，并且还使引线接地。可以重复多次整个处理(58)，从而用于使用选择性沉积技术的实施例，并且特别用于支撑多裸片或者复杂的且阻抗发生变化的引线的实施例。在最后步骤中，对于非腔体封装体，可以使用包覆成型来封装引线(59)。在US20120066894和美国专利6,770,822中还描述了替代实施例和附加或变体的方法步骤，其中这两者的内容通过引用全部包含于此。
在特定实施例中，可以对所述的工艺进行修改和添加。例如，可以通过使用化学(电泳)、机械(表面张力)、接触反应(底漆)、电磁[UV,IR]、电子束、其它适当技术的各种方法来实现提供电介质的共形涂层。由于电泳聚合物可以依赖于如下的自限反应，因此这些电泳聚合物特别有利，其中这些自限反应可以通过调整工艺参数以及/或者针对电泳涂捕溶液的简单加成、浓度、化学、热或定时变化，来容易地沉积精确的厚度。
在其它实施例中，可以使用电介质预涂焊线来形成引线。尽管市售的涂布配线通常在电介质厚度方面与创建例如50欧姆的引线所需的配线相比在电介质厚度上更薄，但可以使用以上所论述的电介质沉积步骤来增加电介质厚度以设置期望的阻抗。使用这些预涂配线可以简化创建共轴所需的其它工艺步骤，并且可以使得所需的气相沉积电介质的层更薄且处理时间更快，从而创建接地通孔。可以使用预涂焊线来防止狭窄地间隔开或交叉的引线发生短路。在特定实施例中，预涂焊线可以具有由光敏材料制成的电介质以使得能够进行选择性图案化技术。
在其它实施例中，可以使用电介质聚对二甲苯。聚对二甲苯(Parylene)是用作水分阻挡层和电介质阻抗层的各种化学气相沉积聚(对苯二亚甲基)聚合物的商品名称。可以使用改进的聚对二甲苯沉积系统在生长受限的缩合反应中形成聚对二甲苯，其中在该聚对二甲苯沉积系统中，使裸片、衬底和引线与照相底板对齐，从而使得EM辐射(IR、UV或其它)能够以精确方式入射，这样引起电介质的选择性生长率。有利地，这样使针对用以创建接触通孔、聚对二甲苯的大量去除等的工艺的需求为最低限度或者不需要这些工艺。
已知聚对二甲苯和其它电介质在存在氧、水蒸汽和热的情况下由于氧断裂而发生降解。损坏可能受到形成优良的防氧蒸汽层的金属层所限制，其中厚度为3～5微米的薄层能够形成真正的气密界面。可选地，如果选择性地去除了金属、或者由于电气、热或制造要求因而金属没有沉积在特定区域中，则可以使用各种基于聚合物的蒸汽氧阻挡层，其中聚乙烯醇(PVA)是广泛地使用的聚合物。可以对这些聚合物进行顶部密封、丝网印刷、用蜡纸印刷、门式分配、喷涂到将暴露至氧或H2O蒸汽环境的聚对二甲苯表面上。有利地，由于可能需要高成本的聚对二甲苯或其它对氧敏感的更厚层，因此使用防蒸汽层聚合物可以是降低成本策略的一部分。
如应当理解，所述的所有方法步骤全部受益于各种选择性沉积技术。选择性沉积可以通过物理遮掩、直接聚合物沉积、光致抗蚀法、或者用于在沉积时确保金属芯、电介质层或其它最外层上的差分沉积厚度的任何其它适当方法。尽管选择性沉积允许使用加成法来构建引线，但还允许使用去除电介质或金属以形成多个阻抗互连件的减成技术。例如，可以适当地对利用一个或多个裸片所填充的封装体进行引线接合，以使所有的封装体和器件压焊点相互连接。如针对例示裸片封装体的制造所用的步骤和结构的图5看出，可以将电介质涂层200以厚度X～A沉积(步骤A)到焊线金属导体202上，其中A是二次互连阻抗所需的电介质的厚度。例如可以通过蚀刻步骤去除(步骤B)二次阻抗焊线电介质，之后进行第二涂层204的沉积(步骤C)，之后进行这两个互连件的金属化(步骤D)。该减成工艺将创建两个明显不同的阻抗的焊线。
在针对图7所示的实施例中，说明包括电介质和金属涂布引线212、214的球栅阵列(BGA)封装体，其中在这些引线中，对所选择的引线进行部分或全部电介质熔融，以改进机械特性或者提供足够的电气互连。可选地，电介质和金属涂布引线212、214能够被形成为部分金属化引线或槽线。可选地或另外，电介质和金属涂布引线212、214能够支持改进的热传递。
BGA是广泛地用于集成电路的表面安装封装，并且由于BGA的底表面整体可用于连接压焊点，因此与双列直插、引线框架或其它扁平封装体相比，BGA通常可以提供更多的互连引脚。在许多类型的BGA封装体中，将裸片216贴装至具有连接至连接压焊点的可填充通孔220的衬底218。焊线212、214可用于使顶侧的裸片216连接至压焊点/通孔220，结果提供从衬底的顶侧向底部的电气接线。在BGA封装件中，利用粘性焊剂将焊料球222贴装至封装体的底部并且保持在适当位置，直到焊接至印刷电路板或其它衬底为止。如这里所述，可以利用具有电介质层和可外接地金属层的改进了的引线来替换传统的BGA封装体的焊线。这些引线可以在内芯和外金属层内具有变化的电介质厚度，并且可以选择性地优化这些引线以具有特定阻抗，从而可被选择成至少部分基于电介质层厚度而不同或良好地匹配。如从图7看出，支撑长的引线212和短的引线214这两者。
更详细地，改进了的BGA封装体的组件可以要求将裸片以面朝上的方式贴装至衬底，从而支撑衬底中的在通孔周围以邻接方式形成的连接压焊点。针对所需的各互连件适当地对该组件进行引线接合，其中在衬底上的连接压焊点和裸片上的连接压焊点之间形成焊线。低频率和功率的输入连接至低频率的信号引线，而高频率的输入和输出连接至高频率的信号引线。在一些实施例中，低频率和功率的输入的厚度可以不同于高频率的信号引线的厚度。然后对组件进行任何基本保形的电介质材料的涂布。由于聚对二甲苯的低成本、便于真空沉积和优良的性能特性，因此可以使用聚对二甲苯。可以通过蚀刻、热降解或激光烧蚀来选择性地去除电介质层的在引线框架贴装点附近的一小部分，从而形成向接地接触点或接地屏蔽层的电气连接。同样，可以在裸片连接压焊点附近去除电介质层的一小部分，以允许接地连接。在将金属化层涂敷到电介质层的顶部之后在结构中接地，从而形成接地屏蔽。应当考虑到趋肤深度和DC电阻问题来选择优选的金属层的厚度，并且该厚度应主要包括诸如银、铜或金等的优良电气导体。对于大多数应用，1微米的涂层厚度对于功能而言是足够的，但更厚的涂层有助于使引线之间的串扰为最低限度。可以通过光刻法或其它掩蔽方法与镀法或其它选择性沉积方法的组合来在定义区域中添加这些涂层。可以通过将包覆成型件或盖放置在裸片上、之后进行切割(切单)并进行测试，来完成封装体。
可选地，在针对图7所示的实施例中，可以通过形成包含单独的封装部位和外侧框架部分的二维阵列的引线框架带材来制造包括从裸片延伸至引线框架的基于低成本的引线框架的裸片封装体300。引线框架制造是传统的，并且可以包括通过蚀刻、冲压或电沉积的单独引线的形成。可以将引线框架带材放置在包括但不限于注塑成型或传递成形设备的模具中。将适当的电介质材料(优选为诸如市售的环氧模塑料)注入、泵入或传递到模具内，以实现引线框架/模具材料复合结构。模具材料的性质对于这些模具材料的介质常数、损耗切线和电色散性质以及这些模具材料的温度、湿度和其它机械性能属性而言很重要。
对如此得到的复合引线框架带材上的各封装部位清洗脱模材料和/或溢料飞边，并且准备好将金属饰面沉积在引线框架的暴露的金属部分上。这可以通过诸如浸没或电镀等的镀技术来实现，并且将选择这些金属以用于腐蚀抑制并且容易进行引线接合。这种涂饰的示例是薄的镍层(以供保护)，之后是金层(向焊线添加保护和能力)。然后，可以利用贴装至基底的所需裸片填充如此得到的模制引线框架带材的各封装部位，其中针对特定封装应用的机械性质和热性质选择裸片贴装材料。然后，针对所需的各互连件适当地对如此得到的组件进行引线接合，其中在引线框架上的引线和裸片上的连接压焊点之间形成焊线。低频率和功率的输入连接至低频率的信号引线，而高频率的输入和输出连接至高频率的信号引线。在一些实施例中，低频率和功率的输入的厚度可以不同于高频率的信号引线的厚度。
如上述的BGA封装体210那样，然后对所填充的引线框架带材进行包括聚对二甲苯的任何基本保形的电介质材料的涂布。在聚对二甲苯的情况下，可以优选利用诸如具有丙烯酸粘合剂的真空兼容的聚酰亚胺等的胶带或者相似材料对封装体的底部进行掩蔽以防止沉积到引线的最终将贴装至PCB的区域上。这将便于在后续步骤进行更容易的焊接。可以通过蚀刻、热降解或激光烧蚀来选择性地去除电介质层的在引线框架贴装点附近的一小部分，从而形成向接地接触点或接地屏蔽层的电气连接。同样，可以在裸片连接压焊点附近去除电介质层的一小部分，以允许接地连接。在将金属化层涂敷到电介质层的顶部之后在结构中接地，从而形成接地屏蔽。应当考虑到趋肤深度和DC电阻问题来选择优选的金属层的厚度，并且该厚度应主要包括诸如银、铜或金等的优良电气导体。对于大多数应用，1微米的涂层厚度对于功能而言是足够的，但更厚的涂层有助于使引线之间的串扰为最低限度。可以通过光刻法或其它掩蔽方法与镀法或其它选择性沉积方法的组合来在定义区域中添加这些涂层。可以通过将包覆成型件或盖放置在裸片上、之后进行切割(切单)并进行测试，来完成封装体。
示例1-图中示出从裸片向衬底的封装体内热传递或者热传递结构所用的一个或多个引线的使用。如图所示，可以使用根据本发明的单个或带状引线来传递来自堆叠的裸片的热。
特别地，本发明涉及一种多裸片互连系统，包括：第一裸片和第二裸片，其中各裸片分别具有多个连接压焊点；以及带状引线，其从第一裸片向第二裸片延伸，其中该带状引线包括具有芯直径的多个金属芯、包围金属芯的具有电介质厚度的电介质层和贴装接地的外金属层，其中电介质的至少一部分沿着多个金属芯的长度熔融在邻接的金属芯之间。
此外，本发明涉及一种槽线互连系统，包括：第一裸片，其具有多个连接压焊点；封装衬底，其具有多个连接压焊点；以及带状引线，其从封装衬底向第一裸片延伸，其中该带状引线包括具有芯直径的多个金属芯、包括金属芯的具有电介质厚度的电介质层、以及仅部分覆盖熔融的电介质并且贴装接地的外金属层，其中该电介质的至少一部分沿着多个金属芯的长度熔融在邻接的金属芯之间。
此外，本发明涉及槽线互连系统，包括：第一裸片和第二裸片，其中各裸片分别具有多个连接压焊点；以及带状引线，其从第一裸片向第二裸片延伸，其中该带状引线包括具有芯直径的多个金属芯、包围金属芯的具有电介质厚度的电介质层、以及仅部分覆盖熔融的电介质并且贴装接地的外金属层，其中该电介质的至少一部分沿着多个金属芯的长度熔融在邻接的金属芯之间。
此外，本发明涉及以下：裸片封装体到裸片封装体、堆叠状裸片封装体、BGA封装体、引线框架封装体、共用封装体中的裸片到裸片连接、封装后的裸片到封装体、具有扇入的大间距到小间距互连、具有扇入的大裸片到小裸片互连、大间距到小间距的部分槽线、以及裸片到天线注入结构。
此外，本发明涉及多裸片互连系统，包括：第一裸片和第二裸片，其中各裸片分别具有多个连接压焊点；以及引线，其从第一裸片向第二裸片延伸，其中该引线包括具有芯直径的多个金属芯、包围金属芯的具有电介质厚度的电介质层、以及贴装接地并且暴露至环境条件以便于进行热传递的外金属层，其中该电介质的至少一部分沿着多个金属芯的长度熔融在邻接的金属芯之间。
此外，本发明涉及裸片封装体到裸片封装体、堆叠状裸片封装体、BGA封装体、引线框架封装体、共用封装体中的裸片到裸片连接、封装后的裸片到衬底连接、散热片或块连接、直接或利用散热片的向带状引线的流体冷却。
此外，本发明涉及封装裸片所用的热传递系统，包括：裸片，其具有多个连接压焊点；以及引线，其从第一裸片向散热片延伸，其中该引线包括具有芯直径的多个金属芯、包围金属芯的具有电介质厚度的电介质层和贴装接地的外金属层，其中电介质的至少一部分沿着多个金属芯的长度熔融在邻接的金属芯之间
最后，本发明涉及堆叠状裸片、采用衬底形式的散热片、粘合层、导热糊剂、金属块、封装体内热传递所用的器件、以及带状引线。

Claims (19)

1.一种互连系统，包括：
第一裸片(1)，其具有多个连接压焊点(3)；以及
带状引线(10,20)，其从所述第一裸片(1)延伸出，所述带状引线(20,30)包括具有芯直径的多个金属芯(12)、包围所述金属芯的具有电介质厚度的电介质层(15)和贴装接地的外金属层，其中电介质的至少一部分沿着所述多个金属芯的长度熔融在邻接的金属芯之间。
2.根据权利要求1所述的互连系统，其特征在于，所述互连系统是多裸片互连系统，所述多裸片互连系统包括第一裸片(1)和第二裸片(2)，各裸片(1,2)分别具有多个连接压焊点(3)，其中所述带状引线从所述第一裸片(1)向所述第二裸片(2)延伸。
3.根据权利要求1所述的互连系统，其特征在于，所述互连系统是槽线互连系统，所述槽线互连系统包括第一裸片和第二裸片，各裸片分别具有多个连接压焊点，其中所述带状引线从所述第一裸片向所述第二裸片延伸。
4.根据权利要求1所述的互连系统，其特征在于，所述互连系统是槽线互连系统，所述槽线互连系统包括具有多个连接压焊点的封装衬底，其中所述带状引线从所述封装衬底向所述第一裸片延伸。
5.根据权利要求1至4中任一项所述的互连系统，其特征在于，所述外金属层仅部分覆盖熔融的电介质。
6.根据权利要求1至5中任一项所述的互连系统，其特征在于，电介质沿着引线的长度完全熔融或者仅部分熔融。
7.根据权利要求2或3所述的互连系统，其特征在于，所述第二裸片小于所述第一裸片，其中引线的仅在较小的裸片附近的有限长度具有熔融的电介质。
8.根据权利要求1至7中任一项所述的互连系统，其特征在于，具有第一裸片和第二裸片的至少一个优选堆叠状裸片，其中所述带状引线从所述第一裸片向所述第二裸片、从所述第一裸片向不是所述堆叠状裸片的一部分的另一裸片以及/或者向裸片衬底延伸。
9.根据权利要求1至8中任一项所述的互连系统，其特征在于，第一裸片封装体和第二裸片封装体，其中所述带状引线从所述第一裸片封装体向所述第二裸片封装体延伸。
10.根据权利要求1至9中任一项所述的互连系统，其特征在于，诸如天线或天线系统的至少一个有源元件或无源元件，其中所述带状引线从所述第一裸片向所述有源元件或无源元件延伸。
11.根据权利要求1至10中任一项所述的互连系统，其中，采用大裸片到小裸片互连结构，其中一个或多个引线的沿长度的至少一部分形成带状引线。
12.根据权利要求1至11中任一项所述的互连系统，其特征在于，包围第一芯的电介质层具有第一厚度，并且包括第二芯的电介质层具有与所述第一厚度不同的第二厚度。
13.根据权利要求1至12中任一项所述的互连系统，其特征在于，所述外金属层被暴露至环境条件以便于进行热传递。
14.根据权利要求1至13中任一项所述的互连系统，其特征在于，通过诸如流动气体或液体、高热传导率金属、热糊剂或热透射粘合剂的主动和/或被动散热片以及/或者诸如压电冷却剂的主动冷却剂，来以对流方式或通过接触使引线冷却。
15.根据权利要求1至14中任一项所述的互连系统，其特征在于，所述引线从所述第一裸片向散热片延伸。
16.一种球栅阵列封装体即BGA封装体，包括根据权利要求1至15中任一项所述的互连系统。
17.一种引线框架封装体，包括根据权利要求1至15中任一项所述的互连系统。
18.一种封装裸片所用的热传递系统，包括根据权利要求1至15中任一项所述的互连系统，其中所述引线从所述第一裸片向散热片延伸。
19.根据权利要求18所述的热传递系统，其特征在于，所述散热片是衬底、粘合层、导热糊剂和/或金属块。
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109643835A (zh) * 2016-09-16 2019-04-16 罗森伯格高频技术有限及两合公司 用于连接光纤和电导体的连接器
CN111900144A (zh) * 2020-08-12 2020-11-06 深圳安捷丽新技术有限公司 高速互连的接地参考形状
TWI718190B (zh) * 2015-11-30 2021-02-11 美商英特爾公司 具有在底部晶粒與導熱材料之間的貫穿模具導熱結構之堆疊晶粒封裝體

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190206827A1 (en) * 2017-12-29 2019-07-04 Intel Corporation Semiconductor package with externally accessible wirebonds
US11812545B2 (en) 2020-01-08 2023-11-07 Delta Electronics (Shanghai) Co., Ltd Power supply system and electronic device
CN113098234B (zh) * 2020-01-08 2022-11-01 台达电子企业管理（上海）有限公司 供电系统

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030090001A1 (en) * 2001-11-13 2003-05-15 Kulicke And Soffa Investments, Inc. Wirebonded semiconductor package structure and method of manufacture
US6956283B1 (en) * 2000-05-16 2005-10-18 Peterson Kenneth A Encapsulants for protecting MEMS devices during post-packaging release etch
US20090159320A1 (en) * 2007-12-19 2009-06-25 Bridgewave Communications, Inc. Low Cost High Frequency Device Package and Methods
US7969022B1 (en) * 2007-03-21 2011-06-28 Marvell International Ltd. Die-to-die wire-bonding

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5491610A (en) * 1994-09-09 1996-02-13 International Business Machines Corporation Electronic package having active means to maintain its operating temperature constant
JP2570645B2 (ja) * 1994-12-28 1997-01-08 日本電気株式会社 半導体装置
US20020006526A1 (en) * 1999-10-11 2002-01-17 Polese Frank J. Aluminum silicon carbide and copper clad material and manufacturing process
JP2002184934A (ja) * 2000-12-13 2002-06-28 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
US20050156322A1 (en) * 2001-08-31 2005-07-21 Smith Lee J. Thin semiconductor package including stacked dies
US6770822B2 (en) 2002-02-22 2004-08-03 Bridgewave Communications, Inc. High frequency device packages and methods
US6992629B2 (en) * 2003-09-03 2006-01-31 Raytheon Company Embedded RF vertical interconnect for flexible conformal antenna
US7671449B2 (en) * 2005-05-04 2010-03-02 Sun Microsystems, Inc. Structures and methods for an application of a flexible bridge
US7450378B2 (en) * 2006-10-25 2008-11-11 Gm Global Technology Operations, Inc. Power module having self-contained cooling system
JP4316607B2 (ja) * 2006-12-27 2009-08-19 株式会社東芝 アンテナ装置及び無線通信装置
KR100874925B1 (ko) * 2007-06-04 2008-12-19 삼성전자주식회사 반도체 패키지, 그 제조 방법, 이를 포함하는 카드 및 이를포함하는 시스템
US7884444B2 (en) * 2008-07-22 2011-02-08 Infineon Technologies Ag Semiconductor device including a transformer on chip
US20100258952A1 (en) 2009-04-08 2010-10-14 Interconnect Portfolio Llc Interconnection of IC Chips by Flex Circuit Superstructure
US8377749B1 (en) * 2009-09-15 2013-02-19 Applied Micro Circuits Corporation Integrated circuit transmission line
TWI484616B (zh) * 2011-10-06 2015-05-11 Adl Engineering Inc 具電磁干擾屏蔽之封裝模組
TWM498961U (zh) * 2013-07-03 2015-04-11 Rosenberger Hochfrequenztech 高頻寬互連線的熱絕緣結構
US9554463B2 (en) * 2014-03-07 2017-01-24 Rogers Corporation Circuit materials, circuit laminates, and articles formed therefrom

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6956283B1 (en) * 2000-05-16 2005-10-18 Peterson Kenneth A Encapsulants for protecting MEMS devices during post-packaging release etch
US20030090001A1 (en) * 2001-11-13 2003-05-15 Kulicke And Soffa Investments, Inc. Wirebonded semiconductor package structure and method of manufacture
US7969022B1 (en) * 2007-03-21 2011-06-28 Marvell International Ltd. Die-to-die wire-bonding
US20090159320A1 (en) * 2007-12-19 2009-06-25 Bridgewave Communications, Inc. Low Cost High Frequency Device Package and Methods

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI718190B (zh) * 2015-11-30 2021-02-11 美商英特爾公司 具有在底部晶粒與導熱材料之間的貫穿模具導熱結構之堆疊晶粒封裝體
CN109643835A (zh) * 2016-09-16 2019-04-16 罗森伯格高频技术有限及两合公司 用于连接光纤和电导体的连接器
CN109643835B (zh) * 2016-09-16 2020-08-04 罗森伯格高频技术有限及两合公司 用于连接光纤和电导体的连接器
CN111900144A (zh) * 2020-08-12 2020-11-06 深圳安捷丽新技术有限公司 高速互连的接地参考形状
CN111900144B (zh) * 2020-08-12 2021-11-12 深圳安捷丽新技术有限公司 高速互连的接地参考形状

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