CN105378915B - 混合阻抗的焊线连接及其连接方法 - Google Patents
混合阻抗的焊线连接及其连接方法 Download PDFInfo
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- CN105378915B CN105378915B CN201480038229.2A CN201480038229A CN105378915B CN 105378915 B CN105378915 B CN 105378915B CN 201480038229 A CN201480038229 A CN 201480038229A CN 105378915 B CN105378915 B CN 105378915B
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Abstract
一种具有混合阻抗的引线的裸片封装体,其中:第一引线具有第一金属芯(130)和包围该第一金属芯(130)的电介质层,第二引线具有第二金属芯和包围该第二金属芯的第二电介质层(132),电介质厚度彼此不同。用于制造具有阻抗不同的引线的裸片封装体的方法包括以下步骤:清洁裸片衬底的连接压焊点(162);使裸片封装体经由具有第一直径金属芯的第一焊线连接至裸片衬底的连接压焊点(164);使至少一层电介质沉积在焊线金属芯(170)上;使至少一层电介质金属化(174);使裸片封装体经由具有第二直径金属芯的第二焊线连接至裸片衬底的连接压焊点;使至少一层电介质沉积在第二焊线的第二直径金属芯上;使至少一层电介质金属化在第二直径金属芯上,使得第一焊线的阻抗与第二焊线不同。
Description
技术领域
本发明涉及利用如下引线的、适合具有以高达千兆赫范围的频率进行工作的输入和输出的裸片的封装,其中这些引线具有一个或多个不同的阻抗,从而使得能够优化信号性质、功率性质或期望的互连性质。
背景技术
电子器件和组件正以不断增加的速度并且在越来越高的频率范围内进行工作。普及的半导体封装体类型使用可以连接至衬底或引线框架的焊线,而该衬底或引线框架可以连接至第二级互连件、通孔、衬底或封装体走线或者焊球等,从而连接至电子器件的印刷电路板(PCB)。
然而,不同的引线长度可能导致阻抗显著改变。这可以包括串联电感的变化。一个解决方案是利用并联电容来部分补偿这些集总电感变化,但这些集总结构趋于在频率内产生非单值阻抗行为。另一解决方案是代替优化阻抗、而是尝试选择提供平均阻抗的配线长度。不幸地,实际很难实现该解决方案,并且该解决方案可能会导致可能受益于远离平均值的阻抗的各种连接的性能变差。
发明内容
考虑到现有技术的这些问题和不足,因此本发明的目的是提供包括如下引线的裸片封装体,其中这些引线具有一个或多个不同的阻抗,以优化信号特性、功率特性或期望的互连特性。
本发明的另一目的是提供用于制造包括具有不同的阻抗的引线的裸片封装体的方法。
在本发明中实现本领域技术人员将明白的上述和其它目的,其中本发明涉及一种裸片封装体,包括:裸片,其具有多个连接压焊点;裸片衬底,其支撑多个连接元件;第一引线,其包括具有第一芯直径的第一金属芯和包围所述第一金属芯的具有第一电介质厚度的电介质层;以及第二引线,其包括具有第二芯直径的第二金属芯和包围所述第二金属芯的具有第二电介质厚度的电介质层,其中所述第一电介质厚度不同于所述第二电介质厚度。
从属于上述的权利要求涉及根据本发明的裸片封装体的有利实施例。
根据本发明的一种用于制造裸片封装体的方法,包括以下步骤:
设置裸片和具有连接压焊点的裸片衬底;
清洁所述连接压焊点;
使所述裸片经由具有第一直径金属芯的第一焊线连接至所述裸片衬底的所述连接压焊点;
使所述裸片经由具有第二直径金属芯的第二焊线连接至所述裸片衬底的所述连接压焊点;
将至少一层电介质沉积在所述第一焊线的所述第一直径金属芯和所述述第二焊线的所述第二直径金属芯上;以及
使所述至少一层电介质金属化在所述第一直径金属芯和所述第二直径金属芯上。
附图说明
特别是在所附权利要求书中,陈述了被认为是新颖的本发明的特征以及本发明的元素特性。附图仅是为了例示目的并且不是按比例绘制的。然而,关于组织和操作方法这两者,可以通过参考以下结合附图所进行的详细说明来最好地理解本发明本身,其中:
图1是具有所选择的多个阻抗的电介质和金属涂布引线的例示,其中一对引线尽管长度不同但具有相匹配的阻抗;
图2示出金属芯直径和电介质厚度这两者均不同的两个引线;
图3A~3C示出具有优化或相匹配的阻抗的多个可能变形引线;
图4示出描述用于制造具有外接地金属的电介质涂布引线的方法步骤的框图;
图5示出用于制造具有外接地金属的电介质涂布引线的减成法;
图6示出包括具有外接地金属的电介质涂布引线的BGA封装体;
图7示出包括具有外接地金属的电介质涂布引线的引线框架封装体的一部分;以及
图8示出包括裸引线和具有外接地金属的电介质涂布引线的各种阻抗值的引线中的基于频率的损耗差异。
具体实施方式
在说明本发明的优选实施例时,这里将参考附图中的图1~8,其中相同的附图标记指代本发明的相同特征。
如从图1看出,半导体裸片封装系统100可被形成为包括在内芯和外金属层具有不同电介质厚度(针对图2和3更详细地看出)的引线110、112和114a、114b。裸片衬底102上所安装的裸片120包括裸片120所需的信号、功率或其它功能所用的多个连接压焊点122。裸片衬底可以包括直接地或者经由导电引线框架、填充通孔、导电走线或第二级互连等提供封装体中的导电路径的导电压焊点104。引线110、112和114a、114b连接至导电压焊点104,并且如图所示,可以具有大致不同的长度。在例示实施例中,引线110、112和114a、114b由于在引线构造上存在差异,因此具有明显不同的阻抗。例如,引线110包括沿着长度具有所定义的直径的金属芯,其中该金属芯被顺次涂布薄的电介质层和导电金属层。由于如此得到的低阻抗和低电容使功率跌落下降,因此这些引线110适合功率的传送。可选地,引线112具有适合信号数据的传输的厚得多的电介质层,而长度不同的引线114a和114b具有中间厚度的电介质层。在特定实施例中,由于如所公开的引线构造的电气特性优良,因此长度大致不同但芯直径相同的诸如114a和114b等的引线尽管长度改变了50%以上,但可以具有大致相同的阻抗(在目标阻抗的10%内)。在特定实施例中,引线差异可能甚至更大,其中两个引线具有相同的截面结构和阻抗,但一个引线高达另一引线的长度的十(10)倍大。
在图2和3中更详细地看出引线构造,其中图2和3以截面图示出半导体裸片封装中所使用的被形成为具有变化的电介质厚度132的电介质涂布引线。可以通过改变电介质涂布次数和制造步骤来实现厚的厚度、薄的厚度和中间厚度。如从图2可以看出,芯直径130和电介质厚度132这两者都可以改变。在图3A中也示出该变化。如从图3B看出,在特定实施例中,所沉积的电介质的成分可以改变,其中例如,不同的电介质材料140a、140b、140c和142a、142c分别包围金属芯144a、144b、144c,而电介质材料140a、140b、140c和142a、142c分别被可接地的金属涂层146a、146b、146c包围。这样例如使得能够将具有优良的防蒸汽层或抗氧降解性等的高性能电介质薄薄地沉积在低成本的电介质材料所形成的厚的层上。在其它实施例中,如图3C所示,具有变化的厚度的多层电介质150a、150b和152a、152b分别包围芯直径158a、158b,并且由薄金属层154a、154b隔开,其中金属层154a、154b和156a、156b中的任意或这两者接地。
通常,薄的电介质层将提供低阻抗,从而适合功率线,厚的电介质有利于信号完整性,并且外金属层连接至相同的接地端。芯直径和电介质厚度的组合是可以的,并且可以进行一系列的这些步骤以实现两个以上的阻抗。在特定实施例中,可以期望在功率线上具有大的芯以增加功率处理能力、降低功率线温度、以及/或者补偿电源以及将加剧接地反弹或功率跌落的接地线上的任何电感。由于许多封装体可以受益于具有三(3)个以上的不同电介质厚度的引线,因此中间厚度的电介质层也是有用的。例如,具有中间电介质厚度的引线可用于连接阻抗大大不同的源和负载以使功率传送最大化。例如,10欧姆的源可以连接至具有20欧姆的引线的40欧姆的负载。此外,由于电介质的成本可能高,因此可以使用厚的电介质来使重要的信号路径相互连接,其中可以利用厚度与功率引线相比更大但与重要的信号引线相比更小(中间)的电介质层来涂布状况或重置等不太重要的引线。有利地,这样可以减少电介质沉积材料的成本和时间。
可以与焊线直径相组合地选择电介质涂层的精确厚度,以针对各引线实现特别期望的阻抗值。
在等式(1)中给出同轴线的特性阻抗,其中:L是每单位长度的电感,C是每单位长度的电容,a是焊线的直径,b是电介质的外径,并且εr是同轴电介质的相对介电常数。
如图4所示,在一个实施例中,具有外接地金属的电介质涂布引线的制造可以使用框图160所示的步骤来进行。在第一步骤162中,清洗裸片和衬底上的连接压焊点。接着,使用焊线使裸片连接至连接压焊点(164)。可选地,可以贴装第二直径的配线(166)(例如,适合功率连接的较大直径的配线),或者可以对裸片的区域进行掩蔽或保护以允许进行选择性沉积(步骤168)。可以沉积成分相同或不同的一层或多层电介质(步骤170),之后对电介质的一部分进行选择性激光或热烧蚀或者化学去除,以使得能够到达在电介质沉积步骤(170)中所覆盖的接地接线(172)。该步骤是可选的,这是因为,在一些实施例中,不需要接地通孔。由于可以通过电容耦合建立虚拟RF接地,因此这对于以较高频率进行工作的裸片而言尤其如此。之后进行金属化(步骤174),从而利用形成引线的最外金属化层的金属层覆盖电介质,并且还使引线接地。可以重复多次整个处理(步骤176),从而用于使用选择性沉积技术的实施例,并且特别用于支撑多裸片或者复杂的且阻抗发生变化的引线的实施例。在最后步骤(步骤178)中,对于非腔体封装体,可以使用包覆成型来封装引线(59)。封装后的引线可以用在美国专利6,770,822和美国专利公开2012/0066894中所述的高频器件封装体中,其中这两者的内容通过引用全部包含于此。
在特定实施例中,可以对所述的工艺进行修改和添加。例如,可以通过使用化学(电泳)、机械(表面张力)、接触反应(底漆)、电磁[UV,IR]、电子束、其它适当技术的各种方法来实现提供电介质的共形涂层。由于电泳聚合物可以依赖于如下的自限反应,因此这些电泳聚合物特别有利,其中这些自限反应可以通过调整工艺参数以及/或者针对电泳涂捕溶液的简单加成、浓度、化学、热或定时变化,来容易地沉积精确的厚度。
在其它实施例中,可以使用电介质预涂焊线来形成引线。尽管市售的涂布配线通常在电介质厚度方面与创建例如50欧姆的引线所需的配线相比在电介质厚度上更薄,但可以使用以上所论述的电介质沉积步骤来增加电介质厚度以设置期望的阻抗。使用这些预涂配线可以简化创建共轴所需的其它工艺步骤,并且可以使得所需的气相沉积电介质的层更薄且处理时间更快,从而创建接地通孔。可以使用预涂焊线来防止狭窄地间隔开或交叉的引线发生短路。在特定实施例中,预涂焊线可以具有由光敏材料制成的电介质以使得能够进行选择性图案化技术。
在其它实施例中,可以使用电介质聚对二甲苯。聚对二甲苯(Parylene)是用作水分阻挡层和电介质阻抗层的各种化学气相沉积聚(对苯二亚甲基)聚合物的商品名称。可以使用改进的聚对二甲苯沉积系统在生长受限的缩合反应中形成聚对二甲苯,其中在该聚对二甲苯沉积系统中,使裸片、衬底和引线与照相底板对齐,从而使得EM辐射(IR、UV或其它)能够以精确方式入射,这样引起电介质的选择性生长率。有利地,这样使针对用以创建接触通孔、聚对二甲苯的大量去除等的工艺的需求为最低限度或者不需要这些工艺。
已知聚对二甲苯和其它电介质在存在氧、水蒸汽和热的情况下由于氧断裂而发生降解。损坏可能受到形成优良的氧蒸汽阻挡层的金属层所限制,其中厚度为3~5微米的薄层能够形成真正的气密界面。可选地,如果选择性地去除了金属、或者由于电气、热或制造要求因而金属没有沉积在特定区域中,则可以使用各种基于聚合物的蒸汽氧阻挡层,其中聚乙烯醇(PVA)是广泛地使用的聚合物。可以对这些聚合物进行顶部密封、丝网印刷、用蜡纸印刷、门式分配、喷涂到将暴露至氧或H2O蒸汽环境的聚对二甲苯表面上。有利地,由于可能需要高成本的聚对二甲苯或其它对氧敏感的更厚层,因此使用防蒸汽层聚合物可以是降低成本策略的一部分。
如应当理解,所述的所有方法步骤全部受益于各种选择性沉积技术。选择性沉积可以通过物理掩蔽、直接聚合物沉积、光致抗蚀法、或者用于在沉积时确保金属芯、电介质层或其它最外层上的差分沉积厚度的任何其它适当方法。尽管选择性沉积允许使用加成法来构建引线,但还允许使用去除电介质或金属以形成阻抗不同的互连件的减成技术。例如,可以适当地对利用一个或多个裸片所填充的封装体进行引线接合,以使所有的封装体和器件压焊点互连。如针对例示裸片封装体的制造所用的步骤和结构的图5看出,可以将电介质涂层200以预定厚度沉积到焊线金属导体202上(步骤A),其中电介质的预定厚度是二次互连阻抗所需的。例如可以通过蚀刻步骤(步骤B)去除二次阻抗焊线电介质,之后进行第二涂层204的沉积(步骤C),之后进行这两个互连件的金属化206(步骤D)。该减成工艺将创建两个不同的阻抗的焊线。
在针对图6所示的实施例中,说明包括具有所选择的多个阻抗的电介质和金属涂布引线212、214的球栅阵列(BGA)封装体210。BGA是广泛地用于集成电路的表面安装封装,并且由于BGA的底表面整体可用于连接压焊点,因此与双列直插、引线框架或其它扁平封装体相比,BGA通常可以提供更多的互连引脚。在许多类型的BGA封装体中,将裸片216贴装至具有连接至连接压焊点的可填充通孔220的衬底218。焊线212、214可用于使顶侧的裸片216连接至压焊点/通孔220,结果提供从衬底的顶侧向底部的电气接线。在BGA封装件中,利用粘性焊剂将焊料球222贴装至封装体的底部并且保持在适当位置,直到焊接至印刷电路板或其它衬底为止。如这里所述,可以利用具有电介质层和可外接地金属层的改进了的引线来替换传统的BGA封装体的焊线。这些引线可以在内芯和外金属层内具有变化的电介质厚度,并且可以选择性地优化这些引线以具有特定阻抗,从而可被选择成至少部分基于电介质层厚度而不同或良好地匹配。如从图6看出,支撑长的引线212和短的引线214这两者。
更详细地,改进了的BGA封装体的组件可以要求将裸片以面朝上的方式贴装至衬底,从而支撑衬底中的在通孔周围以邻接方式形成的连接压焊点。针对所需的各互连件适当地对该组件进行引线接合,其中在衬底上的连接压焊点和裸片上的连接压焊点之间形成焊线。低频率和功率的输入连接至低频率的信号引线,而高频率的输入和输出连接至高频率的信号引线。在一些实施例中,低频率和功率的输入的厚度可以不同于高频率的信号引线的厚度。然后对组件进行任何基本保形的电介质材料的涂布。由于聚对二甲苯的低成本、便于真空沉积和优良的性能特性,因此可以使用聚对二甲苯。可以通过蚀刻、热降解或激光烧蚀来选择性地去除电介质层的在引线框架贴装点附近的一小部分,从而形成向接地接触点或接地屏蔽层的电气连接。同样,可以在裸片连接压焊点附近去除电介质层的一小部分,以允许接地连接。在将金属化层涂敷到电介质层的顶部之后在结构中接地,从而形成接地屏蔽。应当考虑到趋肤深度和DC电阻问题来选择优选的金属层的厚度,并且该厚度应主要包括诸如银、铜或金等的优良电气导体。对于大多数应用,1微米的涂层厚度对于功能而言是足够的,但更厚的涂层有助于使引线之间的串扰为最低限度。可以通过光刻法或其它掩蔽方法与镀法或其它选择性沉积方法的组合来在定义区域中添加这些涂层。可以通过将包覆成型件或盖放置在裸片上、之后进行切割(切单)并进行测试,来完成封装体。
可选地,在针对图7所示的实施例中,可以通过形成包含单独的封装部位和外侧框架部分的二维阵列的引线框架带材来制造包括从裸片延伸至引线框架的基于低成本的引线框架的裸片封装体300。引线框架制造是传统的,并且可以包括通过蚀刻、冲压或电极定位的单独引线的形成。可以将引线框架带材放置在包括但不限于注塑成型或传递成形设备的模具中。将适当的电介质材料(优选为诸如市售的环氧模塑料)注入、泵入或传递到模具内,以实现引线框架/模具材料复合结构。模具材料的性质对于这些模具材料的介质常数、损耗切线和电色散性质以及这些模具材料的温度、湿度和其它机械性能属性而言很重要。
对如此得到的复合引线框架带材上的各封装部位清洗脱模材料和/或溢料飞边,并且准备好将金属饰面沉积在引线框架的暴露的金属部分上。这可以通过诸如浸没或电镀等的镀技术来实现,并且将选择这些金属以用于腐蚀抑制并且容易进行引线接合。这种涂饰的示例是薄的镍层(以供保护),之后是金层(向焊线添加保护和能力)。然后,可以利用贴装至基底的所需裸片填充如此得到的模制引线框架带材的各封装部位,其中针对特定封装应用的机械性质和热性质选择裸片贴装材料。然后,针对所需的各互连件适当地对如此得到的组件进行引线接合,其中在引线框架上的引线和裸片上的连接压焊点之间形成焊线。低频率和功率的输入连接至低频率的信号引线,而高频率的输入和输出连接至高频率的信号引线。在一些实施例中,低频率和功率的输入的厚度可以不同于高频率的信号引线的厚度。
如上述的BGA封装体210那样,然后对所填充的引线框架带材进行包括聚对二甲苯的任何基本保形的电介质材料的涂布。在聚对二甲苯的情况下,可以优选利用诸如具有丙烯酸粘合剂的真空兼容的聚酰亚胺等的胶带或者相似材料对封装体的底部进行掩蔽以防止沉积到引线的最终将贴装至PCB的区域上。这将便于在后续步骤进行更容易的焊接。可以通过蚀刻、热降解或激光烧蚀来选择性地去除电介质层的在引线框架贴装点附近的一小部分,从而形成向接地接触点或接地屏蔽层的电气连接。同样,可以在裸片连接压焊点附近去除电介质层的一小部分,以允许接地连接。在将金属化层涂敷到电介质层的顶部之后在结构中接地,从而形成接地屏蔽。应当考虑到趋肤深度和DC电阻问题来选择优选的金属层的厚度,并且该厚度应主要包括诸如银、铜或金等的优良电气导体。对于大多数应用,1微米的涂层厚度对于功能而言是足够的,但更厚的涂层有助于使引线之间的串扰为最低限度。可以通过光刻法或其它掩蔽方法与镀法或其它选择性沉积方法的组合来在定义区域中添加这些涂层。可以通过将包覆成型件或盖放置在裸片上、之后进行切割(切单)并进行测试,来完成封装体。
示例1-金属芯引线直径不同的阻抗
对于聚对二甲苯C品种,相对介电常数约为2.73。对于期望的50欧姆的阻抗,聚对二甲苯C沉积将如以下的表1所示。
表1:50欧姆的同轴线
通常,较厚的焊线需要较薄的电介质层以实现相同的阻抗。或者换言之,对于给定的电介质层厚度,不同的焊线直径将实现不同的阻抗。下表示出在焊线直径不同的情况下针对20微米的电介质厚度所实现的阻抗。
表2:20微米的聚对二甲苯C电介质的同轴线
示例2-使用电介质厚度不同的金属芯直径相同的引线的双阻抗封装体
以下的表3示出0.7mil(密尔)的焊线上的针对各种电介质厚度所实现的阻抗。
表3:由0.7mil的焊线芯构成的同轴线
为了制造具有阻抗为5欧姆的引线和阻抗为50欧姆的引线这两者的封装体,针对第一层互连件,可以适当地将至少一个裸片所填充的封装体与直径为0.7mil的配线引线接合,最终阻抗为50欧姆。利用聚对二甲苯C电介质对如此得到的封装体组件进行25.03(26.34-1.31)微米的涂布。连同任何所需的清洁步骤一起进行用以打开向封装体上的功率连接和向器件上的相应功率连接所用的通孔的激光处理。执行后续的引线接合工艺以进行相应的器件和封装体压焊点之间的功率连接。对如此得到的组件进行第二次1.31微米的聚对二甲苯C电介质涂布步骤。因而,利用总共为26.34微米的电介质涂布初始功率连接引线,而利用1.31微米的电介质涂布第二遍配线。然后对如此得到的组件应用激光通孔形成处理,以使器件上的接地压焊点、封装体和/或封装体接地面暴露。
使该结构金属化在绝缘层上以形成接地屏蔽件。应考虑到趋肤深度问题和DC阻抗问题来选择优选的金属层的厚度,并且该金属层主要应包括诸如银、铜或金、铝或其它适当的导电金属等的优良电导体。对于大部分应用,1微米的涂层厚度对于功能而言就足够了,但较厚的涂层可以有助于使引线之间的串扰最小。可以通过光刻法或其它掩蔽法与镀法或其它选择性沉积方法的组合来在所定义的区域中添加这些涂层。
示例3-(如通过插入损耗所测量到的)阻抗性能
图8示出如利用S参数仪在0~5GHz的频率范围内所测量到的、与裸焊线410、30欧姆的同轴线缆420和50欧姆的同轴线缆430有关的相对于频率的以dB为单位的插入损耗比较。相匹配的(50欧姆)430和不匹配的(30欧姆)420这两个同轴线缆相比裸线具有优良性能。
尽管已经与特定优选实施例相结合地具体说明了本发明,但显而易见,本领域技术人员鉴于上述说明将明白许多替换、修改和变化。因此,考虑所附权利要求书将包含如落在本发明的真实范围和精神内的许多这些替换、修改和变化。
Claims (13)
1.一种裸片封装体(100,210,300),包括:
裸片(120),其具有多个连接压焊点(122);
裸片衬底(102),其支撑多个连接元件;
第一引线(110),其连接至至少一个连接压焊点(122)并且包括具有第一芯直径的第一金属芯和包围所述第一金属芯的具有第一电介质厚度的电介质层;以及
第二引线(112),其连接至至少一个连接压焊点并且包括具有第二芯直径的第二金属芯和包围所述第二金属芯的具有第二电介质厚度的电介质层,
其中,所述第一电介质厚度不同于所述第二电介质厚度,
所述第一引线(110)具有第一阻抗,并且所述第二引线(112)具有不同于所述第一阻抗的第二阻抗,以及
电介质层至少之一包括由不同的电介质成分形成的多个层。
2.根据权利要求1所述的裸片封装体,其中,所述第一金属芯的直径不同于所述第二金属芯的直径。
3.根据权利要求1所述的裸片封装体,其中,所述第一金属芯的直径与所述第二金属芯的直径相同。
4.根据权利要求1至3中任一项所述的裸片封装体,其中,所述裸片衬底包括填充通孔(220)以允许形成球栅阵列封装体即BGA封装体。
5.根据权利要求1至3中任一项所述的裸片封装体,其中,所述裸片衬底包括引线框架以形成引线框架封装体。
6.根据权利要求1至3中任一项所述的裸片封装体,其中,所述第一金属芯还连接至第一接地端;以及所述第二金属芯还连接至与所述第一接地端不同的第二接地端。
7.根据权利要求1至3中任一项所述的裸片封装体,其中,电介质层分别被能够接地的金属涂层包围。
8.根据权利要求1至3中任一项所述的裸片封装体,其中,所述第一金属芯顺次涂布有电介质层和第一导电金属层,以及/或者所述第二金属芯顺次涂布有电介质层和第二导电金属层。
9.根据权利要求8所述的裸片封装体,其中,所述第一导电金属层连接至接地端或零电位接触点,以及/或者所述第二导电金属层连接至接地端或零电位接触点。
10.根据权利要求1至3中任一项所述的裸片封装体,其中,还包括封装引线、或者所述裸片、或者这两者的包覆成型件。
11.一种用于制造根据权利要求1至10中任一项所述的裸片封装体的方法,所述方法包括以下步骤:
设置裸片和具有连接压焊点的裸片衬底;
使所述裸片经由具有第一直径金属芯的第一焊线连接至所述裸片衬底的所述连接压焊点;
使所述裸片经由具有第二直径金属芯的第二焊线连接至所述裸片衬底的所述连接压焊点;
将至少一层电介质沉积在所述第一焊线的所述第一直径金属芯和所述第二焊线的所述第二直径金属芯上,各电介质的厚度彼此不同;以及
使所述至少一层电介质金属化在所述第一直径金属芯和所述第二直径金属芯上,以创建具有不同阻抗的两个引线,
其中,将至少一层电介质沉积的步骤包括将成分不同的多层电介质沉积在所述第一焊线和/或所述第二焊线上。
12.根据权利要求11所述的方法,其中,还包括以下步骤:掩蔽所述裸片的区域以允许进行选择性沉积。
13.根据权利要求11或12所述的方法,其中,还包括以下步骤:去除所述至少一层电介质的一部分,以使得能够接地。
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2014
- 2014-07-02 KR KR1020157037292A patent/KR101870887B1/ko active Active
- 2014-07-02 EP EP14747513.1A patent/EP3017466B1/en active Active
- 2014-07-02 CA CA2915410A patent/CA2915410C/en active Active
- 2014-07-02 CN CN201480038229.2A patent/CN105378915B/zh active Active
- 2014-07-02 JP JP2016522339A patent/JP6395822B2/ja active Active
- 2014-07-02 TW TW103211708U patent/TWM506365U/zh not_active IP Right Cessation
- 2014-07-02 WO PCT/EP2014/001826 patent/WO2015000597A1/en active Application Filing
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Patent Citations (1)
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TW201316477A (zh) * | 2011-10-06 | 2013-04-16 | Adl Engineering Inc | 具電磁干擾屏蔽之封裝模組 |
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WO2015000597A9 (en) | 2015-03-26 |
KR20160029036A (ko) | 2016-03-14 |
TWM506365U (zh) | 2015-08-01 |
US10340209B2 (en) | 2019-07-02 |
WO2015000597A1 (en) | 2015-01-08 |
CA2915410A1 (en) | 2015-01-08 |
CA2915410C (en) | 2019-12-17 |
US20160372402A1 (en) | 2016-12-22 |
EP3017466B1 (en) | 2020-05-13 |
CN105378915A (zh) | 2016-03-02 |
JP6395822B2 (ja) | 2018-09-26 |
JP2016526793A (ja) | 2016-09-05 |
EP3017466A1 (en) | 2016-05-11 |
KR101870887B1 (ko) | 2018-06-25 |
HK1218183A1 (zh) | 2017-02-03 |
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