CN105308753A - 稳定高迁移率的motft和低温下的制备 - Google Patents
稳定高迁移率的motft和低温下的制备 Download PDFInfo
- Publication number
- CN105308753A CN105308753A CN201480030005.7A CN201480030005A CN105308753A CN 105308753 A CN105308753 A CN 105308753A CN 201480030005 A CN201480030005 A CN 201480030005A CN 105308753 A CN105308753 A CN 105308753A
- Authority
- CN
- China
- Prior art keywords
- layer
- metal oxide
- high mobility
- amorphous
- protective layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000010410 layer Substances 0.000 claims abstract description 202
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 83
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 83
- 239000011241 protective layer Substances 0.000 claims abstract description 72
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 64
- 239000001301 oxygen Substances 0.000 claims abstract description 64
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 64
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 239000000463 material Substances 0.000 claims abstract description 29
- 238000004544 sputter deposition Methods 0.000 claims abstract description 20
- 239000005300 metallic glass Substances 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 claims description 88
- 238000000151 deposition Methods 0.000 claims description 34
- 230000008569 process Effects 0.000 claims description 28
- 238000005516 engineering process Methods 0.000 claims description 26
- 229910052751 metal Inorganic materials 0.000 claims description 24
- 239000002184 metal Substances 0.000 claims description 24
- 239000010409 thin film Substances 0.000 claims description 21
- 238000005530 etching Methods 0.000 claims description 18
- 230000008021 deposition Effects 0.000 claims description 17
- 230000003647 oxidation Effects 0.000 claims description 12
- 238000007254 oxidation reaction Methods 0.000 claims description 12
- 229910052710 silicon Inorganic materials 0.000 claims description 10
- 239000000126 substance Substances 0.000 claims description 10
- CXKCTMHTOKXKQT-UHFFFAOYSA-N cadmium oxide Inorganic materials [Cd]=O CXKCTMHTOKXKQT-UHFFFAOYSA-N 0.000 claims description 8
- CFEAAQFZALKQPA-UHFFFAOYSA-N cadmium(2+);oxygen(2-) Chemical compound [O-2].[Cd+2] CFEAAQFZALKQPA-UHFFFAOYSA-N 0.000 claims description 8
- 239000011521 glass Substances 0.000 claims description 7
- 239000012528 membrane Substances 0.000 claims description 7
- 239000010703 silicon Substances 0.000 claims description 7
- -1 3-nitrobenzophenone phosphonic acids Chemical class 0.000 claims description 5
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 5
- 229910007541 Zn O Inorganic materials 0.000 claims description 5
- 238000000059 patterning Methods 0.000 claims description 5
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 4
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 4
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 4
- FYTPGBJPTDQJCG-UHFFFAOYSA-N Trichloro(chloromethyl)silane Chemical compound ClC[Si](Cl)(Cl)Cl FYTPGBJPTDQJCG-UHFFFAOYSA-N 0.000 claims description 4
- 239000002131 composite material Substances 0.000 claims description 4
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 4
- NQBRDZOHGALQCB-UHFFFAOYSA-N oxoindium Chemical compound [O].[In] NQBRDZOHGALQCB-UHFFFAOYSA-N 0.000 claims description 4
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 239000010935 stainless steel Substances 0.000 claims description 4
- 229910001220 stainless steel Inorganic materials 0.000 claims description 4
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 claims description 4
- 229910001887 tin oxide Inorganic materials 0.000 claims description 4
- ABADVTXFGWCNBV-UHFFFAOYSA-N trichloro-(4-chlorophenyl)silane Chemical compound ClC1=CC=C([Si](Cl)(Cl)Cl)C=C1 ABADVTXFGWCNBV-UHFFFAOYSA-N 0.000 claims description 4
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 229910052733 gallium Inorganic materials 0.000 claims description 3
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- 229910052750 molybdenum Inorganic materials 0.000 claims description 3
- 239000002985 plastic film Substances 0.000 claims description 3
- 229920006255 plastic film Polymers 0.000 claims description 3
- 229910052715 tantalum Inorganic materials 0.000 claims description 3
- 229910052718 tin Inorganic materials 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 229910052720 vanadium Inorganic materials 0.000 claims description 3
- 229910052726 zirconium Inorganic materials 0.000 claims description 3
- BBAMTDMNXVSCRU-UHFFFAOYSA-N (4-chlorophenyl) dihydrogen phosphate Chemical compound OP(O)(=O)OC1=CC=C(Cl)C=C1 BBAMTDMNXVSCRU-UHFFFAOYSA-N 0.000 claims description 2
- ANHAEBWRQNIPEV-UHFFFAOYSA-N 2-chloroethyl dihydrogen phosphate Chemical compound OP(O)(=O)OCCCl ANHAEBWRQNIPEV-UHFFFAOYSA-N 0.000 claims description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims description 2
- 238000003384 imaging method Methods 0.000 claims description 2
- 229910052749 magnesium Inorganic materials 0.000 claims description 2
- 238000004381 surface treatment Methods 0.000 claims description 2
- 230000037230 mobility Effects 0.000 claims 42
- 239000011248 coating agent Substances 0.000 claims 2
- 238000000576 coating method Methods 0.000 claims 2
- 239000007943 implant Substances 0.000 claims 2
- 238000001816 cooling Methods 0.000 claims 1
- SOCTUWSJJQCPFX-UHFFFAOYSA-N dichromate(2-) Chemical compound [O-][Cr](=O)(=O)O[Cr]([O-])(=O)=O SOCTUWSJJQCPFX-UHFFFAOYSA-N 0.000 claims 1
- 238000002513 implantation Methods 0.000 claims 1
- 238000011065 in-situ storage Methods 0.000 abstract 1
- 230000032258 transport Effects 0.000 description 36
- 239000013078 crystal Substances 0.000 description 17
- 238000002360 preparation method Methods 0.000 description 16
- 230000005540 biological transmission Effects 0.000 description 13
- 239000004065 semiconductor Substances 0.000 description 9
- 230000015572 biosynthetic process Effects 0.000 description 7
- 230000000903 blocking effect Effects 0.000 description 7
- 238000002161 passivation Methods 0.000 description 7
- 239000010408 film Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- 239000003989 dielectric material Substances 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 229920006395 saturated elastomer Polymers 0.000 description 4
- 238000010301 surface-oxidation reaction Methods 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 230000006378 damage Effects 0.000 description 3
- 230000007613 environmental effect Effects 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 239000004033 plastic Substances 0.000 description 3
- 229920003023 plastic Polymers 0.000 description 3
- 238000004062 sedimentation Methods 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 229910020923 Sn-O Inorganic materials 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- UHYPYGJEEGLRJD-UHFFFAOYSA-N cadmium(2+);selenium(2-) Chemical compound [Se-2].[Cd+2] UHYPYGJEEGLRJD-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000005012 migration Effects 0.000 description 2
- 238000013508 migration Methods 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 239000002094 self assembled monolayer Substances 0.000 description 2
- 239000013545 self-assembled monolayer Substances 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- 229920001621 AMOLED Polymers 0.000 description 1
- 235000005206 Hibiscus Nutrition 0.000 description 1
- 235000007185 Hibiscus lunariifolius Nutrition 0.000 description 1
- 244000048199 Hibiscus mutabilis Species 0.000 description 1
- 235000003973 Hibiscus mutabilis Nutrition 0.000 description 1
- 244000284380 Hibiscus rosa sinensis Species 0.000 description 1
- 229910000583 Nd alloy Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910004541 SiN Inorganic materials 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000009056 active transport Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000002048 anodisation reaction Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 229920002457 flexible plastic Polymers 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 150000003949 imides Chemical class 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(III) oxide Inorganic materials [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 239000002648 laminated material Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002107 myocardial effect Effects 0.000 description 1
- 239000002159 nanocrystal Substances 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229920000307 polymer substrate Polymers 0.000 description 1
- KMUONIBRACKNSN-UHFFFAOYSA-N potassium dichromate Chemical compound [K+].[K+].[O-][Cr](=O)(=O)O[Cr]([O-])(=O)=O KMUONIBRACKNSN-UHFFFAOYSA-N 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 230000000250 revascularization Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000010023 transfer printing Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
- 238000004017 vitrification Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
- H01L29/247—Amorphous materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L2021/775—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate comprising a plurality of TFTs on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
Abstract
一种制备稳定高迁移率的非晶MOTFT的方法,包括提供其上形成有栅极的衬底和位于栅极之上的栅极电介质层的步骤。通过溅射沉积在栅极电介质层上的载流子传输结构,该载流子传输结构包括邻近于栅极电介质的非晶高迁移率的金属氧化物的层和沉积在所述非晶高迁移率的金属氧化物的层上的材料的相对惰性的保护层,该两层以无氧和在原位的方式来被沉积。非晶金属氧化物的层具有大于40cm2/Vs的迁移率和处于大约1018cm-3到大约5x1019cm-3的范围的载流子浓度。源极/漏极接触位于所述保护层之上并与之形成电接触。
Description
技术领域
本发明一般涉及高迁移率的稳定MOTFT和低温下的制备工艺。
背景技术
目前金属氧化物薄膜晶体管(MOTFT)因其在纳米晶或非晶态中相对的高迁移率而引起人们的强烈兴趣。另外,在许多应用中,希望在低于某些温度下制备高迁移率TFT,以便可以使用柔性和/或有机衬底。这种TFT中的有源半导体层必须在相对低的温度(如室温)形成/沉积,但是仍然有相对高的迁移率和稳定性。
多晶硅不能被用于这样的有源层:通过将晶粒的尺寸增加到与沟道长度可比较的水平,可以实现多晶硅TFT中的高迁移率。仅有少量的晶粒存在于沟道区域,由于它的大统计波动导致器件的非均一性。此外,多晶硅TFT中的高迁移率仅能在相对高的温度(典型地,超过500℃)实现。相似的趋势也存在于基于CdSe的TFT中,当有源层在高于某个温度形成(或后烘烤)并且晶粒的尺寸变得与沟道长度基本上可比较时,才可以实现基于CdSe的TFT中的高迁移率。相似地,由于每个TFT沟道位置处的晶粒边界和晶体晶粒尺寸和数量的波动性,微晶半导体的TFT特性会变化,即使在阵列的相邻的器件之间。例如,在亚微米栅极下的导电区域,每个不同的TFT可以包括从一个或两个多晶硅晶体晶粒到数个晶体晶粒,并且导电区域中的不同数量的晶体会产生不同的特性。不同的晶粒之中的尺寸和它们的物理特性也是不同的。
现有技术中已知,目前标准薄膜晶体管的沟道长度小于大约5微米,尤其对于便携显示应用。出于本公开的目的考虑,术语“非晶”限定为一种具有晶粒尺寸的材料,沿着沟道长度,比当前标准薄膜晶体管的沟道长度小得多,比如大约100纳米或更小。以这种方式,面积为5x5=25μm2的沟道区域的晶粒数量大于103,并且不同TFT中的性能差异在实际应用中会变得可以忽略不计。这样,通过有造成器件之间小得多的性能波动的大量的晶粒边界,由非晶或纳米晶体金属氧化物形成的沟道层的MOTFT可以保证与非晶硅TFT相似的均一性。
典型的基于非晶In-Ga-Zn-O的MOTFT的迁移率小于15cm2/Vs。然而,高质量的多晶硅TFT的迁移率大约在40到100cm2/Vs。许多显示应用需要迁移率与稳定性与那些由多晶硅TFT展现的一样。因此,将迁移率改善大于40cm2/Vs会使得MOTFT更有吸引力。MOTFT的迁移率强烈依赖于沟道层的体积载流子浓度。为了实现高迁移率,体积载流子浓度必须等于或大于1018/cm3。但是体积载流子浓度能被提升到多高是有限制的。在大多数应用中,希望阈值电压(Vth)接近于零且栅极电压处于小于20V的范围内。例如,有机发光二极管(OLED)或无机LED的TFT像素驱动器通常工作在0-10V的期望范围,而对于AMLCD是在0-15V的范围。
栅极电压控制下的电荷是Cg(Vg-Vth),这里Cg是栅极电容,Vg是栅极电压,Vth是阈值电压。于是体积载流子浓度被Cg(Vg-Vth)/d限制,这里d是载流子传输层(MOTFT沟道)的厚度。为实现高迁移率器件,载流子传输层的厚度“d”应做的尽可能的小。但是厚度d受底层衬底的表面质量(如粗糙度和均一性)限制。在底层衬底表面是玻璃上的电介质层或基于聚合物的衬底的情况下,沟道层下典型的表面粗糙度大约在0.2-2nm。
在使用薄膜载流子传输层的情况下,其它因素也必须被考虑到。例如,当载流子传输层极薄的时候,稳定性可能或易于被环境损害。首先,在工艺过程中,极薄的有源层可能被各种工艺材料攻击和损坏或甚至破坏。其次,即使在工艺过程中设法避免此种问题的普遍发生,但如果在器件的制备和操作过程中,极薄的有源层被暴露于氧气或水,则运行的稳定性会受到损害。
因此,补救现有技术中上述的和其它的内在缺陷将是非常有益的。
因此,本发明的目的是提供新的和改进的制备稳定高迁移率金属氧化物薄膜晶体管(MOTFT)的工艺。
本发明的再一个目的是提供一种新的和改进的低温下的制备稳定非晶金属氧化物薄膜晶体管(MOTFT)的工艺。
本发明的另一个目的是提供一种新的和改进的制备迁移率等于或大于40cm2/Vs的稳定非晶金属氧化物薄膜晶体管(MOTFT)的工艺。
本发明的又一个目的是提供一种新的和改进的稳定非晶高迁移率的金属氧化物薄膜晶体管(MOTFT)。
发明内容
本发明的期望目的是根据一种制备稳定高迁移率的非晶MOTFT的方法实现的,这种方法包括提供其上形成有栅极的衬底和位于栅极之上的栅极电介质层的步骤。该方法进一步包括在栅极电介质层之上沉积载流子传输结构的步骤。这种载流子传输结构包括与栅极电介质相邻的非晶高迁移率的金属氧化物的层和具有与金属氧化物的层相比相对惰性的材料的保护层,以及在保护层上沉积源极/漏极接触。
本发明的期望目的是根据一种制备稳定高迁移率的非晶MOTFT的特殊方法实现的,这种方法包括提供其上形成有栅极的衬底和位于栅极之上的栅极电介质层的步骤。该方法进一步包括在栅极电介质层之上通过溅射沉积载流子传输结构。这种载流子传输结构包括邻近于栅极电介质的非晶高迁移率的金属氧化物的层和沉积在非晶高迁移率的金属氧化物的层上的材料的相对惰性的保护层,两者被无氧和在原位地加以沉积。非晶金属氧化物的层的迁移率大于40cm2/Vs,且载流子浓度处于大约1018cm-3到大约5x1019cm-3的范围内。源极/漏极接触被沉积在保护层之上并且与之形成电接触。
本发明的期望目的也是根据稳定高迁移率的非晶MOTFT的特定实施例实现的,这个特定实施例包括其上形成有栅极的衬底和位于栅极之上的栅极电介质层。载流子传输结构溅射在这个栅极电介质层之上。该载流子传输结构包括邻近于栅极电介质的非晶高迁移率的金属氧化物的层,其厚度处于等于或小于大约5nm的范围且优选大约2nm,和沉积在非晶高迁移率的金属氧化物上的相对惰性的材料的保护层,其厚度处于等于或小于大约50nm的范围,并且非晶金属氧化物的层的迁移率大于40cm2/Vs,且载流子浓度处于大约1018cm-3到大约5x1019cm-3的范围内。源极/漏极接触被沉积在保护层之上并且与之形成电接触。
附图说明
通过连同附图对优选实施例的下述的详细说明,本发明的前述和进一步以及更具体的目的和优点对本领域的技术人员会变得更加显而易见,附图包括:
图1示出简化的层图,该简化的层图图示出按照本发明的制备用于高迁移率金属氧化物薄膜晶体管(MOTFT)的高迁移率稳定非晶金属氧化物传输层的工艺的若干步骤;
图2图示出依据本发明的包含图1中的高迁移率稳定传输层的稳定高迁移率金属氧化物薄膜晶体管(限定为“刻蚀停止”MOTFT)的示例;
图3图示出包含图1中的高迁移率稳定传输层的另一个稳定高迁移率金属氧化物薄膜晶体管(限定为“背沟道刻蚀”MOTFT)的示例,且依据本发明,源极/漏极接触被沉积在保护层之上并且与之形成电接触;
图4通过图线图示出本发明公开的MOTFT的Id-Vgs和迁移率-Vgs的数据集。图4A的数据来自于图2中描述的具有刻蚀停止结构的MOTFT,而图4B的数据来自于图3中描述的具有背沟道刻蚀结构的MOTFT;并且
图5图示出依据本发明在柔性PET衬底上制备的MOTFT的Id-Vgs和迁移率-Vgs曲线的图线。
具体实施方式
金属氧化物半导体的迁移率强烈依赖于体积载流子密度。为了实现高性能应用的高迁移率,金属氧化物沟道的体积载流子密度要高。传统上,金属氧化物的体积载流子浓度受氧空位的控制。因此,对高迁移率MOTFT至关重要的是,载流子传输层(MOTFT沟道)的氧空位浓度要尽可能的高,并且在工艺过程中或是过程后,氧空位不减少。
参考图1,图示出制备高迁移率稳定传输结构的工艺中的若干步骤。初始提供衬底12,它可以是任一适当的支撑材料,且在优选实施例中,它是一种对用于自对准工序的辐射波长透明的材料,或在底部发射发光显示器或透射式液晶显示器的情况下透明的材料。透明衬底12的典型材料包括玻璃、塑料膜等。在不要求衬底透明的应用中,也可以使用抛光的不锈钢薄片。衬底12可以是刚性的、适形的或柔性的形式。在薄柔性塑料衬底上制备MOTFT需要所有的工艺温度低于它的玻璃化温度,Tg(高于此温度,永久的变形发生,以致于不同层之间的图案对准变得不实际)。在典型的聚合物衬底中,Tg处于160℃(PET)-390℃(PI)的范围内。
栅极金属层14以任一熟知的方式被沉积在衬底12的表面上。栅极电介质材料薄层16形成于栅极金属14之上,并且可以是能为TFT运行提供所需电介质常数的任一适当材料。栅极电介质层的适合材料包括SiO2、SiN、Al2O3、AlN、Ta2O5、TiO2、ZrO、HfO、SrO,或是它们的混合的组合或是多层形式。除传统形成方法(如PECVD、PVD等)外,上面的金属氧化物电介质还可以通过相应金属的表面氧化来制备。表面氧化的示例包括富氧环境下的加热、阳极氧化,或是它们的依次的组合。
载流子传输结构18包括沉积在层16上表面的半导体金属氧化物的低有源传输层d1和直接沉积在层d1上的保护层d2。如下面更加详细的说明一样,在没有中断沉积室中的真空的情况下,层d1沉积完成后紧接着沉积层d2,以致于出于本公开的目的,层d1和层d2的组合被认为是载流子传输结构。除在没有真空中断的情况下沉积层d1和层d2外,如接下来更加详细的描述一样,为实现高载流子迁移率,发现在无氧气存在的情况下溅射沉积层是优选的。
有源传输层d1的最佳材料是透明金属氧化物半导体,如铟锡氧化物(ITO)、氧化铟(InO)、氧化锡(SnO)、氧化镉(CdO)、氧化锌(ZnO)、铟锌氧化物(IZO)等。可以使用包含以上列举的多种金属氧化物组分的复合膜。对化学纯度的控制和有意图的化学掺杂能够在所需要的载流子浓度水平处优化载流子迁移率。就如本文公开的,利用载流子传输结构18,连同对形成层16的栅极电介质材料的电介质常数的适当选择,有源传输层d1中载流子浓度为5x1019cm-3的MOTFT能通过源极和漏极电极之间是有效电流的切换来加以制备。在优选的实施例中,有源传输层d1的载流子浓度处于大约1018cm-3到大约5x1019cm-3的范围内。
如以上说明,为了实现高迁移率器件,载流子传输层的厚度应该尽可能的小。在本实施例中,有源传输层d1的厚度处于小于大约5nm的范围内,并且可以适当地低至大约2nm。
在使用极薄膜载流子传输层的情况下,一些因素必须被考虑,例如,稳定性可能或易于被环境和接下来的工艺步骤损害。为了避免降低工艺的稳定性和运行的稳定性,薄传输层d1必须被一些惰性更强的层保护,如保护层d2。这里术语“惰性”的限定意味着层d2有低得多的载流子迁移率和载流子浓度,或者层d2是一种绝缘材料或是更接近于一种绝缘材料。保护层d2优选直接沉积在薄传输层d1上,并且基本与薄传输层d1用相同的沉积工艺(比如,在原位或在没有中断沉积室中的真空的情况下)。通过直接在层d1上沉积层d2,薄传输层d1没有被暴露到环境或工艺化学品中。用于保护层d2的最佳材料是比传输层d1惰性更强的金属氧化物,如M-Zn-O或M-In-O或它们的组合,其中M至少包括Al、Ga、Ta、Ti、Si、Ge、Sn、Mo、W、Cu、Mg、V、Zr等中的一个,并有充足的M含量来保证所需要的惰性态。M成分一般对氧气拥有更高的键合强度,这就使得保护层d2本质上比D1层惰性更强。虽然列出的氧化物的导电性比薄传输层d1小,但在不需要刻蚀的情况下,它们仍有充分的垂直导电性,允许金属S/D接触被沉积到保护层d2上。事实上,保护层d2上的接触金属的沉积被发现会从保护层d2中吸引氧,这样即使保护层d2是惰性的,由于以下的一些工艺步骤,也会形成良好的欧姆接触。
值得一提的是,在薄d1层(如标称厚度接近2nm)的情况下,双层结构和在双层结构内的相应的载流子传输保证大衬底区域之上的均匀导电性,即使在相对粗糙表面的栅极绝缘体上。
易于理解,薄非晶传输层d1的优选制备工艺是通过低温下的溅射加以沉积,优选室温,但不超过160℃。如此低温度的工艺使本发明公开的TFT能够被制备在塑料衬底上(如PET、PEN、PAN、PAS、PI等)。为了最大化迁移率,薄传输层d1中的残余载流子浓度应尽可能的高。为了有助于实现这个结果,在薄传输层d1的优选沉积中,没有氧气被引入溅射工艺。在有氧溅射工艺中,氧气被沉积系统充电带负电荷,被朝向衬底加速。在现有技术中,当制备金属氧化物TFT时,在溅射沉积的过程中,本领域技术人员引入氧气以将载流子浓度减小到1017cm3以下以及将MOTFT的阈值电压移向更正的方向,但是加速的氧离子会破坏形成中的膜,并造成膜中的缺陷和亚稳态。在溅射工艺中由引入氧气而产生的所有因素会造成低载流子迁移率和正偏置应力不稳定,通常在本领域中会被观察到。
在现有技术中,已知本文公开的许多d1层材料被传统地用作透明导电电极,其厚度通常超过100nm。衬底加热经常被用作优化导电性。已知这样条件下沉积的小于10nm的甚至是相同材料组分的超薄膜典型地会造成低载流子浓度和低迁移率。
相比之下,本发明公开的无氧溅射工艺能在传输层d1的标称厚度薄于5nm的情况下实现所需要的载流子浓度和高迁移率。
在优选实施例中,在没有中断溅射室中的真空的情况下,保护层d2的惰性金属氧化物在低温,优选室温,但不超过160℃下,通过溅射直接沉积到层d1上。保护层d2形成的厚度最高可达约20nm或更高。在通过溅射沉积惰性金属氧化物的步骤中,与上面针对有源层d1讨论的相同的问题也是普遍存在的。如果氧气被引入到溅射气体中,带负电荷的氧离子会被朝向衬底加速。一些被加速的氧离子可以渗透到有源传输层d1中,并在有源传输层d1内形成亚稳态氧,造成迁移率和稳定性的下降。因此,在优选的工艺中,保护层d2的惰性金属氧化物是通过无氧溅射沉积的。
可能会出现在无氧溅射沉积中的问题是保护层d2可能变得导电性太强并且MOTFT阈值电压被移得过负。通过在高温(例如大于160℃)在氧化环境下的结构的退火,保护层d2能够被氧化,将阈值电压向正的方向移动。环境气体中退火的问题是过程一般会太慢,特别是对于200℃以下的温度。因此,在两个步骤工艺中实现期望的氧化结果,这在低温下(如小于160℃)是非常有效的。
在氧化工艺的第一步骤中,保护层d2的惰性金属氧化物表面通过化学氧化工艺进行处理。在第二步骤中,在高温下表面氧被注入保护层d2。可以确认的是,通过将氧注入(driving)保护层d1,开关阈值电压大于0V的MOTFT能够在大约160℃或者低于160℃的温度下得以实现。
在保护层d2的氧化物顶表面处的氧源的形成可以包括多种可能选择中的任一个。例如,表面氧化可以包括高压(大于100mtorr)氧等离子体的使用,高压氧等离子体不包括能产生亚稳态的任何高能离子。另一个氧化选择是使用高压(大于100mtorr)的N2O等离子体。另一个氧化选择是使用紫外臭氧。再一个选择是利用自组装单层涂敷保护层d2,自组装单层例如为4-氯苯基三氯硅烷(4-CPTS)、氯甲基三氯硅烷(CMTS)、4-氯苯基磷酸(4-CPPA)、3-硝基苯基膦酸(3-NPPA)和2-氯乙基膦酸(2-CEPA)。再一种选择是用浓过氧化氢处理保护层d2的表面。又一种选择是用重铬酸钾溶液处理保护层d2的表面。
在以上氧处理示例或其它可以被修改的任一个中,表面修改的目的是在保护层d2的表面上沉积比环境中的氧更浓缩的浓缩的氧源/储备。这样的沉积工艺在低温下完成,例如在没有有意衬底加热的室温下。在这个工艺中的氧扩散可以忽略不计。然后使保护层d2表面的浓缩氧源经历高温(如大约160℃,或更高),这将会使氧迁移进保护层d2内。氧迁移进保护层d2使得惰性金属氧化物氧化的程度更高,并将阈值电压移至接近于零。由于将表面氧迁移进保护层d2的工艺是热激活的,氧会停留在保护层d2内,因为为保护层d2选择的惰性金属氧化物的组分比形成有源传输层d1的材料更加稳定。保护层d2的氧化工艺,因为表面处的非常浓缩的氧源(即氧扩散是浓度依赖性的),使得更低的高温的步骤成为可能。
以上的工艺提供了一种在塑料衬底(如PET、PEN、PAN、PAS和PI)上制备高迁移率、非晶双层的方法。PET衬底的最高适合温度大约是160℃。对PEN、PAN与PAS,扩散工艺的温度可以被升至180-220℃的范围。在PI(基酰亚胺)衬底或柔性玻璃衬底(如CorningWillow玻璃系列)的情况下,可以选择更高的处理温度来减少工艺次数。对于硼硅酸盐玻璃衬底的情况,处理温度可以在甚至更宽的范围选择。另一方面,为了保持传输层的非晶态(即,没有大于100nm的晶体晶粒),氧扩散工艺优选在350℃下进行。
值得注意的是,关于传输层d1的在保护层d2中的氧化的更大的趋势降低保护层d2中的载流子密度和迁移率,并且为了改善层d1中的载流子浓度和迁移率还耗尽了来自传输层d1的氧。结果是,按照本发明公开的工艺制备的MOTFT中的场效应迁移率实质上高于现有技术工艺器件中的场效应迁移率,在现有技术中,厚传输氧化膜被用作电极。例如,超过90cm2/Vsec的迁移率可以在具有由薄非晶In-Sn-O膜(In2O3:SnO,重量比等于90:10)组成的传输层d1的MOTFT中实现,与之对照,在含有相似In-Sn-O组分的厚晶体导电电极膜中观察到的迁移率只有30-50cm2/Vsec。
具体到图2,图2示出了“刻蚀停止”的莫芙类型的高迁移率稳定非晶MOTFT10。出于本公开的目的,MOTFT10被限定为“刻蚀停止”MOTFT。这个制备技术的完整工艺可以在题为“双自对准金属氧化物TFT(DoubleSelf-AlignedMetalOxideTFT)”的共同待审的美国专利申请中找到,这个专利是2011年5月26日提交的,序号为No.13/116,292,并且该专利通过引用并入本文。MOTFT10包括透明衬底12,它可以是用于自对准工序,对辐射(即,自对准曝光)波长透明的任意合适材料,如玻璃、塑料等。对于用作光-电或电-光应用的MOTFT,对所用波长透明也是需要的。例如,在显示应用中要求对可见光范围(400-700nm)透明,或在宽带图像传感器中要求对200nm-3200nm范围透明。栅极金属层14以任意合适的手段在衬底12的上表面上被图案化。因为栅极金属层14的位置不是关键的,实际上任意非关键图案技术都能被应用。
以下对本领域的技术人员是容易理解的,排除或取代采用物理气相沉积工艺(如溅射、波束、热沉积等)形成栅极金属层14以及通过利用接近式或投影工具的光刻被图案化,栅极层可以采用本领域技术人员已知的各种印刷工艺的任一种而形成,包括喷墨、调配、压印、转印或平版印刷的方法。栅极金属也可以利用现有技术已知的电镀方法形成。排除或取代使用传统光刻,层14也可以利用激光写入光刻被图案化。虽然为了易于理解,图示的是单个的栅极金属14(如单个的MOTFT),但是应该被理解成,这可以代表一个或多个(甚至全部)用于背板或其它大面积应用的TFT。
栅极电介质材料的薄层16形成于栅极金属14之上和周围区域。出于本公开的目的,术语“周围区域”至少包括了图2所示区域(如栅极和沟道区域,以及源极/漏极区域)。再有,层16可以是覆盖整个大区域应用的覆盖层并且无需对准。栅极电介质材料可以是能提供TFT运行所需的电介质常数的任一合适材料。典型的无机材料包括SiO2、SiN、Al2O3、Ta2O5、TiO2、HfO2、ZrO2、SrO等。有机电介质也能够被用于层16。例如,在美国专利7,772,589中公开了具有有机栅极电介质的金属氧化物TFT。除了单个化合物,栅极电介质层16能够由这些处于混合的复合形式或处于多层叠层的材料构成。
载流子传输结构18,包括非晶半导体金属氧化物双层di/d2,被沉积在层16的上表面上。像以前提到的,有源传输层d1的典型材料是透明金属氧化物半导体,如铟锡氧化物(ITO)、氧化铟(InO)、氧化锡(SnO)、氧化镉(CdO)、氧化锌(ZnO)、铟锌氧化物(IZO)等。也可以使用包含以上列举的多种金属氧化物成分的复合膜。所需的载流子浓度可以通过化学掺杂实现,也可以通过在无氧环境和无衬底加热的情况下溅射工艺依次沉积成的双层d1/d2结构实现。应该注意的是,虽然完整的d2层有更多的化学惰性和更多的电阻性,但是在无氧环境下原始沉积的d2层被选择(通过金属成分的适当选择)以具有较高的从顶表面和与层d1接触的底表面两者吸引氧的趋势。从有源传输层d1吸引氧导致优化的载流子浓度和有源传输层d1内的载流子迁移率。
之后,载流子传输结构18可以通过标准的光刻被图案化,并且在高温氧扩散工艺之后,执行表面氧化工艺。所得到的结构18是非晶/纳米晶体,且没有超过100nm的晶体结构。
然后,钝化/刻蚀停止层20被沉积在载流子传输结构18上,并被图案化。排除或取代无机材料(如Al2O3、Ta2O5、TiO2、SiN和SiO2),光可图案化有机材料也能被用于层20。层20的选择原则是材料和相应的形成工艺不会对下面的载流子传输结构18产生破坏。通过引用合并进本文的美国专利7,977,151和8,187,929,以及美国专利申请13/115,749和13/718,813,公开了一系列这样的材料和工艺。
在下面的工艺中,层20被用作刻蚀停止/钝化层。图案可以通过常规的光刻来完成,或是通过使用栅极图案作为内置掩膜的自对准工艺来完成。自对准工艺的细节在美国专利7,605,026和7,977,151中进行了公开。
源极/漏极区域22可以通过物理气相沉积和本领域技术人员熟知的标准刻蚀方法来形成。或者,区域22通过自对准工艺形成,在自对准工艺中,利用了栅极层图案和非关键性的光刻掩膜,或是利用了如美国专利7,977,151和美国专利申请13/406,824公开的附加/印刷方法(如电镀)。源极和漏极之间的空间,即刻蚀停止/钝化层20,限定MOTFT10的导电沟道,用24表示。
可选的清洗/处理/刻蚀工艺(用等离子体或化学处理)可以被插在刻蚀停止/钝化层20的工序之后和源极/漏极区域22的沉积之前,用来提升载流子传输结构18和S/D电极(源极/漏极区域22)之间的电接触。在这些工艺过程中,刻蚀停止/钝化层20对沟道区域提供了必要的保护。
转向图3,按照本发明,图3图示出另一个金属氧化物薄膜晶体管(MOTFT)30。在这个示例中,MOTFT30包括具有形成于其上的底部栅极36的衬底34,和上覆于栅极36之上的栅极电介质层38。金属氧化物有源层40形成于栅极电介质层38之上,且源极/漏极金属接触42以空间隔开的关系处于有源层40之上,以众所周知的方式限定了源极/漏极金属接触之间的沟道区域。有源层40是载流子传输结构,其构造与图1的载流子传输结构18相似,并且包括低有源传输层d1和保护层d2,其中,高迁移率非晶半导体金属氧化物的低有源传输层d1沉积在层38的上表面上,保护层d2直接沉积在层d1上。这种类型的MOTFT被称为“背沟道刻蚀”MOTFT,并且稳定高迁移率的非晶MOTFT也能使用后沟道刻蚀工艺加以制备。
如上面关于图1和图2的描述,栅极36和层38与层40形成于衬底34之上。源极/漏极金属接触42优选通过先沉积接触金属的覆盖层来形成。在覆盖沉积S/D金属层之后,通过干法刻蚀或湿法刻蚀图案化层,以露出沟道区域,用44表示。沟道区域44的表面能通过清洗工序和随后的表面处理工序进行清洗。在“背沟道刻蚀”MOTFT30的配置中,沟道区域44可以用于氧化和S/D图案化后的氧注入中的一个步骤或多个步骤,并在制备工艺的这个点上是优选的。关于传输层d1的保护层d2中的氧化的较大的趋势,在S/D沉积和图案化工艺过程中以及氧化的后续一个或多个步骤中保护层d1,并且氧注入保证沟道区域44中的期望载流子浓度和迁移率。
对于某些应用,如图3的配置,附加的一个或多个有机/无机钝化层和电极层在S/D层的形成和图案化之后可能是需要的。由于本发明公开的改进的耐化学性,更大的工艺窗口、更多的工艺方法和更广的材料选择能够被用于下面的工艺中。
转向图4,图4图示出两个按照本发明制备的MOTFT的典型的Id-Vgs数据集。特别提及图4A,图示出如结合图2所描述的具有刻蚀停止结构的TFT的数据集。特别提及图4B,图示出如结合图3所描述的具有BCE结构的TFT的数据集。这些Id-Vgs数据是在室温下在Vds=1V和10V时获取的。相对应的线性迁移率和饱和迁移率也在每个图的右侧被示出。这些TFT的栅极金属是AL-Nd合金。栅极绝缘体在室温下通过表面阳极氧化形成。传输层是In:Sn比为90:10的IOT。层d1的厚度是2.5nm。保护层d2是厚度为30nm的In-Al-Zn-O。层d1和层d2在室温下无氧地通过溅射加以沉积。氧源区借助于上面公开的氧等离子体形成于层d2的表面处。从氧源区到层d2的氧注入工艺在300℃下持续进行30分钟。在图2中,可光图案化的聚酰亚胺被用作钝化/刻蚀停止层20。对于BCE结构的TFT,氧表面形成和注入工艺在S/D沉积和图案化之后进行。
电流开关电压接近0V。亚阈值电压摆幅是-0.1V,与高端LTPS-TFT的一样好。Ion/Ioff比在Vgs=+/-10V时,达到1010。对于刻蚀停止结构的TFT(图4A),线性迁移率在Vgs=12V时,达到62cm2/Vsec,而饱和迁移率在Vgs=8V时,达到58cm2/Vsec。对于BCE结构的TFT(图4B),线性迁移率在Vgs=6V时,达到82cm2/Vsec,而饱和迁移率在Vgs=3-4V时,达到97cm2/Vsec。
这些数据集代表以往在薄膜器件中看到的最佳性能之一。前向偏置的ON电流达到仅能在多晶硅TFT或Poly-CdTeTFT中看到的水平。另一方面,反向偏置的OFF电流实际上好于多晶硅TFT。这些数据集与在非晶硅器件中看到的最佳数一样好。实际上,图4示出的数据,与那些仅能在制备在晶体半导体晶片上的MOSFET中看到的数据是可比较的。
此外,利用本发明公开的制备方法制备的TFT表现出极好的稳定性。在DC前向偏置应力测试Vgs=+20V,Vds+0.1V,60℃,持续2小时的情况下,Vth偏移小于0.7V,而在DC负偏置应力Vgs=-20V,Vds+0.1V,60℃,持续2小时的情况下,Vth偏移是-0.3V。在300μA起始电流(在Vgs=Vds=5V),60℃,超过60小时的情况下的电流应力,显示出稳定的工作寿命:在整个测试中,Vth仅偏移小于0.5V。通过TFT的全部电荷超过70库仑。这样的性能使得AMLCD和AMOLED/AMLED有源矩阵显示器中的高帧速率和高像素密度成为可能。对于LCD的应用,背光照明TFT的稳定性也需要被考虑。在背光照明的情况下,这样的双层沟道结构具有内在的稳定性。在2小时的测试后,在光强度接近LCDTV和便携式设备应用的背光单元下的试验测试结果确认稳定性偏移不超过1V。
迁移率大于40cm2/Vsec,能使8000列和4000行的显示器的帧速率达到480Hz。高偏置稳定性和电流工作稳定性,能使像素驱动器电路处于有源显示区域以及能使列/行驱动器处于外围区域。
这样的高迁移率和稳定性MOTFT也能被用于显示阵列以外的薄膜电子器件。示例包括高像素密度和高帧速率的成像传感器阵列、压力传感器阵列、接触传感器阵列、化学传感器阵列或生物传感器阵列。工艺方法和用于大尺寸衬底的薄膜工艺工具使得许多应用有可能用基于硅晶片的电子电路实现。
转向图5,图5图示出制备在柔性PET衬底上的MOTFT的Id-Vgs和迁移率-Vgs的曲线图。生成图5中曲线图的MOTFT是用图3所示的BCE结构制备的。包括氧注入烘烤的所有的制备工艺是在小于或等于160℃的温度下进行的。线性迁移率在Vgs=15V时,达到约55cm2/Vsec,而饱和迁移率在Vgs=10V附近时,达到43cm2/Vsec。偏置稳定性和电流工作稳定性与上面的示例示出的接近。
这样,一种新的和改进的制备稳定高迁移率金属氧化物薄膜晶体管(MOTFT)的工艺被公开。进一步地,这种新的和改进的制备稳定非晶金属氧化物薄膜晶体管(MOTFT)的工艺描述了迁移率为40cm2/Vs或更高的MOTFT的制备。还有,一种新的和改进的稳定非晶高迁移率的金属氧化物薄膜晶体管(MOTFT)被公开。制备工艺包括沉积一种具有高迁移率层的载流子传输结构和在原位地沉积的具有高迁移率层的相对惰性保护性层,以保护高迁移率层不受后续工艺步骤和环境气体的损害。还有,MOTFT是在室温和不超过160℃的温度下制备的。更进一步地,在沉积具有高迁移率层的载流子传输结构和相对惰性保护性层的步骤中,没有氧气出现。
虽然描述的示例包括针对自对准目的的各种透明和非透明的层,但是下面的情况也会被理解,即如果自对准没有被用在制备工艺中,则各个层可能透明或非透明将依赖于最终产品形成中所用的特定材料和最终产品的应用。各种应用需要衬底的非透明,例如,以便柔性不锈钢箔能被用作衬底材料。还有,本发明公开的MOTFT使得适形或柔性的电子设备和器件成为可能。
本文中出于图示说明的目的所选的实施例的各种变化和修改对本领域的技术人员是很容易想到的。只要这样的修改和变形不背离本发明的精神,它们都应当被包括在本发明的范围内,这仅可以由下面的权利要求的适当的解释来评估。
用如此清晰和简明的术语充分描述本发明是为了使本领域的技术人员理解和实施的一致,本发明的权利要求是:
Claims (38)
1.一种制备稳定高迁移率的非晶MOTFT的方法,包括以下各步骤:
提供衬底,在所述衬底上形成有栅极,并且栅极电介质层位于在所述栅极的上方;
在所述栅极电介质层上沉积载流子传输结构,所述载流子传输结构包括邻近于所述栅极电介质的非晶高迁移率的金属氧化物的层和与所述金属氧化物的层相比为相对惰性的材料的保护层;
在大约室温下,形成与所述保护层的顶表面邻近的富氧区;并且
在大约350℃以下的高温下,将氧注入到所述保护层之中。
2.如权利要求1所述的方法,进一步包括以下各步骤:
在所述非晶高迁移率的金属氧化物的层中,限定上覆于所述栅极的沟道区域;
紧随所述氧注入的步骤,形成上覆于所述沟道区域的刻蚀停止层;
在所述沟道区域的相对侧上,限定源极/漏极接触区域;
在所述源极/漏极接触区域的表面上,执行清洗/处理/刻蚀步骤;并且
在所述源极/漏极接触区域中的所述保护层上,沉积和图案化源极/漏极接触。
3.如权利要求1所述的方法,在形成富氧区的所述步骤之前进一步包括以下各步骤:
在所述非晶高迁移率的金属氧化物的层中,限定上覆于所述栅极的沟道区域;
在所述沟道区域的相对侧上,限定源极/漏极接触区域;
在所述保护层上,沉积覆盖金属层;并且
图案化所述覆盖金属层以便在所述源极/漏极区域中形成源极漏极电极,并且露出上覆于所述沟道区域的、在所述源极/漏极电极之间的区域。
4.如权利要求1所述的方法,其中,沉积非晶高迁移率的金属氧化物的层的所述步骤包括:
沉积迁移率大于40cm2/Vs的非晶金属氧化物的层。
5.如权利要求1所述的方法,其中,沉积非晶高迁移率的金属氧化物的层的所述步骤包括:
沉积载流子浓度处于大约1018cm-3到大约5x1019cm-3的范围中的非晶金属氧化物的层。
6.如权利要求1所述的方法,其中,沉积所述非晶高迁移率的金属氧化物的层的所述步骤包括:
沉积铟锡氧化物(ITO)、氧化铟(InO)、氧化锡(SnO)、氧化镉(CdO)、氧化锌(ZnO)、铟锌氧化物(IZO)或氧化锌(ZnO)之一,或包含多于上述金属氧化物之一的复合膜。
7.如权利要求1所述的方法,其中,沉积所述非晶高迁移率的金属氧化物的层的所述步骤包括:
沉积厚度在等于或小于大约5nm的范围中的并且优选为大约2nm的层。
8.如权利要求1所述的方法,其中,沉积所述保护层的所述步骤包括:
沉积包含这样的金属氧化物的层,该金属氧化物比所述非晶高迁移率的金属氧化物层的惰性更强。
9.如权利要求8所述的方法,其中,沉积所述惰性更强的金属氧化物的所述步骤包括:
沉积M-Zn-O、M-In-O或它们的组合之一的层,其中M包括Al、Ga、Ta、Ti、Si、Ge、Sn、Mo、W、Cu、V或Zr中的至少之一。
10.如权利要求1所述的方法,其中,沉积所述保护层的所述步骤包括:
沉积厚度为在20nm-50nm并且优选为在20nm-30nm的范围中的层。
11.如权利要求1所述的方法,其中,沉积所述载流子传输结构的所述步骤包括:
在没有真空中断的情况下,以在原位的方式沉积所述非晶高迁移率的金属氧化物的层以及所述保护层。
12.如权利要求1所述的方法,其中,沉积所述载流子传输结构的所述步骤包括:
在160℃以下的温度,优选地在没有有意衬底加热的情况下,沉积所述非晶高迁移率的金属氧化物的层和所述保护层。
13.如权利要求1所述的方法,其中,沉积所述载流子传输结构的所述步骤包括:
通过溅射来沉积所述非晶高迁移率的金属氧化物的层和所述保护层。
14.如权利要求13所述的方法,其中,
在无氧的环境下,通过溅射来沉积所述非晶高迁移率的金属氧化物的层和所述保护层的所述步骤。
15.如权利要求1所述的方法,其中,形成所述富氧区的所述步骤包括:
使用氧等离子体、N2O等离子体、紫外臭氧的工艺,利用富氧自组装层的涂敷,利用过氧化氢或重铬酸盐溶液的表面处理,或其组合工艺。
16.如权利要求15所述的方法,其中,形成所述富氧区的所述步骤是在160℃以下并且优选为在100℃以下的温度执行的。
17.如权利要求15所述的方法,其中,形成所述富氧区的所述步骤是在大于100mtorr的压力下执行的。
18.如权利要求15所述的方法,其中,使用利用富氧自组装层的所述涂敷来形成所述富氧区的所述步骤包括这样的自组装层,该自组装层包含4-氯苯基三氯硅烷(4-CPTS)、氯甲基三氯硅烷(CMTS)、4-氯苯基磷酸(4-CPPA)、3-硝基苯基膦酸(3-NPPA)、2-氯乙基膦酸(2-CEPA)或它们的组合之一。
19.如权利要求1所述的方法,其中,从将来自氧源的氧注入到所述保护层之中的所述步骤包括:
使用等于或大于160℃的高温。
20.如权利要求1所述的方法,其中,提供所述衬底的所述步骤包括提供这样的衬底,该衬底包括玻璃、塑料膜和不锈钢膜之一,所述玻璃、塑料膜和不锈钢膜中的每一种为刚性的、适形的或柔性的形式之一。
21.如权利要求1所述的方法,其中,提供所述栅极电介质层的所述步骤包括:
提供这样的层,该层包含SiO2、SiN、Al2O3、AlN、Ta2O5、TiO2、ZrO、HfO、SrO或它们的以混和或多层的形式的组合。
22.如权利要求21所述的方法,其中,提供所述栅极电介质层的所述步骤包括:
从对应的金属,通过阳极氧化,通过富氧环境下的加热,或通过它们的依次的组合,来形成所述栅极电介质层。
23.一种制备稳定高迁移率的非晶MOTFT的方法,包括以下各步骤:
提供衬底,在所述衬底上形成有栅极,并且栅极电介质层位于所述栅极的上方;
在没有有意衬底加热或在有意冷却的情况下,在所述栅极电介质层上通过溅射来沉积载流子传输结构,所述载流子传输结构包括邻近于所述栅极电介质的非晶高迁移率的金属氧化物的层和沉积在所述非晶高迁移率的金属氧化物的层上的材料的保护层,该两个层以无氧并且在原位的方式来被沉积,与所述非晶高迁移率的金属氧化物的层相比,所述保护层为相对惰性;
在低于160℃的温度下,在所述保护层的上表面形成富氧区;
在高温下,从所述富氧区将氧注入到所述保护层之中;并且
所得到的非晶金属氧化物的层具有大于40cm2/Vs的迁移率和处于大约1018cm-3到大约5x1019cm-3的范围中的载流子浓度。
24.如权利要求23所述的方法,进一步包括以下各步骤:
在所述非晶高迁移率的金属氧化物的层中,限定上覆于所述栅极的沟道区域;
紧随所述氧注入步骤,形成上覆于所述沟道区域的刻蚀停止层;
在所述沟道区域的相对侧上,限定源极/漏极接触区域;
在所述源极/漏极接触区域的表面上,执行清洗/处理/刻蚀步骤;并且
在所述源极/漏极接触区域中的所述保护层上,沉积和图案化源极/漏极接触。
25.如权利要求23所述的方法,在形成富氧区的所述步骤之前进一步包括以下各步骤:
在所述非晶高迁移率的金属氧化物的层中,限定上覆于所述栅极的沟道区域;
在所述沟道区域的相对侧上,限定源极/漏极接触区域;
在所述保护层上,沉积覆盖金属层;并且
图案化所述覆盖金属层,以便在所述源极/漏极区域中形成源极/漏极电极,并且露出上覆于所述沟道区域的、在所述源极/漏极电极之间的区域。
26.如权利要求23所述的方法,其中,沉积所述非晶高迁移率的金属氧化物的层的步骤包括:
沉积厚度在等于或小于大约5nm的范围中的并且优选为大约2nm的层。
27.如权利要求23所述的方法,其中,沉积所述保护层的步骤包括:
沉积厚度在20nm-50nm范围中的层。
28.一种稳定高迁移率的非晶MOTFT,其具有等于或大于40cm2/Vs的迁移率,其包括:
衬底,在所述衬底上形成有栅极,并且栅极电介质层位于所述栅极的上方;
在所述栅极电介质层上的载流子传输结构,所述载流子传输结构包括邻近于所述栅极电介质的非晶高迁移率的金属氧化物的层和与所述金属氧化物的层相比为相对惰性的材料的保护层,以及
在所述保护层上的源极/漏极接触。
29.如权利要求28所述的稳定高迁移率的非晶MOTFT,其中,
所述非晶高迁移率的金属氧化物的层包括处于大约1018cm-3到大约5x1019cm-3的范围中的载流子浓度。
30.如权利要求28所述的稳定高迁移率的非晶MOTFT,其中,
所述非晶高迁移率的金属氧化物的层包括铟锡氧化物(ITO)、氧化铟(InO)、氧化锡(SnO)、氧化镉(CdO)、氧化锌(ZnO)、铟锌氧化物(IZO)或包含它们的组合的复合膜之一。
31.如权利要求28所述的稳定高迁移率的非晶MOTFT,其中,
所述非晶高迁移率的金属氧化物的层的厚度在等于或小于大约5nm的范围中,并且优选为大约2nm。
32.如权利要求28所述的稳定高迁移率的非晶MOTFT,其中,
所述保护层包含这样的金属氧化物,该金属氧化物比所述非晶高迁移率的金属氧化物层的惰性更强。
33.如权利要求32所述的稳定高迁移率的非晶MOTFT,其中,
所述惰性更强的金属氧化物包括M-Zn-O、M-In-O、或它们的组合之一,其中M包括Al、Ga、Ta、Ti、Si、Ge、Sn、Mo、W、Cu、Mg、V或Zr中的至少之一。
34.如权利要求28所述的稳定高迁移率的非晶MOTFT,其中,
所述保护层包括厚度处于20nm-50nm范围中的层。
35.如权利要求28所述的稳定高迁移率的非晶MOTFT,其中,
所述MOTFT被包含在薄膜电路中。
36.如权利要求35所述的稳定高迁移率的非晶MOTFT,其中,
所述薄膜电路被包含在电子器件中,所述电子器件包括显示阵列器件、成像传感器阵列器件、压力传感器阵列器件、接触传感器阵列器件、化学传感器阵列器件或生物传感器阵列器件之一。
37.如权利要求36所述的稳定高迁移率的非晶MOTFT,其中,
所述薄膜电路被包含在位于所述阵列之内的像素驱动器或读出电路中,或者被包含在位于所述阵列的外围区域中的列/行驱动器电路中。
38.一种稳定高迁移率的非晶MOTFT,包括:
衬底,在所述衬底上形成有栅极,并且栅极电介质层位于所述栅极的上方;
在所述栅极电介质层上溅射的载流子传输结构,所述载流子传输结构包括:邻近于所述栅极电介质的非晶高迁移率的金属氧化物的层,沉积在所述非晶高迁移率的金属氧化物的层上的相对惰性的材料的保护层,所述非晶金属氧化物的层的厚度在等于或小于大约5nm的范围中并且优选为大约2nm,所述保护层的厚度在20nm-50nm的范围中,并且所述非晶金属氧化物的层具有大于40cm2/Vs的迁移率和处于大约1018cm-3到大约5x1019cm-3的范围中的载流子浓度;以及
位于所述保护层上的并且与所述保护层形成电接触的源极/漏极接触。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/902,514 | 2013-05-24 | ||
US13/902,514 US9356156B2 (en) | 2013-05-24 | 2013-05-24 | Stable high mobility MOTFT and fabrication at low temperature |
PCT/US2014/037191 WO2014189681A2 (en) | 2013-05-24 | 2014-05-07 | Stable high mobility motft and fabrication at low temperature |
Publications (1)
Publication Number | Publication Date |
---|---|
CN105308753A true CN105308753A (zh) | 2016-02-03 |
Family
ID=51934313
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201480030005.7A Pending CN105308753A (zh) | 2013-05-24 | 2014-05-07 | 稳定高迁移率的motft和低温下的制备 |
Country Status (6)
Country | Link |
---|---|
US (2) | US9356156B2 (zh) |
EP (1) | EP3005420A4 (zh) |
JP (1) | JP2016519443A (zh) |
KR (1) | KR20160012165A (zh) |
CN (1) | CN105308753A (zh) |
WO (1) | WO2014189681A2 (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2017143135A (ja) * | 2016-02-09 | 2017-08-17 | 株式会社ジャパンディスプレイ | 薄膜トランジスタ |
CN107749422A (zh) * | 2017-09-21 | 2018-03-02 | 信利(惠州)智能显示有限公司 | 氧化物半导体薄膜晶体管 |
CN108780757A (zh) * | 2016-03-22 | 2018-11-09 | 株式会社半导体能源研究所 | 半导体装置以及包括该半导体装置的显示装置 |
WO2020119126A1 (zh) * | 2018-12-12 | 2020-06-18 | 广州新视界光电科技有限公司 | 氧化物半导体材料、薄膜晶体管及制备方法和显示面板 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9412623B2 (en) * | 2011-06-08 | 2016-08-09 | Cbrite Inc. | Metal oxide TFT with improved source/drain contacts and reliability |
US9362413B2 (en) * | 2013-11-15 | 2016-06-07 | Cbrite Inc. | MOTFT with un-patterned etch-stop |
US9136355B2 (en) * | 2013-12-03 | 2015-09-15 | Intermolecular, Inc. | Methods for forming amorphous silicon thin film transistors |
FR3024589B1 (fr) * | 2014-07-29 | 2017-12-08 | Commissariat Energie Atomique | Dispositif electronique et son procede de fabrication |
US20160313282A1 (en) * | 2015-04-27 | 2016-10-27 | Chan-Long Shieh | Motft and array circuit for chemical/biochemical applications |
US9515158B1 (en) | 2015-10-20 | 2016-12-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure with insertion layer and method for manufacturing the same |
US9496415B1 (en) | 2015-12-02 | 2016-11-15 | International Business Machines Corporation | Structure and process for overturned thin film device with self-aligned gate and S/D contacts |
WO2017208109A1 (en) | 2016-06-03 | 2017-12-07 | Semiconductor Energy Laboratory Co., Ltd. | Sputtering target, oxide semiconductor, oxynitride semiconductor, and transistor |
KR20200132917A (ko) | 2018-03-12 | 2020-11-25 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 금속 산화물 및 금속 산화물을 포함한 트랜지스터 |
KR102163565B1 (ko) * | 2018-12-07 | 2020-10-12 | 연세대학교 산학협력단 | 산화물 반도체 박막 트랜지스터 |
KR20230169355A (ko) * | 2021-05-26 | 2023-12-15 | 가부시키가이샤 니콘 | 반도체 장치, 전자 디바이스, pH 센서, 바이오 센서, 반도체 장치의 제조 방법, 및 전자 디바이스의 제조 방법 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090140243A1 (en) * | 2007-11-30 | 2009-06-04 | Samsung Electronics Co., Ltd. | Oxide semiconductor thin film transistors and fabrication methods thereof |
CN101630692A (zh) * | 2008-07-14 | 2010-01-20 | 三星电子株式会社 | 沟道层和包括该沟道层的晶体管 |
US20110140100A1 (en) * | 2009-12-10 | 2011-06-16 | Masahiro Takata | Thin-film transistor, method of producing the same, and devices provided with the same |
US20120112182A1 (en) * | 2010-11-05 | 2012-05-10 | Sony Corporation | Thin film transistor and a method of manufacturing the same |
US20130063675A1 (en) * | 2010-07-14 | 2013-03-14 | Katsunori Misaki | Thin film transistor substrate |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7211825B2 (en) * | 2004-06-14 | 2007-05-01 | Yi-Chi Shih | Indium oxide-based thin film transistors and circuits |
JP4609797B2 (ja) * | 2006-08-09 | 2011-01-12 | Nec液晶テクノロジー株式会社 | 薄膜デバイス及びその製造方法 |
JP4404881B2 (ja) * | 2006-08-09 | 2010-01-27 | 日本電気株式会社 | 薄膜トランジスタアレイ、その製造方法及び液晶表示装置 |
KR101345376B1 (ko) * | 2007-05-29 | 2013-12-24 | 삼성전자주식회사 | ZnO 계 박막 트랜지스터 및 그 제조방법 |
US8058096B2 (en) * | 2007-07-31 | 2011-11-15 | Hewlett Packard Development Company, L.P. | Microelectronic device |
KR101270172B1 (ko) * | 2007-08-29 | 2013-05-31 | 삼성전자주식회사 | 산화물 박막 트랜지스터 및 그 제조 방법 |
KR101270174B1 (ko) * | 2007-12-03 | 2013-05-31 | 삼성전자주식회사 | 산화물 반도체 박막 트랜지스터의 제조방법 |
JP5325446B2 (ja) * | 2008-04-16 | 2013-10-23 | 株式会社日立製作所 | 半導体装置及びその製造方法 |
EP2146379B1 (en) * | 2008-07-14 | 2015-01-28 | Samsung Electronics Co., Ltd. | Transistor comprising ZnO based channel layer |
US7812346B2 (en) * | 2008-07-16 | 2010-10-12 | Cbrite, Inc. | Metal oxide TFT with improved carrier mobility |
US8129718B2 (en) * | 2008-08-28 | 2012-03-06 | Canon Kabushiki Kaisha | Amorphous oxide semiconductor and thin film transistor using the same |
US9082857B2 (en) * | 2008-09-01 | 2015-07-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising an oxide semiconductor layer |
JP5339825B2 (ja) * | 2008-09-09 | 2013-11-13 | 富士フイルム株式会社 | 薄膜電界効果型トランジスタおよびそれを用いた表示装置 |
KR20100054453A (ko) * | 2008-11-14 | 2010-05-25 | 삼성전자주식회사 | 반도체 소자 및 그 형성 방법 |
CN102265405B (zh) * | 2008-12-24 | 2015-09-23 | 3M创新有限公司 | 金属氧化物半导体薄膜晶体管中的稳定性增强 |
KR101034686B1 (ko) * | 2009-01-12 | 2011-05-16 | 삼성모바일디스플레이주식회사 | 유기전계발광 표시 장치 및 그의 제조 방법 |
JP2010165922A (ja) * | 2009-01-16 | 2010-07-29 | Idemitsu Kosan Co Ltd | 電界効果型トランジスタ、電界効果型トランジスタの製造方法及び半導体素子の製造方法 |
WO2010114529A1 (en) * | 2009-03-31 | 2010-10-07 | Hewlett-Packard Development Company, L.P. | Thin-film transistor (tft) with a bi-layer channel |
US8530273B2 (en) * | 2010-09-29 | 2013-09-10 | Guardian Industries Corp. | Method of making oxide thin film transistor array |
US20150108467A1 (en) * | 2010-12-20 | 2015-04-23 | Sharp Kabushiki Kaisha | Semiconductor device and display device |
JP5679933B2 (ja) * | 2011-08-12 | 2015-03-04 | 富士フイルム株式会社 | 薄膜トランジスタ及びその製造方法、表示装置、イメージセンサー、x線センサー並びにx線デジタル撮影装置 |
-
2013
- 2013-05-24 US US13/902,514 patent/US9356156B2/en active Active
-
2014
- 2014-05-07 KR KR1020157035554A patent/KR20160012165A/ko not_active Application Discontinuation
- 2014-05-07 CN CN201480030005.7A patent/CN105308753A/zh active Pending
- 2014-05-07 EP EP14801432.7A patent/EP3005420A4/en not_active Withdrawn
- 2014-05-07 WO PCT/US2014/037191 patent/WO2014189681A2/en active Application Filing
- 2014-05-07 JP JP2016515344A patent/JP2016519443A/ja active Pending
-
2016
- 2016-05-31 US US15/169,356 patent/US20170033202A1/en not_active Abandoned
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090140243A1 (en) * | 2007-11-30 | 2009-06-04 | Samsung Electronics Co., Ltd. | Oxide semiconductor thin film transistors and fabrication methods thereof |
CN101630692A (zh) * | 2008-07-14 | 2010-01-20 | 三星电子株式会社 | 沟道层和包括该沟道层的晶体管 |
US20110140100A1 (en) * | 2009-12-10 | 2011-06-16 | Masahiro Takata | Thin-film transistor, method of producing the same, and devices provided with the same |
US20130063675A1 (en) * | 2010-07-14 | 2013-03-14 | Katsunori Misaki | Thin film transistor substrate |
US20120112182A1 (en) * | 2010-11-05 | 2012-05-10 | Sony Corporation | Thin film transistor and a method of manufacturing the same |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2017143135A (ja) * | 2016-02-09 | 2017-08-17 | 株式会社ジャパンディスプレイ | 薄膜トランジスタ |
CN108780757A (zh) * | 2016-03-22 | 2018-11-09 | 株式会社半导体能源研究所 | 半导体装置以及包括该半导体装置的显示装置 |
US11489076B2 (en) | 2016-03-22 | 2022-11-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and display device including the same |
US11721769B2 (en) | 2016-03-22 | 2023-08-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and display device including the same |
CN107749422A (zh) * | 2017-09-21 | 2018-03-02 | 信利(惠州)智能显示有限公司 | 氧化物半导体薄膜晶体管 |
WO2020119126A1 (zh) * | 2018-12-12 | 2020-06-18 | 广州新视界光电科技有限公司 | 氧化物半导体材料、薄膜晶体管及制备方法和显示面板 |
Also Published As
Publication number | Publication date |
---|---|
WO2014189681A3 (en) | 2015-05-07 |
US20170033202A1 (en) | 2017-02-02 |
US20140346495A1 (en) | 2014-11-27 |
US9356156B2 (en) | 2016-05-31 |
WO2014189681A2 (en) | 2014-11-27 |
JP2016519443A (ja) | 2016-06-30 |
EP3005420A2 (en) | 2016-04-13 |
KR20160012165A (ko) | 2016-02-02 |
EP3005420A4 (en) | 2017-01-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN105308753A (zh) | 稳定高迁移率的motft和低温下的制备 | |
US7994510B2 (en) | Thin film transistor, method of manufacturing the same and flat panel display device having the same | |
JP5110803B2 (ja) | 酸化物膜をチャネルに用いた電界効果型トランジスタ及びその製造方法 | |
JP5725698B2 (ja) | アモルファス酸化物半導体及び該アモルファス酸化物半導体を用いた薄膜トランジスタ | |
US8008658B2 (en) | Thin film transistor, method of manufacturing the same, and flat panel display device having the same | |
JP4332545B2 (ja) | 電界効果型トランジスタ及びその製造方法 | |
JP5657433B2 (ja) | 薄膜トランジスタの製造方法、薄膜トランジスタ、表示装置、センサ及びx線デジタル撮影装置 | |
US20160043227A1 (en) | Thin film transistor and manufacturing method thereof | |
US20100176388A1 (en) | Thin film transistor, method of manufacturing the same and flat panel display device having the same | |
JP2008141119A (ja) | 酸化物半導体を用いた表示装置及びその製造方法 | |
JP2010161327A (ja) | 有機電界発光表示装置及びその製造方法 | |
JP2009004733A (ja) | インバータの作製方法及びインバータ | |
US20160247830A1 (en) | Thin film transistor and method of manufacturing the same, array substrate and display device | |
KR101901251B1 (ko) | 산화물 반도체 박막트랜지스터 및 그의 제조 방법 | |
WO2015119385A1 (ko) | 이황화 몰리브덴으로 이루어진 액티브층을 갖는 박막트랜지스터, 그 제조방법 및 이를 구비하는 디스플레이 장치 | |
KR101132989B1 (ko) | 박막 트랜지스터의 제조 방법 및 전기 광학 장치의 제조 방법 | |
JP2013249537A (ja) | 酸化物半導体スパッタリング用ターゲット、これを用いた薄膜トランジスタの製造方法 | |
TW200937996A (en) | Organic light emitting display device and fabrications thereof and electronic device | |
KR20120100241A (ko) | 박막 트랜지스터 및 그 제조 방법, 박막 트랜지스터를 구비한 평판 표시 장치 | |
JP5553868B2 (ja) | 酸化物半導体を用いた表示装置及びその製造方法 | |
CN112713196A (zh) | 一种薄膜晶体管及其制备方法和阵列基板 | |
KR100944808B1 (ko) | 박막 트랜지스터 및 그의 제조방법 | |
JP2010073880A (ja) | 薄膜電界効果型トランジスタ及びその製造方法 | |
KR20080105740A (ko) | 박막 트랜지스터의 제조방법 | |
WO2023224792A1 (en) | Regeneration anneal of metal oxide thin-film transistors |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20160203 |
|
WD01 | Invention patent application deemed withdrawn after publication |