CN105140181A - Tft阵列基板的制造方法、tft阵列基板及显示装置 - Google Patents

Tft阵列基板的制造方法、tft阵列基板及显示装置 Download PDF

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CN105140181A
CN105140181A CN201510605434.9A CN201510605434A CN105140181A CN 105140181 A CN105140181 A CN 105140181A CN 201510605434 A CN201510605434 A CN 201510605434A CN 105140181 A CN105140181 A CN 105140181A
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array substrate
tft array
pixel electrode
layer
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陈磊
彭志龙
代伍坤
张磊
仇淼
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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Beijing BOE Optoelectronics Technology Co Ltd
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Priority to PCT/CN2016/072292 priority patent/WO2017049824A1/zh
Priority to US15/324,641 priority patent/US10020325B2/en
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
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Abstract

本发明提供了一种TFT阵列基板的制造方法、TFT阵列基板及显示装置，涉及显示技术领域，能够在不增加TFT阵列基板的耦合电容的前提下，解决源极信号线断裂所引起的信号无法传输的问题。其中，所述一种TFT阵列基板的制造方法包括：在衬底基板上依次形成透明导电层和源漏金属层；对源漏金属层和透明导电层进行一次构图工艺，形成相重叠的源极信号线和像素电极线。前述制造方法用于TFT阵列基板的制造。

Description

TFT阵列基板的制造方法、TFT阵列基板及显示装置
技术领域
本发明涉及显示技术领域，尤其涉及一种TFT(ThinFilmTransistor，薄膜晶体管)阵列基板的制造方法、TFT阵列基板及显示装置。
背景技术
TFT阵列基板是显示装置的重要组成部件。TFT阵列基板通常包括衬底基板，及设置于衬底基板上的栅极、栅极保护层、有源层、像素电极、源极、漏极、源极信号线和源漏极保护层，其中，像素电极由透明导电层经构图工艺形成，源极、漏极和源极信号线由源漏金属层经构图工艺形成，透明导电层位于源漏金属层的下方。
由于受到源漏金属层的构图工艺的前道工艺和后道工艺，及源漏金属层的构图工艺中涂胶不均匀等因素的影响，源极信号线容易发生断裂，导致信号无法传输。如图1所示，现有技术中为解决源极信号线4断裂所引起的信号无法传输的问题，在透明导电层的构图工艺中，与像素电极3′同步形成了像素电极线3，该像素电极线3位于待形成源极信号线的位置，从而使后续形成的源极信号线4与该像素电极线3重叠。当源极信号线4发生断裂时，信号能够通过断裂的源极信号线4下方的像素电极线3进行传导。
但是，在上述改善的技术方案的实际应用过程中，本发明的发明人发现：上述改善的技术方案会引起TFT阵列基板的耦合电容增加，导致TFT阵列基板的功耗增加。
发明内容
为克服上述现有技术中的缺陷，本发明提供一种TFT阵列基板的制造方法、TFT阵列基板及显示装置，以在不增加TFT阵列基板的耦合电容的前提下，解决源极信号线断裂所引起的信号无法传输的问题。
为达到上述目的，本发明采用如下技术方案：
本发明的第一方面提供了一种TFT阵列基板的制造方法，所述制造方法包括：在衬底基板上依次形成透明导电层和源漏金属层；对所述源漏金属层和所述透明导电层进行一次构图工艺，形成相重叠的源极信号线和像素电极线。
上述TFT阵列基板的制造方法中，形成了相重叠源极信号线和像素电极线，在源极信号线发生断裂时，信号能够通过断裂的源极信号线下方的像素电极线进行传导。并且，源极信号线和像素电极线利用一次构图工艺形成，因此二者之间不存在对位偏差的问题，二者能够刚好重叠，不存在错位，相当于源极信号线的宽度仍为其本身原有的宽度，从而源极信号线与像素电极之间的距离不会增大，二者之间所产生的耦合电容不会增加。
本发明的第二方面提供了一种TFT阵列基板，所述TFT阵列基板包括相重叠的像素电极线和源极信号线，所述像素电极线和所述源极信号线在同一次构图工艺下形成。
由于上述TFT阵列基板的像素电极线和源极信号线相重叠，并且二者在同一次构图工艺下形成，因此该TFT阵列基板实现了在不增加耦合电容的前提下，解决源极信号线断裂所引起的信号无法传输的问题。
本发明的第三方面提供了一种显示装置，所述显示装置包括本发明的第二方面所提供的TFT阵列基板。
由于上述显示装置包括本发明的第二方面所提供的TFT阵列基板，因此上述显示装置具有与该TFT阵列基板相同的有益效果，在此不再赘述。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1为现有技术中的TFT阵列基板的截面结构图；
图2～图9为本发明实施例所提供的TFT阵列基板的制造方法的各步骤图。
附图标记说明：
1-衬底基板；2-栅极保护层；3-像素电极线；
3′-像素电极；30-透明导电层；4-源极信号线；
4′-覆盖像素电极的源漏金属层；40-源漏金属层；
5-源漏极保护层；60-光刻胶；61-第一光刻胶层；
62-第二光刻胶层；70-掩膜版；71-全透光图形；
72-部分透光图形；73-遮光图形。
具体实施方式
正如背景技术所述，现有技术中在源极信号线4的下方设置像素电极线3的技术方案并不能很好地解决源极信号线4断裂所引起的信号无法传输的问题。本发明的发明人经过大量的研究和实验发现，产生上述问题的主要原因是：像素电极线3和源极信号线4分别在两次构图工艺中形成，在源漏金属层的构图工艺中，掩膜需要与像素电极线3进行对位，由于构图工艺的局限性，因此对位时容易出现偏差，造成所形成的源极信号线4不能与像素电极线3刚好重叠，二者之间存在错位，这相当于增加了源极信号线4的宽度，造成源极信号线4与像素电极3′之间的间距减小。由于电容的大小与两极板之间的间距呈反比，因此源极信号线4与像素电极3′之间的间距减小，会导致源极信号线4与像素电极3′之间所产生的耦合电容增大，进而造成TFT阵列基板的功耗增加。
基于上述发现，本发明的发明人提出一种TFT阵列基板的制造方法，该制造方法包括以下步骤：
步骤S1：在衬底基板上依次形成透明导电层和源漏金属层；
步骤S2：对源漏金属层和透明导电层进行一次构图工艺，形成相重叠的源极信号线和像素电极线。
上述TFT阵列基板的制造方法中，形成了相重叠源极信号线和像素电极线，在源极信号线发生断裂时，信号能够通过断裂的源极信号线下方的像素电极线3进行传导。并且，源极信号线和像素电极线利用一次构图工艺形成，因此源极信号线和像素电极线之间不存在对位偏差的问题，二者能够刚好重叠，不存在错位，也就不会增大源极信号线的宽度，从而不会减小源极信号线与像素电极之间的距离，二者之间所产生的耦合电容不会增加，进而TFT阵列基板的功耗不会增加。
为使本发明所提出的上述技术方案的目的、特征和优点能够更加明显易懂，下面将结合附图，对上述技术方案的实施例进行清楚、完整地描述。显然，所描述的实施例仅仅是上述技术方案的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动的前提下所获得的所有其它实施例，均属于本发明保护的范围。
参见图2，步骤S1为在衬底基板1上依次形成透明导电层30和源漏金属层40，透明导电层30的材料可为金属氧化物透明导电材料，如ITO(IndiumTinOxide，氧化铟锡)，形成透明导电层30和源漏金属层40可采用溅射工艺。
需要说明的是，本实施例所提供的TFT阵列基板的制造方法，在步骤S1之前还可包括形成栅极、栅极保护层和有源层的步骤，这些步骤具体可为：在衬底基板上形成栅极金属层，对栅极金属层进行构图工艺，形成栅极；在具有栅极的衬底基板上形成栅极保护层2(如图2所示)；在栅极保护层2上形成半导体层，对半导体层进行构图工艺，形成有源层。
参见图3～图8，步骤S2可包括以下步骤：
步骤S21：如图3所示，在源漏金属层40上涂覆光刻胶60。
涂覆光刻胶60可采用旋涂工艺，光刻胶60优选粘度高、均匀性好、对光的敏感度高的光刻胶。光刻胶60可为正性光刻胶，曝光后形成可溶物质，也可为负性光刻胶，曝光后形成不可溶物质。本实施例以光刻胶60为负性光刻胶为例进行说明。
步骤S22：如图4所示，采用具有全透光图形71、部分透光图形72和遮光图形73的掩膜版70对所涂覆的光刻胶60曝光，形成第一光刻胶层61和第二光刻胶层62，第一光刻胶层61覆盖待形成源极信号线的区域，第二光刻胶层62覆盖待形成像素电极的区域，第一光刻胶层61的厚度大于第二光刻胶层62的厚度。
对于光刻胶60为负性光刻胶的情况，进行曝光前，掩膜版70的全透光图形71应对准待形成源极信号线的区域，除此之外还应对准待形成源极的区域和待形成漏极的区域，部分透光图形72应对准待形成像素电极的区域，遮光图形73应对准除待形成源极信号线的区域、待形成源极的区域、待形成漏极的区域和待形成像素电极的区域外的区域。曝光后，待形成源极信号线的区域和待形成源极和漏极的区域内的光刻胶变得不可溶，从而被完全保留，形成第一光刻胶层71，因此第一光刻胶层71覆盖待形成源极信号线的区域、待形成源极的区域和待形成漏极的区域；待形成像素电极的区域内的光刻胶变得部分可溶，从而被部分保留，形成第二光刻胶层72；除待形成源极信号线的区域、待形成源极的区域、待形成漏极的区域和待形成像素电极的区域外的区域内的光刻胶全部变得可溶，从而被全部去除。
上述的部分透光图形72可为半透光图形。
步骤S23：如图5所示，以第一光刻胶层61和第二光刻胶层62为掩膜，去除未被光刻胶覆盖的源漏金属层和透明导电层，在待形成源极信号线的区域内形成相重叠的源极信号线4和像素电极线3，并在待形成像素电极的区域内形成像素电极3′，像素电极3′被源漏金属层覆盖，即图5中的盖像素电极3′的源漏金属层4′。
在上述步骤S23中，可采用采用湿法刻蚀工艺去除未被光刻胶覆盖的源漏金属层和透明导电层。
由于源极信号线4和像素电极线3重叠，因此在源极信号线4断裂时，与源极信号线4重叠的像素电极线3能够将源极信号线4断裂的两端良好地电连接起来，保证信号顺利传导。并且，由于源极信号线4和像素电极线3在同一构图工艺下形成，因此源极信号线4和像素电极线3能够刚好重叠，二者之间没有错位，源极信号线4的宽度没有增大，从而源极信号线4与像素电极3′之间的距离没有减小，二者之间所产生的耦合电容没有增加，TFT阵列基板的功耗没有增加。
需要说明的是，在步骤S23中，源极和漏极与源极信号线4同时形成，像素电极3′与像素电极线3同时形成，可见本实施例将源漏金属层的构图工艺和透明导电层的构图工艺合二为一，节省了构图次数，从而简化了制造步骤，有利于提高TFT阵列基板的性能。
步骤S24：如图6所示，去除第二光刻胶层62，使覆盖像素电极的源漏金属层暴露4′。
在上述步骤S24中，可采用灰化工艺去除第二光刻胶层62。由于第一光刻胶层61的厚度大于第二光刻胶层62的厚度，因此当第二光刻胶层62被完全灰化去除时，第一光刻胶层61仍有一定的厚度。
步骤S25：如图7所示，以第一光刻胶层61为掩膜，去除暴露的源漏金属层4′。
在上述步骤S25中，可采用湿法刻蚀工艺去除暴露的源漏金属层4′。
步骤S26：如图8所示，去除第一光刻胶层61。
在上述步骤S26中，可采用剥离工艺去除第一光刻胶层61。
完成步骤S26后，如图9所示，可在衬底基板上形成源漏极保护层5，以保护下方的像素电极3′、源极金属线4、源极和漏极，并使它们与后续形成的膜层或元件电性绝缘。此外，在形成源漏极保护层5后，还可在源漏极保护层5上形成公共电极，以与像素电极3′形成电场。
本实施例还提供了一种TFT阵列基板，如图9所示，该TFT阵列基板包括相重叠的像素电极线3和源极信号线4，像素电极线3和源极信号线4在同一次构图工艺下形成。
由于源极信号线4和像素电极线3重叠，因此在源极信号线4断裂时，位于其下方的像素电极线3能够将源极信号线4断裂的两端电连接起来，且电连接良好，保证了信号的顺利传导。并且，由于该TFT阵列基板的像素电极线3和源极信号线4在同一次构图工艺下形成，因此避免了单独采用两次构图工艺分别形成像素电极线3和源极信号线4所引起的对位误差的问题，使得像素电极线3和源极信号线4能够刚好重叠，不存在错位，从而源极信号线4的宽度不会增大，源极信号线4与像素电极3′之间的距离不会减小，二者之间所产生的耦合电容不会增加，TFT阵列基板的功耗不会增加。
上述TFT阵列基板还包括像素电极3′，该像素电极3′、像素电极线3和源极信号线4在同一次构图工艺下形成。此外，与像素电极3′、像素电极线3和源极信号线4在同一次构图工艺下形成的还包括源极和漏极。可见，本实施例中，将用于形成像素电极3′和像素电极线3的构图工艺和用于形成源极信号线4、源极和漏极的构图工艺合二为一，节省了一次构图工艺，这有利于提高TFT阵列基板的性能。
本实施还提供了一种显示装置，该显示装置包括上述TFT阵列基板。由于上述TFT阵列基板能够在不增加TFT阵列基板的耦合电容的前提下，解决源极信号线断裂所引起的信号无法传输的问题，因此使得本实施例所提供的显示装置既能够在显示时不受源极信号线断裂的影响，又具有较小的耦合电容。
需要说明的是，本实施例所提供的显示装置的类型可为液晶型、OLED(OrganicLight-EmittingDiode，有机发光二极管)型或电子纸型，适用于手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
以上所述仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (10)

1.一种TFT阵列基板的制造方法，其特征在于，所述制造方法包括：
在衬底基板上依次形成透明导电层和源漏金属层；
对所述源漏金属层和所述透明导电层进行一次构图工艺，形成相重叠的源极信号线和像素电极线。
2.根据权利要求1所述的TFT阵列基板的制造方法，其特征在于，所述对所述源漏金属层和所述透明导电层进行一次构图工艺，形成相重叠的源极信号线和像素电极线，包括：
在所述源漏金属层上涂覆光刻胶；
采用具有全透光图形、部分透光图形和遮光图形的掩膜版对所涂覆的光刻胶曝光，形成第一光刻胶层和第二光刻胶层，所述第一光刻胶层覆盖待形成源极信号线的区域，所述第二光刻胶层覆盖待形成像素电极的区域，所述第一光刻胶层的厚度大于所述第二光刻胶层的厚度；
以所述第一光刻胶层和所述第二光刻胶层为掩膜，去除未被光刻胶覆盖的源漏金属层和透明导电层，在所述待形成源极信号线的区域内形成相重叠的源极信号线和像素电极线，并在所述待形成像素电极的区域内形成像素电极，所述像素电极被源漏金属层覆盖；
去除所述第二光刻胶层，使覆盖所述像素电极的源漏金属层暴露；
以所述第一光刻胶层为掩膜，去除暴露的源漏金属层；
去除所述第一光刻胶层。
3.根据权利要求2所述的TFT阵列基板的制造方法，其特征在于，所述第一光刻胶层还覆盖待形成源极的区域和待形成漏极的区域。
4.根据权利要求2所述的TFT阵列基板的制造方法，其特征在于，所述掩膜版所具有的部分透光图形为半透光图形。
5.根据权利要求2所述的TFT阵列基板的制造方法，其特征在于，所述去除未被光刻胶覆盖的源漏金属层和透明导电层，具体为：采用湿法刻蚀工艺去除未被光刻胶覆盖的源漏金属层和透明导电层；
所述去除所述第二光刻胶层，具体为：采用灰化工艺去除所述第二光刻胶层；
所述去除暴露的源漏金属层，具体为：采用湿法刻蚀工艺去除暴露的源漏金属层；
所述去除所述第一光刻胶层，具体为：采用剥离工艺去除所述第一光刻胶层。
6.根据权利要求1所述的TFT阵列基板的制造方法，其特征在于，形成所述透明导电层和所述源漏金属层采用溅射工艺。
7.根据权利要求1～6任一项所述的TFT阵列基板的制造方法，其特征在于，所述制造方法在形成所述透明导电层之前还包括：
在衬底基板上形成栅极金属层，对所述栅极金属层进行构图工艺，形成栅极；
在具有所述栅极的衬底基板上形成栅极保护层；
在所述栅极保护层上形成半导体层，对所述半导体层进行构图工艺，形成有源层。
8.一种TFT阵列基板，其特征在于，所述TFT阵列基板包括相重叠的像素电极线和源极信号线，所述像素电极线和所述源极信号线在同一次构图工艺下形成。
9.根据权利要求8所述的TFT阵列基板，其特征在于，所述TFT阵列基板还包括像素电极，所述像素电极、所述像素电极线和所述源极信号线在同一次构图工艺下形成。
10.一种显示装置，其特征在于，所述显示装置包括如权利要求8或9所述的TFT阵列基板。
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