CN105103287A - 借助于等温凝固反应来连接接合配对件以形成In-Bi-Ag连接层的方法和接合配对件的相应装置 - Google Patents
借助于等温凝固反应来连接接合配对件以形成In-Bi-Ag连接层的方法和接合配对件的相应装置 Download PDFInfo
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- CN105103287A CN105103287A CN201480018514.8A CN201480018514A CN105103287A CN 105103287 A CN105103287 A CN 105103287A CN 201480018514 A CN201480018514 A CN 201480018514A CN 105103287 A CN105103287 A CN 105103287A
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- Prior art keywords
- layer
- bismuth
- sequence
- indium
- mating member
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- 238000000034 method Methods 0.000 title claims abstract description 64
- 238000006243 chemical reaction Methods 0.000 title description 6
- 229910016331 Bi—Ag Inorganic materials 0.000 title description 2
- 229910052797 bismuth Inorganic materials 0.000 claims abstract description 101
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 claims abstract description 99
- 229910052738 indium Inorganic materials 0.000 claims abstract description 78
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims abstract description 77
- 229910052709 silver Inorganic materials 0.000 claims abstract description 50
- 239000004332 silver Substances 0.000 claims abstract description 50
- 230000004927 fusion Effects 0.000 claims abstract description 7
- 230000013011 mating Effects 0.000 claims description 97
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 50
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- 229910052719 titanium Inorganic materials 0.000 claims description 17
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 15
- MPZNMEBSWMRGFG-UHFFFAOYSA-N bismuth indium Chemical compound [In].[Bi] MPZNMEBSWMRGFG-UHFFFAOYSA-N 0.000 claims description 12
- 230000004907 flux Effects 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 8
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 5
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- 229910000765 intermetallic Inorganic materials 0.000 description 4
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- YZASAXHKAQYPEH-UHFFFAOYSA-N indium silver Chemical compound [Ag].[In] YZASAXHKAQYPEH-UHFFFAOYSA-N 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- 229910015363 Au—Sn Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000006071 cream Substances 0.000 description 2
- 230000005496 eutectics Effects 0.000 description 2
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 150000003608 titanium Chemical class 0.000 description 2
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 description 1
- 229910017944 Ag—Cu Inorganic materials 0.000 description 1
- 229910016338 Bi—Sn Inorganic materials 0.000 description 1
- 229910020816 Sn Pb Inorganic materials 0.000 description 1
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- 229910020922 Sn-Pb Inorganic materials 0.000 description 1
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- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- 239000005864 Sulphur Substances 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000032683 aging Effects 0.000 description 1
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- GOLXNESZZPUPJE-UHFFFAOYSA-N spiromesifen Chemical compound CC1=CC(C)=CC(C)=C1C(C(O1)=O)=C(OC(=O)CC(C)(C)C)C11CCCC1 GOLXNESZZPUPJE-UHFFFAOYSA-N 0.000 description 1
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Classifications
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Abstract
提出一种用于连接接合配对件(1,2)、例如光电子半导体芯片(例如发光二极管芯片)和电路板或金属导体框的方法,所述方法具有下述步骤:提供第一接合配对件(1)和第二接合配对件(2);将第一层序列(10)施加到第一接合配对件(1)上,所述第一层序列包括至少一个包含银或由银构成的层(11,15);将第二层序列(20)施加到第二接合配对件(2)上,所述第二层序列包括至少一个包含铟和铋的层(29)或者包含铟的层(23)和包含铋的层(22,24);在最高120℃的接合温度下,在预设的接合时间中,利用接合压强(p)将第一层序列(10)和第二层序列(20)在其分别背离第一接合配对件(1)和第二接合配对件(2)的端面上加压到一起,其中第一层序列(10)和第二层序列(20)熔化成连接层(30),所述连接层直接邻接于第一接合配对件和第二接合配对件并且其熔化温度至少为260℃。
Description
技术领域
提出一种用于连接接合配对件的方法。此外,提出一种接合配对件的装置。
背景技术
出版物DE102005029246描述一种用于在载体和半导体芯片之间构成焊接连接的方法。
发明内容
待实现的目的在于,提出一种用于连接两个接合配对件的方法,其中能够在相对小的温度下在接合配对件之间建立连接,其中这样制造的连接是特别温度稳定的。
根据方法的至少一个实施方式,首先提供第一接合配对件和第二接合配对件。接合配对件例如能够是下述元件中的至少一个:光电子半导体芯片、光电子半导体芯片的晶片、金属导体框、由塑料包封的金属导体框、陶瓷载体、电路板(印刷电路板)、由GaAs、Ge或Si构成的半导体晶片、由Si3N4或AlN或类似材料构成的陶瓷晶片等。例如,能够借助该方法将光电子半导体芯片、例如发光二极管芯片固定在电路板或金属导体框上。
根据方法的至少一个实施方式,将第一层序列施加到第一接合配对件上。第一层序列包括至少一个包含至少一种金属或由金属构成的层。例如能够通过物理气相沉积、如溅镀或蒸镀、电镀沉积或无电沉积将第一层序列施加到第一接合配对件上。
根据方法的至少一个实施方式,将第二层序列施加到第二接合配对件上。能够借助与施加第一层序列相同的方法施加第二层序列。第一和第二层序列能够是相同的。然而也可能的是,第一和第二层序列关于其构造、即在层序列中的层的顺序和/或关于为层序列的层所使用的材料彼此不同。此外可能的是,第一和第二层序列借助不同的沉积法产生。
根据方法的至少一个实施方式,在接合温度下,在预设的接合时间中,利用接合压强将第一层序列和第二层序列在其分别背离第一接合配对件和第二接合配对件的端面上挤压到一起。也就是说,将第一层序列以其背离第一接合配对件的端面首先与第二层序列的背离第二接合配对件的端面置于接触。然后,在接合温度下,在预设的时间段、接合时间中,利用接合压强将两个层序列在端面上挤压到一起。在此,第一层序列和第二层序列至少部分地或完全地熔化并且两个层序列的材料彼此混合。
根据方法的至少一个实施方式,第一层序列和第二层序列熔化成连接层,所述连接层直接邻接于第一接合配对件和第二接合配对件。也就是说,在接合时间之后,层序列组合成连接层,所述连接层因此位于两个接合配对件之间并且所述连接层促进接合配对件之间的机械连接。
根据方法的至少一个实施方式,第一层序列包括至少一个包含银或由银构成的层。因此,例如第一层序列也能够由所述银层构成。
根据方法的至少一个实施方式,第二层序列包括至少一个包含铟和铋的层,或者第二层序列包含至少一个包含铟的层和包含铋的层。换言之,第二层序列至少包含铟和铋作为金属。例如可能的是,第二层序列此外不包含其他金属。金属铟和铋能够在第二层序列中在唯一的共同的层中例如作为铟-铋合金存在。此外可能的是,第二层序列包含至少一个由铟构成的单层和由铋构成的单层。此外,可能的是,第一层和/或第二层不具有铅和/或锡。此外,第一层和/或第二层能够不具有金。
根据方法的至少一个实施方式,在接合期间将第一层序列和第二层序列加热到的接合温度最高为120℃。在所述温度下,第一层序列和第二层序列熔化或连接成连接层,所述连接层因此包含银、铟和铋并且在从大约260℃起的高得多的温度下才再次熔化。
根据用于连接接合配对件的方法的至少一个实施方式,所述方法包括下述步骤:
-提供第一接合配对件和第二接合配对件;
-将第一层序列施加到第一接合配对件上;
-将第二层序列施加到第二接合配对件上;
-在接合温度下,在预设的接合时间中,利用接合压强将第一层序列和第二层序列在其分别背离第一接合配对件和第二接合配对件的端面上挤压到一起,其中
-第一层序列包括至少一个包含银或由银构成的层;
-第二层序列包括至少一个包含铟和铋的层,或者第二层序列包括至少一个包含铟的层和包含铋的层;
-接合温度最高为120℃,并且
-第一层序列和第二层序列熔化成连接层,所述连接层直接邻接于第一接合配对件和第二接合配对件。
在此所描述的用于连接接合配对件的方法还利用下述考虑:
为了连接接合配对件、例如为了将半导体器件与壳体或印刷电路板组合或在将封装的电子器件安装到印刷电路板上时,能够使用软焊料并且将软焊用作连接法。为了将接合配对件的热负荷保持得小,在此力求低的接合温度。在此,已知的软焊料法例如基于Sn-Ag-Cu(SaC)材料体系或基于Sn-Pb材料体系。
在所述软焊料法中,液态的焊料在冷却到其熔点之下时凝固。当将连接再次加热到熔点的温度时,所述连接丧失其坚固性。因此,多个相继的集成步骤、例如将半导体芯片安装到陶瓷印刷电路板上和随后将陶瓷焊接到金属芯印刷电路板上不能够借助相同的焊料体系实现,而不损害首先建立的焊料连接的整体性。
该问题能够在使用具有分级的熔点的不同的焊料体系时克服。另一个可能性在于,代替在冷却时常规的低共熔的凝固,利用等温的凝固反应。在此,在接合温度保持恒定时,通过金属熔液与更高熔点的金属组分的反应形成持久牢固的连接,所述连接的熔点能够远远高于接合温度。为了在随后的接合步骤中不损害借助上文所述的SAC合金作为连接剂的连接,例如能够使用由焊料和粘接剂构成的混合物。对此的示例是TLPS膏(TransientLiquidPhaseSinteringPastes,瞬态液相烧结膏),所述TLPS膏使在较低的温度下熔化的Bi-SN合金与铜等温地凝固,以便不损害之前建立的SAC连接并且不排除随后的用于连接接合配对件的SAC连接。应确保由Bi-Sn构成的非稀有的组分的反应性的熔剂嵌入到粘接基质中。
另一个替选方案是借助Au-Sn作为连接剂的等温凝固,然而这一方面由于对此必需的高的金份额是昂贵的并且由于锡的相对高的熔点或低共熔的Au-Sn合金需要比能用于多个接合配对件的工艺温度更高的工艺温度。
现在,在此所描述的方法还基于利用等温凝固工艺的思想,所述等温凝固工艺一方面利用与Sn或AuSn相比在较低的温度下熔化的组分,并且所述等温凝固工艺另一方面避免昂贵的贵金属金。因此,第一和/或第二层能够不具有通常用在连接法中的铅、锡和/或金。此外,将薄的层用于制造第一和第二层序列,由此能够实现层序列的特别简单的熔化。
作为低熔点的组分使用由铋和铟构成的混合物。在铋-铟体系中,在明显低于100℃时已经能够形成熔液。通过添加银,熔化温度因此能够大幅地提高。铋-铟与银的等温凝固反应在100℃时已经引起在银和铟之间形成金属间化合物。由此,铋-铟的铟的份额变小并且化合物的熔化温度升高到大约260℃,其中金属间的银-铟化合物保持固态。在此,低熔点的组分能够由铋-铟合金构成或其能够在原位在接合工艺中由纯的铋层和铟层彼此间的反应产生。
根据方法的至少一个实施方式,连接层具有包含铋或由铋构成的区域,其中所述区域完全地由包含铟和/或银的材料包围。在此已证实的是,当在接合工艺之后连接层的其中能够溶解有少量的铟和银的铋组分没有形成连续的、无中断的层时,连接层是特别稳定的,尤其是热稳定的。尤其,通过将银引入到连接层中例如与接合温度相比能够显著地提高熔化温度。例如,以℃为单位的熔化温度能够是以℃为单位的接合温度的至少两倍高。
尤其,经由选择接合时间能够实现,在第一或第二层序列中存在的连续的铋层中断。因此,连接层不再具有连续的铋层,而是不具有由铋构成的这种层或连接层不具有简单连续的由铋构成的层。因此,铋层例如能够网状地构成,也就是说所述铋层具有由层序列的其他金属填充的孔或穿口。借助较长的接合时间可能的是,在接合前可能在第一层序列或第二层序列中存在的铋层分解成单个颗粒,所述颗粒由层序列的其他金属的材料、即尤其由铟和银包围。
在此,通过接合工艺或补充地通过再次加热连接层的随后的回火步骤能够引起所述结构影响。从热学和机械角度来看,铋颗粒、即包含铋或由铋构成的区域在由银和铟的金属间化合物构成的基质中或在具有其中溶解有铟的银颗粒的银-铟合金中是接合区的进而连接层的特别有利的微结构。
根据方法的至少一个实施方式,在连接层的横截面中,横截面的由铋构成的份额最高为50%。在此,横截面例如能够穿过整个连接层从第一接合配对件延伸到第二接合配对件。因此,横截面是贯穿连接层的例如垂直于两个接合配对件的主延伸平面伸展的任意剖面。在所述横截面中,优选平均地,面的最多一半由铋构成,其中其余分配到银和铟和可能的其他存在的金属。优选地,铋的面份额在此最高为30%、特别优选最高为15%。
根据方法的至少一个实施方式,连接层是导电的。也就是说,连接层不仅是两个接合配对件之间的机械连接,而且两个接合配对件也能够通过连接层导电地彼此连接。以这种方式,经由连接层,例如光电子半导体芯片能够在电路板上机械地固定并且电连接。导电的连接尤其能够通过在连接层中的银份额建立,所述银份额将接合配对件经由不通过连续的铋层中断的路径彼此连接。
根据方法的至少一个实施方式,连接层不具有金并且不具有熔剂。在连接层中弃用金得到特别成本适宜的能够在特别低的温度下产生的连接层。通过选择在特别低的温度下已经为液态的金属合金可能的低的接合温度降低在由不同热膨胀特性的材料构成的复合物中的热机械的负荷并且保护对温度变化敏感的材料、例如在塑料压力注塑包封的导体框上的塑料。尤其,通过该方法的可能的是,将两个由不同热膨胀特性的材料构成的接合配对件连接。例如,第一接合配对件能够是至少一个光电子半导体芯片,而第二接合配对件是用塑料包封的金属的导体框。总的来说,第一接合配对件能够包含金属、陶瓷或塑料,而第二接合配对件借助至少一种其他的金属、至少一种其他的陶瓷或至少一种其他的塑料构成,其中第二接合配对件的至少一种金属、至少一种陶瓷或至少一种塑料具有不同于第一接合配对件的金属、陶瓷或塑料的另一热膨胀系数。高熔点的组分的低成本能够实现:将该方法也用于成本关键的产品。
因为能够将所提到的金属非常纯地施加在第一和第二层序列中,能够放弃使用熔剂。由此,连接层不具有熔剂。因此,但是也避免金属聚合物混合物的小的导热性。此外,通过弃用熔剂,避免包括的熔剂残留的腐蚀危险或在随后移除熔剂剩余物和熔剂残留时的问题以及与其相关的成本。
由于铟和银的良好的导热性,连接层还特别好地适合于导出损耗热量。在此证实为有利的是,连接层不具有由铋构成的连续的层,因为所述金属中的铋具有最小的导热性。因此,对于尽可能好的散热,连接层中的银的份额选为尽可能高并且铋的份额选为尽可能低。对于连接层在高于260℃的温度下的尽可能好的耐受性,银的份额也选为尽可能高并且铋的份额选为尽可能低。
根据方法的至少一个实施方式,第一层序列和/或第二层序列包括层或直接彼此邻接的层的序列,其中层或层的序列仅包含铟和铋,其中铟的物质量份额最少为67原子%并且最高为85原子%。最优地,铟的物质量份额为78.5原子%。
随着在由铟和铋构成的层序列的区域中的这种铟份额,在明显低于100℃时已经能够形成所述区域的熔液。因此,在大约73℃的温度下已经形成这种熔液。通过从层序列的周围的层或第一层序列添加银,如果铟-铋熔液例如在第二层序列中产生时,那么熔化温度能够大幅地提高。铋-铟与银的等温凝固反应在100℃时已经引起在银和铟之间形成金属间化合物,所述金属间化合物造成连接层的高的耐温性。对于层序列的由铋和铟构成的份额的尽可能好的熔化特性,在层序列的所述区域中的铋与铟的比值最优大约为0.27。
根据方法的至少一个实施方式,第一层序列和/或第二层序列包括至少一个由铟构成的层和至少一个由铋构成的层,其中由铟构成的层和由铋构成的层直接彼此邻接。也就是说,在此情况下,由铋和铟构成的低熔点的组分不以合金存在,而是低熔点的组分在接合工艺期间由直接彼此邻接的铋层和铟层彼此间的反应产生。
根据方法的至少一个实施方式,第二层序列由用铋-铟合金形成的层构成。因此,在此情况下,低熔点的组分直接构成为合金并且不在单独的彼此分开的铋层和铟层中相叠地沉积。
根据方法的至少一个实施方式,第一层序列和/或第二层序列包括由钛构成的层并且其直接邻接于由铟构成的层或由铋构成的层,其中由钛构成的层设为用于,延迟银与铟和/或铋的混合。例如层序列的包含铟和铋的部分能够通过钛层在熔化期间首先与周围的银保持隔开。当在层序列中达到用于由铟和铋构成的单层反应成低熔点的组分的特定的温度的情况下,由钛构成的层例如撕裂并且允许银进入到具有铟和铋的区域中进而允许等温凝固以形成连接层。
根据方法的至少一个实施方式,第一层序列和/或第二层序列包括由铟构成的层和由铋构成的层的序列,其中序列在其端面上分别由钛构成的层覆盖。也就是说,层序列中的由铟和铋形成的区域能够通过钛层在两端相对于邻接的银得到保护。以这种方式,特别有效地可能的是,长时间推迟银的进入,直至铟和铋层足以混合为低熔点的组分。
根据方法的至少一个实施方式,用在层序列中的至少一半的由钛构成的层或每个由钛构成的层在此具有最高10nm的厚度。也就是说,为了保护由铟和铋构成的层,极其薄的钛层是足够的。
根据方法的至少一个实施方式,层序列中的至少一半的由铟构成的层或每个由铟构成的层比至少一半的由铋构成的层或每个由铋构成的层更厚,其中至少一半的由铟构成的层或每个由铟构成的层具有最少150nm并且最高850nm的厚度,并且至少一半的由铋构成的层或每个由铋构成的层具有最少50nm并且最高300nm的厚度。因此,经由由铟和铋构成的层的层厚度,能够调节铟-铋体系中的铟份额,其中如在上文中描述的那样,力争在67原子%和85原子%之间的最优的铟份额。
根据方法的至少一个实施方式,第一和第二层序列的至少一些层、尤其所有层借助于至少一种下述沉积技术产生:物理气相沉积、如溅镀或蒸镀。借助所述技术,能够将特别薄的层用于制造层序列。通过使用所述沉积技术,能够有效地禁止非稀有元素的氧化并且能够产生由铟和铋构成的特别纯的层。
此外,提出一种接合配对件的装置。在此,所述装置能够借助在此所描述的方法制造。也就是说,所有针对方法描述的特征也针对所述装置公开并且反之亦然。
根据装置的至少一个实施方式,装置包括第一接合配对件和第二接合配对件和直接邻接于第一接合配对件和第二接合配对件的连接层,其中连接层具有包含铋或由铋构成的区域,其中所述区域完全由包含铟和/或银的材料包围。
附图说明
在下文中,根据实施例和相应的附图详细地阐述在此所描述的方法以及在此所描述的装置。
图1、2、3、4、5的示意的剖面图示出在此所描述的方法的实施例。
图6的示意的剖面图示出借助于在此所描述的方法制造的具有连接层的接合配对件的装置。
相同的、同类的或起相同作用的元件在附图中设有相同的附图标记。附图和在附图中示出的元件彼此间的大小关系不视为是合乎比例的。更确切地说,为了更好的可示性和/或为了更好的理解,能够夸大地示出个别元件。
具体实施方式
在图1的示意的剖面图中示出第一接合配对件1,其例如能够是发光二极管芯片。借助于在此描述的方法,将第一接合配对件1与第二接合配对件2连接,其中所述第二接合配对件例如能够是用塑料包封的铜导体框。在第一接合配对件1上施加有第一层序列10,所述第一层序列在此由银层11构成。银层11例如具有1825nm的厚度。
在第二接合配对件2上施加第二层序列20,所述第二层序列在此包括270nm厚的铋层22、730nm厚的铟层23和135nm厚的银层25。将第一层序列10和第二层序列20在其分别背离第一接合配对件1和第二接合配对件2的端面上在压强p下挤压到一起,其中在100℃的接合温度下,在0.5s中,将装置按压到一起。尤其在不具有硫的氛围中,朝向彼此的银层11、25形成足够的保护,以防止将两个层序列彼此连接的接合面的氧化和变色。在接合时间结束之后,由暂时形成的铋-铟熔液形成固态的银-铟和铋。
结合图2描述一个实施例,其中在第一接合配对件1上溅镀有第一层序列10,所述第一层序列具有2560nm厚的银层11、161nm厚的铋层12、804nm厚的铟层13、147nm厚的铋层14和74nm厚的银层15。在第二接合配对件2上施加有具有如下的层的相同顺序的第二层序列20:2560nm厚的银层21、161nm厚的铋层22、804nm厚的铟层23、147nm厚的铋层24和74nm厚的银层25。
在将层序列在端侧聚集到一起之后,将接合配对件1、2在大约5分钟的接合时间中在85℃的接合温度和2.5bar的接合压强下彼此连接。接合配对件1、2例如是陶瓷印刷电路板和金属芯印刷电路板。
结合图3描述一个实施例,其中将由GaAs构成的半导体薄片用作为第一接合配对件1并且将由Si3N4或AlN构成的陶瓷薄片用作为第二接合配对件2。将511nm厚的银层11电化学地沉积到第一接合配对件1上,所述银层形成第一层序列。在第二接合配对件2上的第二层序列20包括428nm厚的铟层23、72nm厚的铋层24和190nm厚的银层25,这些层分别通过蒸镀施加。在115℃的接合温度和10bar的接合压强下,将两个接合配对件1、2挤压到一起120分钟并且以这种方式彼此连接。
结合图4描述一个实施例,其中在第一接合配对件1上作为第一层序列10施加有1775nm厚的银层。将铟-铋层29作为第二层序列20施加到第二接合配对件2上。铟-铋层29由具有33.3质量百分比的铋的铟-铋合金构成,所述铟-铋合金通过溅镀或等离子喷涂施加并且具有755nm的厚度。在接合前,将第一层序列10的和第二层序列20的背离相应的接合配对件的端面湿化学地例如用甲酸的含水的溶液清洁。随后,在15bar的接合压压强和95℃的接合温度下,在30分钟的接合时间中进行连接。
结合图5描述一个实施例,其中在第一接合配对件上作为第一层序列10施加具有最少160nm和最高1500nm、例如1350nm的厚度的银层11。
在第二接合配对件2上,在1000nm厚的银层21之上蒸镀由五对各187nm厚的铟层23和63nm厚的铋层24构成的层堆,所述层堆分离地通过8nm厚的钛层26由260nm厚的银层25覆盖。在此,钛层26防止一方的铋或铟和另一方的银的过早的混合。这种钛层也能够在银层21和由铟和铋构成的层堆之间引入。此外,可能的是,当应该特别长时间地推迟混合时,也将这种钛层引入每对铟和铋层之间。
结合图6示出第一接合配对件1和第二接合配对件2通过连接层30连接成接合配对件的在此描述的装置,所述装置通过在此描述的方法产生。连接层30包括包含铋或由铋构成的区域32。例如,所述区域32是铋颗粒,其中能够溶解少量的银和/或铟。铋区域32从四周由包含银和铟的材料31包围。在此,在示出的横截面中,由铋构成的区域的面积份额优选最高为15%。
本申请要求德国专利申请DE102013103081.5的优先权,其公开内容在此通过参引接合于此。
本发明不局限于根据实施例进行的描述。更确切地说,本发明包括每个新特征以及特征的任意的组合,这尤其是包含在权利要求中的特征的任意的组合,即使所述特征或所述组合自身没有明确地在权利要求中或实施例中说明时也如此。
Claims (19)
1.一种用于连接接合配对件(1,2)的方法,所述方法具有下述步骤:
-提供第一接合配对件(1)和第二接合配对件(2);
-将第一层序列(10)施加到所述第一接合配对件(1)上;
-将第二层序列(20)施加到所述第二接合配对件(2)上;
-在接合温度下,在预设的接合时间中,利用接合压强(p)将所述第一层序列(10)和所述第二层序列(20)在其分别背离所述第一接合配对件(1)和所述第二接合配对件(2)的端面上挤压到一起,其中
-所述第一层序列(10)包括至少一个包含银或由银构成的层(11,15);
-所述第二层序列(20)包括至少一个包含铟和铋的层(29),或者所述第二层序列(20)包括至少一个包含铟的层(23)和包含铋(22,24)的层;
-所述接合温度最高为120℃,并且
-所述第一层序列(10)和所述第二层序列(20)熔化成连接层(30),所述连接层直接邻接于所述第一接合配对件(1)和所述第二接合配对件(2)。
2.根据上一项权利要求所述的方法,
其中所述连接层(30)的熔化温度至少为260℃。
3.根据上述权利要求中任一项所述的方法,
其中所述连接层(30)具有包含铋或由铋构成的区域(32),其中所述区域(32)完全地由包含铟和/或银的材料(31)包围。
4.根据上述权利要求中任一项所述的方法,
其中所述连接层(30)不具有由铋构成的层,或者其中所述连接层(30)不具有简单连贯的由铋构成的层。
5.根据上一项权利要求所述的方法,
其中所述连接层(30)是导电的。
6.根据上一项权利要求所述的方法,
其中所述连接层(30)不具有金或不具有熔剂。
7.根据上一项权利要求所述的方法,
其中在所述连接层(30)的横截面中,所述横截面的由铋构成的份额至多为50%。
8.根据上述权利要求中任一项所述的方法,
其中所述第一层序列(10)和/或所述第二层序列(10)包括层或直接彼此邻接的层的序列,其中所述层或所述层序列仅包含铟或铋,其中铟的物质量份额至少为67原子%并且至多为85原子%。
9.根据上述权利要求中任一项所述的方法,
其中所述第一层序列(10)和/或所述第二层序列(20)包括至少一个由铟构成的层和至少一个由铋构成的层,其中所述由铟构成的层和所述由铋构成的层直接彼此邻接。
10.根据上述权利要求中任一项所述的方法,
其中所述第二层序列(20)由用铋-铟合金形成的层(29)构成。
11.根据上述权利要求中任一项所述的方法,
其中所述第一层序列(10)和/或所述第二层序列(20)包括至少一个层(26),该层由钛构成并且该层直接邻接于由铟构成的层(24)或由铋构成的层(23),其中所述由钛构成的层(26)设为用于:延迟银与铟和/或铋的混合。
12.根据上述权利要求中任一项所述的方法,
其中所述第一层序列(10)和/或所述第二层序列(20)包括由铟构成的层(13,23)和由铋构成的层(12,14,22,24)的序列,其中所述序列在其端面上分别被由钛构成的层覆盖。
13.根据上两项权利要求中任一项所述的方法,
其中每个由钛构成的层(29)具有最大10nm的厚度。
14.根据上述权利要求中任一项所述的方法,
其中至少一半的由铟构成的层或每个由铟构成的层(13,23)比至少一半的由铋构成的层或每个由铋构成的层(12,14,22,24)更厚,其中至少一半的由铟构成的层和每个由铟构成的层(13,23)具有至少150nm并且至多850nm的厚度,并且一半的由铋构成的层或每个由铋构成的层(12,14,22,24)具有至少50nm并且至多300nm的厚度。
15.根据上述权利要求中任一项所述的方法,
其中所述第一层序列的和所述第二层序列的至少一些层借助于下述沉积工艺中的一种沉积工艺产生:物理气相沉积、电镀沉积、无电流沉积。
16.一种接合配对件的装置,所述装置具有:
-第一接合配对件(1)和第二接合配对件(2),和
-连接层(30),所述连接层直接邻接于所述第一接合配对件和所述第二接合配对件,其中
-所述连接层(30)具有包含铋或由铋构成的区域(32),其中所述区域(32)完全地由包含铟和/或银的材料包围。
17.根据上一项权利要求所述的接合配对件的装置,
其中
所述第一接合配对件(1)和所述第二接合配对件(2)由不同热膨胀特性的材料构成。
18.根据上述权利要求中任一项所述的接合配对件的装置,
其中所述连接层(30)不具有由铋构成的层,或者其中所述连接层(30)不具有简单连贯的由铋构成的层。
19.根据上述权利要求中任一项所述的接合配对件的装置,
其中在所述连接层(30)横截面中,所述横截面的由铋构成的份额至多为50%。
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DE102013103081.5A DE102013103081A1 (de) | 2013-03-26 | 2013-03-26 | Verfahren zum Verbinden von Fügepartnern und Anordnung von Fügepartnern |
DE102013103081.5 | 2013-03-26 | ||
PCT/EP2014/055848 WO2014154637A1 (de) | 2013-03-26 | 2014-03-24 | Verfahren zum verbinden von fügepartnern mittels isothermer erstarrungsreaktion zur bildung einer in-bi-ag-verbindungsschicht und entsprechende anordnung von fügepartnern |
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JP (1) | JP6184582B2 (zh) |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108941968A (zh) * | 2017-05-25 | 2018-12-07 | 绿点高新科技股份有限公司 | 焊料合金和焊料 |
CN109153095A (zh) * | 2016-03-31 | 2019-01-04 | 泰克尼控股有限公司 | 用于在二元体系中形成接头的方法及其接头 |
TWI713175B (zh) * | 2019-05-07 | 2020-12-11 | 美商萊特美美國股份有限公司 | 接合半導體裝置和散熱安裝座的銀銦瞬態液相方法及有銀銦瞬態液相接合接頭的半導體結構 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102015114088B4 (de) * | 2015-08-25 | 2022-02-03 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Bauelement und Verfahren zur Herstellung eines Bauelements |
DE102017107961B4 (de) | 2017-04-12 | 2022-10-13 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung einer Beleuchtungseinrichtung und Beleuchtungseinrichtung |
US10700036B2 (en) * | 2018-10-19 | 2020-06-30 | Toyota Motor Engineering & Manufacturing North America, Inc. | Encapsulated stress mitigation layer and power electronic assemblies incorporating the same |
WO2020148626A1 (fr) * | 2019-01-16 | 2020-07-23 | Patek Philippe Sa Geneve | Procédé de brasage de composants horlogers |
US20220304186A1 (en) * | 2021-03-17 | 2022-09-22 | Amulaire Thermal Technology, Inc. | Heat-dissipating substrate with coating structure |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0911111A2 (en) * | 1997-10-22 | 1999-04-28 | Lucent Technologies Inc. | Method and compositions for achieving a kinetically controlled solder bond |
JPH11174993A (ja) * | 1997-12-10 | 1999-07-02 | Nippon Sheet Glass Co Ltd | 透明導電膜付き基板およびそれを用いた平面型表示素子 |
US6193139B1 (en) * | 1996-10-17 | 2001-02-27 | Jorma Kivilahti | Method for joining metals by soldering |
CN1842907A (zh) * | 2003-08-26 | 2006-10-04 | 德山株式会社 | 元件接合用基板、元件接合基板及其制造方法 |
US20060234482A1 (en) * | 2005-03-31 | 2006-10-19 | Osram Opto Semiconductors Gmbh | Semiconductor chip having a soldering layer sequence, and process for soldering a semiconductor chip |
JP2006286958A (ja) * | 2005-03-31 | 2006-10-19 | Toshiba Corp | セラミックス配線基板とそれを用いた半導体装置 |
US20070246829A1 (en) * | 2003-04-11 | 2007-10-25 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for producing the same |
CN101958298A (zh) * | 2009-07-16 | 2011-01-26 | 瑞萨电子株式会社 | 半导体器件及其制造方法 |
CN102037793A (zh) * | 2008-05-21 | 2011-04-27 | At&S奥地利科技及系统技术股份公司 | 用于制造印刷电路板的方法及其应用以及印刷电路板 |
CN102104090A (zh) * | 2009-12-22 | 2011-06-22 | 财团法人工业技术研究院 | 发光二极管芯片固晶方法、固晶的发光二极管及芯片结构 |
CN102569545A (zh) * | 2010-12-23 | 2012-07-11 | 财团法人工业技术研究院 | 发光二极管圆片接合方法、芯片制造方法及圆片接合结构 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA1056514A (en) * | 1975-03-31 | 1979-06-12 | General Electric Company | Lead bond structure |
US4098452A (en) * | 1975-03-31 | 1978-07-04 | General Electric Company | Lead bonding method |
DE68911649T2 (de) * | 1988-10-12 | 1994-06-23 | Ibm | Verbinden von metallischen Oberflächen. |
US6740544B2 (en) * | 2002-05-14 | 2004-05-25 | Freescale Semiconductor, Inc. | Solder compositions for attaching a die to a substrate |
US7168608B2 (en) * | 2002-12-24 | 2007-01-30 | Avago Technologies General Ip (Singapore) Pte. Ltd. | System and method for hermetic seal formation |
EP1615263A4 (en) * | 2003-02-05 | 2006-10-18 | Senju Metal Industry Co | METHOD FOR CONNECTING CONNECTIONS AND METHOD FOR ATTACHING A SEMICONDUCTOR CONSTRUCTION ELEMENT |
TWI401825B (zh) * | 2009-11-27 | 2013-07-11 | Ind Tech Res Inst | 發光二極體晶片的固晶方法及固晶完成之發光二極體 |
KR20140113151A (ko) * | 2013-03-15 | 2014-09-24 | 삼성전자주식회사 | 금속 접합층 형성방법 및 그를 이용한 반도체 발광소자 제조방법 |
US9272371B2 (en) * | 2013-05-30 | 2016-03-01 | Agc Automotive Americas R&D, Inc. | Solder joint for an electrical conductor and a window pane including same |
-
2013
- 2013-03-26 DE DE102013103081.5A patent/DE102013103081A1/de not_active Withdrawn
-
2014
- 2014-03-24 JP JP2016504616A patent/JP6184582B2/ja active Active
- 2014-03-24 CN CN201480018514.8A patent/CN105103287B/zh active Active
- 2014-03-24 DE DE112014001708.6T patent/DE112014001708A5/de active Pending
- 2014-03-24 KR KR1020157030358A patent/KR102172348B1/ko active IP Right Grant
- 2014-03-24 WO PCT/EP2014/055848 patent/WO2014154637A1/de active Application Filing
- 2014-03-24 US US14/773,970 patent/US9502376B2/en active Active
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6193139B1 (en) * | 1996-10-17 | 2001-02-27 | Jorma Kivilahti | Method for joining metals by soldering |
EP0911111A2 (en) * | 1997-10-22 | 1999-04-28 | Lucent Technologies Inc. | Method and compositions for achieving a kinetically controlled solder bond |
JPH11174993A (ja) * | 1997-12-10 | 1999-07-02 | Nippon Sheet Glass Co Ltd | 透明導電膜付き基板およびそれを用いた平面型表示素子 |
US20070246829A1 (en) * | 2003-04-11 | 2007-10-25 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for producing the same |
CN1842907A (zh) * | 2003-08-26 | 2006-10-04 | 德山株式会社 | 元件接合用基板、元件接合基板及其制造方法 |
US20060234482A1 (en) * | 2005-03-31 | 2006-10-19 | Osram Opto Semiconductors Gmbh | Semiconductor chip having a soldering layer sequence, and process for soldering a semiconductor chip |
JP2006286958A (ja) * | 2005-03-31 | 2006-10-19 | Toshiba Corp | セラミックス配線基板とそれを用いた半導体装置 |
CN102037793A (zh) * | 2008-05-21 | 2011-04-27 | At&S奥地利科技及系统技术股份公司 | 用于制造印刷电路板的方法及其应用以及印刷电路板 |
CN101958298A (zh) * | 2009-07-16 | 2011-01-26 | 瑞萨电子株式会社 | 半导体器件及其制造方法 |
CN102104090A (zh) * | 2009-12-22 | 2011-06-22 | 财团法人工业技术研究院 | 发光二极管芯片固晶方法、固晶的发光二极管及芯片结构 |
CN102569545A (zh) * | 2010-12-23 | 2012-07-11 | 财团法人工业技术研究院 | 发光二极管圆片接合方法、芯片制造方法及圆片接合结构 |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109153095A (zh) * | 2016-03-31 | 2019-01-04 | 泰克尼控股有限公司 | 用于在二元体系中形成接头的方法及其接头 |
US11141810B2 (en) | 2016-03-31 | 2021-10-12 | Techni Holding As | Non-eutectic bonding |
CN108941968A (zh) * | 2017-05-25 | 2018-12-07 | 绿点高新科技股份有限公司 | 焊料合金和焊料 |
TWI713175B (zh) * | 2019-05-07 | 2020-12-11 | 美商萊特美美國股份有限公司 | 接合半導體裝置和散熱安裝座的銀銦瞬態液相方法及有銀銦瞬態液相接合接頭的半導體結構 |
US11373925B2 (en) | 2019-05-07 | 2022-06-28 | Light-Med (Usa), Inc. | Silver-indium transient liquid phase method of bonding semiconductor device and heat-spreading mount and semiconductor structure having silver-indium transient liquid phase bonding joint |
US11894284B2 (en) | 2019-05-07 | 2024-02-06 | Lmdj Management Llc | Semiconductor structure having silver-indium transient liquid phase bonding joint |
Also Published As
Publication number | Publication date |
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JP2016515763A (ja) | 2016-05-30 |
DE102013103081A1 (de) | 2014-10-02 |
DE112014001708A5 (de) | 2015-12-24 |
KR102172348B1 (ko) | 2020-10-30 |
KR20150135419A (ko) | 2015-12-02 |
CN105103287B (zh) | 2018-03-23 |
US20160027759A1 (en) | 2016-01-28 |
JP6184582B2 (ja) | 2017-08-23 |
WO2014154637A1 (de) | 2014-10-02 |
US9502376B2 (en) | 2016-11-22 |
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