CN105049676B - A kind of image procossing for medical endoscope strengthens and video recorder circuitry - Google Patents
A kind of image procossing for medical endoscope strengthens and video recorder circuitry Download PDFInfo
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Abstract
The present invention relates to a kind of image procossing for medical endoscope strengthen and video recorder circuitry, including picture processing chip, signal conversion chip, image enhaucament chip and video record chip；Described signal conversion chip includes the first signal conversion chip and secondary signal conversion chip；Described first signal conversion chip is for being converted to lvds signal by bt1120 signal；Described secondary signal conversion chip is for being converted to bt1120 signal by lvds signal；Picture signal after described picture processing chip will process sends to the first signal conversion chip, and is sent to secondary signal conversion chip by this first signal conversion chip；Described secondary signal conversion chip sends to image enhaucament chip after being changed by signal；The video image of reception is carried out enhancing process by described image enhaucament chip, and sends to video record chip, this video record chip record.
Description
Technical field
The present invention relates to a kind of image processing circuit, a kind of image procossing for medical endoscope strengthens and video record
Circuit.
Background technology
Endoscope is a kind of conventional medicine equipment, is made up of bendable portion, light source and one group of camera lens.Natural hole through human body
Road, or the little otch that does of underwent operative enters in human body, endoscope imports during use the organ of preliminary examination, can directly spy on
Change about position.
When endoscope is at inside of human body, carry out video acquisition by the camera lens part of this endoscope, and the video after gathering passes
Transport to main frame backstage and carry out image procossing, and play in real time.Then, owing to doctor is in surgical procedure, it may be necessary to right
Some picture or video repeat viewing.
Wherein, the quality of picture quality directly affects the using effect of endoscope.The existing fujinon electronic video endoscope that generally uses is carried out
Observe, and the image after observing sends to the processing system of external connection and carries out image procossing.But, owing to entering in human body
During row IMAQ, can due to a variety of causes of inside of human body, and cause occurring noise jamming, brightness cannot be automatically adjusted or by
Cause in the color of light image that aberration occurs, so cause in the image procossing in later stage, it is difficult to reduce real image,
Doctor is made to be difficult to recognize when observing.It is thus desirable to provide one to be specifically designed to enhancing picture quality, and record endoscope collection
The circuit of video.
Summary of the invention
The invention reside in the shortcoming overcoming prior art with not enough, it is provided that a kind of image procossing for medical endoscope strengthens and record
Circuit processed.
The present invention is achieved through the following technical solutions: a kind of image procossing for medical endoscope strengthens and video recorder circuitry,
Including picture processing chip, signal conversion chip, image enhaucament chip and video record chip；Described signal conversion chip includes
First signal conversion chip and secondary signal conversion chip；Described first signal conversion chip is for being converted to bt1120 signal
Lvds signal；Described secondary signal conversion chip is for being converted to bt1120 signal by lvds signal；Described picture processing chip will
Picture signal after process sends to the first signal conversion chip, and is sent to secondary signal conversion by this first signal conversion chip
Chip；Described secondary signal conversion chip sends to image enhaucament chip after being changed by signal；Described image enhaucament chip will receive
Video image carry out enhancing process, and send to video record chip, this video record chip record.
Compared to prior art, the image gathered, by increasing by a picture processing chip in camera lens part, is processed by the present invention,
Main frame backstage increases an image enhaucament chip, carries out level image enhancing, make the image finally exported become apparent from, finally
Retransmit to record module carry out video record.
First, picture processing chip is divided into multiple functional module, distinguishes and by each functional module independence co-ordination,
It is capable of low-power consumption, low-light (level), and can be the picture more high definition of output.Meanwhile, further at this image processor
In a white balance permanent circuit is set, for being fixed by this white balance parameter, it is not necessary to operationally carry out the regulation of white balance,
Thus prevent the phenomenon of aberration interference.
Then, image enhaucament chip is also divided into multiple functional module, distinguishes and by each functional module independence co-ordination,
It is capable of the enhancing to image to process.Meanwhile, an image border intensifier circuit is set further in this image intensifier, uses
To strengthen the definition of image border.
It addition, in order to improve signal transmission stability, the present invention by first bt1120 signal being converted to lvds signal, thus
Stable transmission, and there is low noise ability.Then, it is being bt1120 signal by lvds signals revivification, thus ensure that follow-up
The quality of the picture play.
As a further improvement on the present invention, described picture processing chip includes: at data sink, master controller, image
Reason device, data logger；
Described data sink, it is for receiving the view data of outside；
Described master controller, it is for receiving the triggering signal of outside, and controls described data sink, image accordingly
Processor and the duty of data logger；
Described image processor, it is for processing image；Described image processor includes a white balance permanent circuit,
It is for according to the parameter preset, carrying out the fixed adjustment of white balance；
Described data logger, its view data after processing exports；
Described first signal conversion chip includes: controller, data reader, signal format converter, serializer, data are defeated
Go out device；
Described controller, its for receive outside triggering signal, and control data reader, signal format converter,
Serializer and the work of data logger；
Described data reader, it transmits signal for the bt1120 receiving outside, and sends to signal format converter；
Described signal format converter, it for being converted to the vision signal of lvds by bt1120 vision signal, and sends extremely
Serializer；
Described serializer, it is used for converting parallel data into serial data, and sends to data logger；
Described data logger, for exporting lvds signal data to secondary signal conversion chip；
Described secondary signal conversion chip includes: controller, data reader, signal format converter, deserializer, number
According to follower；
Described controller, its for receive outside triggering signal, and control data reader, signal format converter,
Deserializer and the work of data logger；
Described data reader, it is for the lvds video transfer signal of the first signal conversion chip, and sends to signal lattice
Formula converter；
Described signal format converter, it for being converted to the vision signal of bt1120 by lvds vision signal, and sends extremely
Deserializer；
Described deserializer, it is used for converting serial data into parallel data, and sends to data logger；
Described data logger, for exporting bt1120 video signal data；
Described image enhaucament chip includes: data sink, controller, static memory, image intensifier, data are defeated
Go out device and clock generator；
Described data sink, it is used for receiving viewdata signal, and sends to this image intensifier；
Described controller, it is used for receiving outer triggering signal, and controls data sink, its sum of image enhaucament accordingly
Duty according to follower；
Described static memory, it is for storing the driving data of image intensifier, to drive the work of this image intensifier；
Described image intensifier, it includes an image border intensifier circuit；Described image border intensifier circuit is used for strengthening figure
Definition as edge；
Described data logger, it is for receiving the view data after image intensifier processes, and carries out data output；
Described clock generator, it is for producing clock signal for image enhaucament chip；
Described video record chip includes: data sink, video encoder, Video Decoder, data logger and place
Reason device；
Described data sink, for receiving the vision signal of outside, and sends to video encoder；
Described video encoder, for recording encoding video signal；
Described Video Decoder, for playing back decoding video signal；
Described data logger, for exporting vision signal；
Described processor, for controlling the work of data sink, video encoder, Video Decoder and data logger.
As a further improvement on the present invention, described picture processing chip also includes a frequency multiplier, and it is for touching of being inputted outside
The frequency signaled carries out doubling process, retransmits to master controller；
Described first signal conversion chip also includes a phase-locked loop, being connected with signal format converter and serializer respectively, being used for
Unified integration clock signal；
Described secondary signal conversion chip also includes a phase-locked loop, being connected with signal format converter and serializer respectively, being used for
Unified integration clock signal；
Described image enhaucament chip also includes a de-noising processor；The viewdata signal that described data sink receives, sends
Carry out noise reduction process to de-noising processor, then be forwarded to image intensifier；
Described video record chip also includes an image processor, processes for the video being received data sink, and
Image after processing sends to video encoder.
As a further improvement on the present invention, described image processor also includes an exposure gain circuit, is used for increasing exposure gain
Size；
Described first signal conversion chip also includes a clock data restorer, and it is connected with data reader, for from transmission letter
The distortion in road and noise recover data；
Described secondary signal conversion chip also includes a clock data restorer, and it is connected with data reader, for from transmission letter
The distortion in road and noise recover data；
Described image enhaucament chip also includes a dynamic memory；Described de-noising processor process after view data, first send to
Dynamic memory stores, then is forwarded to image intensifier；
The image processor of described video record chip includes edge intensifier circuit and the interference circuit that abates the noise.
As a further improvement on the present invention, described image processor also includes an optical detection circuit and flash detection circuit, its
For brightness and the flashing state of detection image, and result of detection is sent to exposure gain circuit；
Described image enhaucament chip also includes a pixel self adaptation proofreading equipment；Described image intensifier first will process after view data
Send to described pixel self adaptation proofreading equipment, this pixel self adaptation proofreading equipment carry out pixel and adapt to check and correction, retransmit to data defeated
Go out device.
As a further improvement on the present invention, described image enhaucament chip also includes a vision signal multiplier and a storage signal times
Increase device；Described clock generator, is respectively sent to vision signal multiplier and storage signal multiplier by the clock signal of generation,
And by this vision signal multiplier, clock signal is sent to data sink, this storage signal multiplier clock signal is sent
To dynamic memory and static memory.
As a further improvement on the present invention, be provided with outside described picture processing chip: for receive supply voltage power port,
For receiving the receiver port of picture signal, for exporting the video signal port of vision signal, for exporting row field signal
Row field signal port, for receive external timing signal clock signal port, for receive storage data data receiver
Mouth and one is for receiving the PORT COM of external communication order；
It is provided with outside described first signal conversion chip: described center processing chip exterior is provided with: for receiving the electricity of supply voltage
Source port, for receiving the receiver port of bt1120 vision signal, for exporting the video signal port of lvds vision signal
With the row field signal port for exporting row field signal；
It is provided with outside described secondary signal conversion chip: described center processing chip exterior is provided with: be used for receiving supply voltage
Power port, for receiving the receiver port of lvds vision signal and for exporting the vision signal of bt1120 vision signal
Port；
Described image enhaucament chip exterior is provided with: for receiving the power port of supply voltage, for receiving the signal of picture signal
Receiving port, for exporting the video signal port of vision signal, for exporting the row field signal port of row field signal, being used for connecing
Receive the clock signal port of external timing signal and for receiving the data receiver port of storage data；
Described video record chip exterior is provided with: power port, video input port, video-out port and PORT COM；Institute
State video input port to be connected with the data sink of this video record chip internal, for receiving the video data of outside；Described
Video-out port, is connected with described data logger, is used for exporting video data；Described PORT COM, with described processor
Connect, for receiving the serial port command of outside.
As a further improvement on the present invention, the power port of described picture processing chip is circumscribed with one for the filter circuit of voltage stabilizing；
Described filter circuit includes an inductance and at least one electric capacity；Described inductance one end is connected with external power source, the other end respectively with
Each electric capacity connects, the other end of described each electric capacity and ground connection；Power port is accessed in one end that described inductance is connected with electric capacity；
The power port of described picture processing chip is circumscribed with one for the filter circuit of voltage stabilizing；Described filter circuit includes an electricity
Sense and at least one electric capacity；Described inductance one end is connected with external power source, and the other end is connected with each electric capacity respectively, described each
The other end of electric capacity and ground connection；Power port is accessed in one end that described inductance is connected with electric capacity；
The power port of described video record chip is circumscribed with a filter circuit；Described filter circuit include a magnetic bead and at least one
Electric capacity；Described magnetic bead is connected with one end of electric capacity, and the other end ground connection of this electric capacity；Described power port is connected to magnetic bead and electricity
Between appearance.
As a further improvement on the present invention, the external clock circuit of clock signal port of described picture processing chip, it includes
One clock shakes chip；The shake power end of chip of described clock is connected with power supply by a filter circuit, and the shake output of chip of this clock passes through
One debugging circuit is connected with described clock signal port；Described filter circuit includes being made up of an inductance and capacitances in series, described electricity
One end of sense is connected with power supply, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity；Described clock shakes the power end of chip
Be connected between inductance and electric capacity；Described debugging electricity routing resistance and electric capacity composition；One end of the resistance of this debugging circuit and clock
The output shaken connects, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity；Described clock signal port is connected to this
Between resistance and electric capacity；
The external clock circuit of clock signal port of described image enhaucament chip, it includes that a clock shakes chip；Described clock shakes chip
Power end be connected with power supply by a filter circuit, the shake output of chip of this clock is connected with described clock signal port；Described
Filter circuit includes being made up of an inductance and capacitances in series, and one end of described inductance is connected with power supply, and the other end is connected with electric capacity,
And the other end ground connection of this electric capacity.
As a further improvement on the present invention, the data receiver port of described picture processing chip is circumscribed with a memory circuitry, its
Including a memory, the filter circuit of the voltage port being connected to this memory, and be connected to the output port of this memory
Resistance.
In order to be more fully understood that and implement, describe the present invention below in conjunction with the accompanying drawings in detail.
Accompanying drawing explanation
Fig. 1 is the chip connection diagram of the present invention.
Fig. 2 is the internal module connection diagram of picture processing chip.
Fig. 3 is the circuit module schematic diagram of the image processor of picture processing chip.
Fig. 4 is the voltage segment circuit diagram of picture processing chip.
Fig. 5 is the outside port circuit diagram of picture processing chip.
Fig. 6 is the circuit diagram of the filter circuit of the 3.3V voltage of picture processing chip.
Fig. 7 is the circuit diagram of the filter circuit of the 1.8V voltage of picture processing chip.
Fig. 8 is the circuit diagram of the filter circuit of the 1.2V voltage of picture processing chip.
Fig. 9 is the partial enlarged drawing of the receiver port of picture processing chip.
Figure 10 is the partial enlarged drawing of the video signal port of picture processing chip.
Figure 11 is the partial enlarged drawing of the row field signal port of picture processing chip.
Figure 12 is the schematic diagram of the clock circuit of picture processing chip.
Figure 13 is the schematic diagram of the storage circuit of picture processing chip.
Figure 14 is the partial enlarged drawing of the PORT COM of picture processing chip.
Figure 15 is the internal components connection diagram of the first signal conversion chip.
Figure 16 is the internal module connection diagram of secondary signal conversion chip.
Figure 17 is the outside port connection diagram of the first signal conversion chip.
Figure 18 is the close-up schematic view of the power port of the first signal conversion chip.
Figure 19 is the partial enlarged drawing of the receiver port of the first signal conversion chip.
Figure 20 is the partial enlarged drawing of the video signal port of the first signal conversion chip.
Figure 21 is the partial enlarged drawing of the row field signal port of the first signal conversion chip.
Figure 22 is the external connection circuit diagram of secondary signal conversion chip.
Figure 23 is the partial enlarged drawing of the receiver port of secondary signal conversion chip.
Figure 24 is the partial enlarged drawing of the video signal port of secondary signal conversion chip.
Figure 25 is the partial enlarged drawing of the row field signal port of secondary signal conversion chip.
Figure 26 is the internal module connection diagram of image enhaucament chip.
Figure 27 is the Part I external connection circuit diagram of image enhaucament chip.
Figure 28 is the Part II external connection circuit diagram of image enhaucament chip.
Figure 29 is the circuit diagram of the filter circuit of pressure-stabilizing of the 3.3V voltage of image enhaucament chip.
Figure 30 is the power-switching circuit figure that the 3.3V of image enhaucament chip is converted to 1.8V.
Figure 31 is the power-switching circuit figure that the 3.3V of image enhaucament chip is converted to 1.2V.
Figure 32 is the partial enlarged drawing of the receiver port of image enhaucament chip.
Figure 33 a is the partial enlarged drawing of the video signal port Part I of image enhaucament chip.
Figure 33 b is the partial enlarged drawing of the video signal port Part II of image enhaucament chip.
Figure 34 is the circuit diagram of the clock circuit of image enhaucament chip.
Figure 35 is the partial enlarged drawing of the row field signal port of image enhaucament chip.
Figure 36 is the internal components connection diagram of video record chip.
Figure 37 is the video input circuit figure of video record chip.
Figure 38 is the video output circuit figure of video record chip.
Figure 39 is video record chip and communication input circuit figure.
Figure 40 is the partial enlarged drawing of the power port of video record chip.
Figure 41 is the partial enlarged drawing of the PORT COM of video record chip.
Detailed description of the invention
Referring to Fig. 1, it is the chip connection diagram of the present invention.The invention provides a kind of image for medical endoscope
Process and strengthen and video recorder circuitry, including picture processing chip 10, signal conversion chip 20 and image enhaucament chip 30；Institute
State signal conversion chip 20 and include the first signal conversion chip 21 and secondary signal conversion chip 22；Described first signal conversion core
Sheet 21 is for being converted to lvds signal by bt1120 signal；Described secondary signal conversion chip 22 is for being converted to lvds signal
Bt1120 signal；Picture signal after described picture processing chip 10 will process sends to the first signal conversion chip 21, and by
This first signal conversion chip 21 sends to secondary signal conversion chip 22；Signal is changed by described secondary signal conversion chip 22
Rear transmission is to image enhaucament chip 30.
Referring to Fig. 2, it is the internal module connection diagram of picture processing chip.Described picture processing chip includes: data
Receiver 11, master controller 12, image processor 13, data logger 14.
Described data sink 11, it is for receiving the view data of outside；
Described master controller 12, it is for receiving the triggering signal of outside, and controls accordingly at described data sink, image
Reason device and the duty of data logger；
Described image processor 13, it is for processing image.
Described data logger 14, its view data after processing exports.
Further, described picture processing chip also includes a frequency multiplier 15, and it enters for the frequency triggering signal inputted outside
Row doubles process, retransmits to master controller 12.
Referring to Fig. 3, it is the circuit module schematic diagram of image processor of picture processing chip.Concrete, at described image
Reason device 13 includes a Lens Shading Compensation circuit 131, optical detection circuit 132, flash detection circuit 133, exposure gain electricity
Road 134 and white balance permanent circuit 135.
Described Lens Shading Compensation circuit 131, it is for compensating process by the shade that camera lens produces.
Described optical detection circuit 132 and flash detection circuit 133, its brightness being used for detection image and flashing state, and will
Result of detection sends to exposure gain circuit.
Described exposure gain circuit 134, is used for increasing exposure gain size.
Described white balance permanent circuit 135, it is for according to the parameter preset, carrying out the fixed adjustment of white balance.
Please refer to Fig. 4 and Fig. 5, its voltage segment being respectively picture processing chip and other outside port circuit diagrams.Separately
Outward, for the application in order to adapt to this picture processing chip, it is provided with outside described picture processing chip further: be used for receiving
The power port 101 of supply voltage, for receiving the receiver port 102 of picture signal, for exporting the video of vision signal
Signal port 103, for exporting the row field signal port 104 of row field signal, for receiving the clock signal terminal of external timing signal
Mouthfuls 105, for receiving the data receiver port 106 and of storage data for receiving the PORT COM 107 of external communication order.
Referring to Fig. 6-8, it is respectively the circuit diagram of 3.3V, 1.8V and 1.2V of picture processing chip.Further, described electricity
Source port 101 is circumscribed with one for the filter circuit of voltage stabilizing；Described filter circuit includes an inductance and at least one electric capacity；Institute
Stating inductance one end to be connected with external power source, the other end is connected with each electric capacity respectively, the other end of described each electric capacity and ground connection；
Power port is accessed in one end that described inductance is connected with electric capacity.Concrete, the external voltage of described picture processing chip includes: 3.3V,
1.8V and 1.2V tri-kinds.Wherein, 3.3V voltage accesses circuit and includes 2 electric capacity, and 1.8V voltage accesses circuit and includes 5 electricity
Holding, the voltage of 1.2V accesses circuit and includes 6 electric capacity, to filter the interference signal of different frequency respectively.
Referring to Fig. 9, it is the partial enlarged drawing of receiver port of picture processing chip.Described receiver port 102
Including 8 pins, for receiving the video signal of outside.
Referring to Figure 10, it is the partial enlarged drawing of video signal port of picture processing chip.Described video signal port 103
Including the vision signal of two groups of different-formats, carry out doubleway output, play the most in real time to facilitate and record.
Referring to Figure 11, it is the partial enlarged drawing of row field signal port of picture processing chip.Described row field signal port 104
For controlling frequency and the order of video frequency output.Such as: vision signal display frequency on screen and DISPLAY ORDER can be controlled,
Can be often row output under upper, it is also possible to be to export from left to right.
Referring to Figure 12, it is the schematic diagram of clock circuit of picture processing chip.Described clock signal port 105 external a period of time
Clock circuit, it includes that a clock shakes chip；The shake power end of chip of described clock is connected with power supply by a filter circuit, this Zhong Zhenxin
The output of sheet is connected with described clock signal port by a debugging circuit；Described filter circuit includes by an inductance and electric capacity string
Joint group becomes, and one end of described inductance is connected with power supply, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity；Described clock
Shake chip power end be connected between inductance and electric capacity；Described debugging electricity routing resistance and electric capacity composition；This debugging circuit
One end of resistance is connected with the output of Zhong Zhen, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity；Described clock is believed
Number port is connected between this resistance and electric capacity.
Referring to Figure 13, it is the schematic diagram storing circuit of picture processing chip.Further, described data receiver port 106
Being circumscribed with a memory circuitry, it includes a memory, is connected to the filter circuit of the voltage port of this memory, and connects
Resistance at the output port of this memory.
Referring to Figure 14, it is the partial enlarged drawing of PORT COM of picture processing chip.Described PORT COM 107 is used for receiving
The trigger command of external transmission, to trigger being operated of this picture processing chip.
Referring to Figure 15, it is the internal components connection diagram of the first signal conversion chip.Described first signal conversion chip 21
Including: controller 211, data reader 212, signal format converter 213, serializer 214, data logger 215,
Phase-locked loop 216 and clock data restorer 217；
Described controller 211, it is for receiving the triggering signal of outside, and controls data reader 212, signal format converter
213, serializer 214 and the work of data logger 215；
Described data reader 212, it transmits signal for the bt1120 receiving outside, and sends to signal format converter；
Described signal format converter 213, it for being converted to the vision signal of lvds by bt1120 vision signal, and sends extremely
Serializer；
Described serializer 214, it is used for converting parallel data into serial data, and sends to data logger；
Described data logger 215, for exporting lvds signal data to secondary signal conversion chip.
Described phase-locked loop 216, is connected with signal format converter and serializer respectively, for unified integration clock signal.
Described clock data restorer 217, it is connected with data reader, for recovering from the distortion and noise of transmission channel
Data.
Referring to Figure 16, it is the internal module connection diagram of secondary signal conversion chip.Described secondary signal conversion chip 22
Including: controller 221, data reader 222, signal format converter 223, deserializer 224, data logger 225,
Phase-locked loop 226 and clock data restorer 227；
Described controller 221, it is for receiving the triggering signal of outside, and controls data reader 222, signal format converter
223, deserializer 224 and the work of data logger 225；
Described data reader 222, it is for the lvds video transfer signal of the first signal conversion chip, and sends to signal lattice
Formula converter；
Described signal format converter 223, it for being converted to the vision signal of bt1120 by lvds vision signal, and sends extremely
Deserializer 224；
Described deserializer 224, it is used for converting serial data into parallel data, and sends to data logger；
Described data logger 225, for exporting bt1120 video signal data.
Described phase-locked loop 226, is connected with signal format converter and deserializer respectively, for unified integration clock signal.
Described clock data restorer 227, it is connected with data reader 222, for from the distortion and noise of transmission channel
Recover data.
Referring to Figure 17, it is the outside port connection diagram of the first signal conversion chip.Outside described first signal conversion chip
Portion is provided with: described center processing chip exterior is provided with: for receiving the power port 2101 of supply voltage, for receiving bt1120
The receiver port 2102 of vision signal, for exporting the video signal port 2103 of lvds vision signal and for exporting row
The row field signal port 2104 of field signal.
Please refer to Figure 18, it is the close-up schematic view of power port of the first signal conversion chip.Described power port
The electric capacity for filtering alternating current it is circumscribed with at 2101.
Referring to Figure 19, it is the partial enlarged drawing of receiver port of the first signal conversion chip.Described receiver port
2102, it is connected with described data reader 21；Concrete, this receiver port includes 20 pins, is used for receiving
The vision signal of outside bt1120.
Referring to Figure 20, it is the partial enlarged drawing of video signal port of the first signal conversion chip.Described video signal port
2103 include 4 output pins, are used for exporting lvds vision signal, and this video signal port is connected with this data logger.
Referring to Figure 21, it is the partial enlarged drawing of row field signal port of the first signal conversion chip.Described row field signal port
2104 include a line signal output pin and a field signal output pin；Described row field signal port 2104 is used for controlling video
The frequency of output and order.Such as: vision signal display frequency on screen and DISPLAY ORDER can be controlled, can be from upper
Under often row output, it is also possible to be to export from left to right.
Referring to Figure 22, it is the external connection circuit diagram of secondary signal conversion chip.Outside described secondary signal conversion chip
Portion is provided with: for receiving the receiver port 2201 of lvds vision signal, for exporting the video letter of bt1120 vision signal
Number port 2202 and row field signal port 2203.
Referring to Figure 23, it is the partial enlarged drawing of receiver port of secondary signal conversion chip.Described receiver port
2201, it is connected with described data reader 221；Concrete, this receiver port includes 4 pins, is used for receiving
The lvds vision signal of the first signal conversion chip output.
Referring to Figure 24, it is the partial enlarged drawing of video signal port of secondary signal conversion chip.Described video signal port
2202 include 20 output pins, are used for exporting bt1120 vision signal, and this video signal port and this data logger
Connect.
Referring to Figure 25, it is the partial enlarged drawing of row field signal port of secondary signal conversion chip.Described row field signal port
2203 include a line signal output pin and a field signal output pin；Described row field signal port 2104 is used for controlling video
The frequency of output and order.Such as: vision signal display frequency on screen and DISPLAY ORDER can be controlled, can be from upper
Under often row output, it is also possible to be to export from left to right.
Referring to Figure 26, it is the internal module connection diagram of image enhaucament chip.Described image enhaucament chip includes: data
Receiver 31, de-noising processor 32, dynamic memory 33, image intensifier 34, pixel self adaptation proofreading equipment 35, data are defeated
Go out device 36, static memory 37, controller 38, vision signal multiplier 39, storage signal multiplier 310, clock generation
Device 311.
Described data sink 31, it is used for receiving viewdata signal, and sends to de-noising processor 32；
The viewdata signal that described data sink 31 receives, transmission to de-noising processor 32 carries out noise reduction process, then turns
Send to dynamic memory 33.
Described dynamic memory 33 is after receiving the view data after de-noising processor 22 processes, then is forwarded to image intensifier
34。
Described image intensifier 34, it includes an image border intensifier circuit；Described image border intensifier circuit is used for strengthening image
The definition at edge.Further, the view data after described image intensifier first will process sends to the check and correction of described pixel self adaptation
Device 35, is carried out pixel by this pixel self adaptation proofreading equipment 35 and adapts to check and correction, retransmit to data logger 36.
Described data logger 36, it is for receiving the view data after image intensifier processes, and carries out data output；
Described static memory 37, it is for storing the driving data of image intensifier, to drive the work of this image intensifier；
Described controller 38, it is used for receiving outer triggering signal, and controls data sink, image enhaucament itself and data accordingly
The duty of follower；
Described clock generator 311, it is for producing clock signal for image enhaucament chip.Further, described clock generator,
The clock signal of generation is respectively sent to vision signal multiplier 29 and storage signal multiplier 310, and by this vision signal times
Increase device 39 to send clock signal to data sink, this storage signal multiplier 310 clock signal is sent to dynamic memory
Device and static memory.
Please refer to Figure 27 and Figure 28, it is respectively the external connection circuit diagram of image enhaucament chip.
Further, described image enhaucament chip exterior is provided with: for receiving the power port of supply voltage, for receiving image letter
Number receiver port 301, for export vision signal video signal port 302, for receive external timing signal time
Clock signal port 303, for exporting the row field signal port 304 of row field signal.
Concrete, in the present embodiment, the external voltage of described power port comprises tri-kinds of voltages of 3.3V, 1.8V and 1.2V.
Referring to Figure 29, it is the circuit diagram of filter circuit of pressure-stabilizing of 3.3V voltage.Described filter circuit includes an inductance and at least
One electric capacity；Described inductance one end is connected with external power source, and the other end is connected with each electric capacity respectively, described each electric capacity another
One end and ground connection；Power port is accessed in one end that described inductance is connected with electric capacity.
Referring to Figure 30-31, it is respectively 3.3V and is converted to the power-switching circuit figure of 1.8V and 3.3V is converted to turning of 1.2V
Change circuit diagram.In the present embodiment, by a power-switching circuit, the voltage of 3.3V is respectively converted into 1.8V's and 1.2V
Voltage.Concrete, described power-switching circuit includes a power conversion chip；The input of described power conversion chip accesses 3.3V
Voltage, output exports the voltage of 1.8V and 1.2V respectively, to be powered image enhaucament chip.
Referring to Figure 32, it is the partial enlarged drawing of receiver port of image enhaucament chip.Described receiver port 301
Including 20 signal pins, it is connected with internal data sink 31, for receiving the picture signal of input.
Refer to Figure 33 a and 33b, its Part I of video signal port being respectively image enhaucament chip and Part II
Partial enlarged drawing.Described video signal port 302 includes 20 signal pins, and it is connected with internal data logger 36,
For output image signal.
Referring to Figure 34, it is the circuit diagram of clock circuit of image enhaucament chip.Further, described clock signal port 303
An external clock circuit, it includes that a clock shakes chip；The shake power end of chip of described clock is connected with power supply by a filter circuit,
The shake output of chip of this clock is connected with described clock signal port；Described filter circuit includes being made up of an inductance and capacitances in series,
One end of described inductance is connected with power supply, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity.
Referring to Figure 35, it is the partial enlarged drawing of row field signal port of image enhaucament chip.Described row field signal port 304
Including a row signal pins and a field signal pin.Described row field signal port 304 for control video frequency output frequency and
Sequentially.Such as: vision signal display frequency on screen and DISPLAY ORDER can be controlled, can be often row output under upper,
Can also be to export from left to right.
Referring to Figure 36, it is the internal components connection diagram of video record chip.Described video record chip includes: data
Receiver 41, image processor 42, video encoder 43, Video Decoder 44, data logger 45 and processor 46；
Described data sink 41, for receiving the vision signal of outside, and sends to image processor；
Described image processor 42, the video sent for receiving data sink carries out, and processes video image, then
Send to video encoder；Wherein, described image processor includes the edge intensifier circuit of the definition for strengthening image border
With the interference circuit that abates the noise for eliminating signal disturbing.
Described video encoder 43, for recording encoding video signal；
Described Video Decoder 44, for playing back decoding video signal；
Described data logger 45, for exporting vision signal；
Described processor 46, is used for controlling data sink 41, image processor 42, video encoder 43, Video Decoder
44 and the work of data logger 45.
Referring to Figure 37-39, it is the video input of video record chip, video frequency output and communication input circuit figure.Further,
Described video record chip exterior is provided with: power port 401, video input port 402, video-out port 403 and communication terminal
Mouth 404.Described video input port is connected with the data sink of this video record chip internal, for receiving the video of outside
Data；Described video-out port, is connected with described data logger, is used for exporting video data；Described PORT COM, with
Described processor connects, for receiving the serial port command of outside.
Referring to Figure 40, it is the partial enlarged drawing of power port of video record chip.Described power port 401 is circumscribed with one
Filter circuit；Described filter circuit includes a magnetic bead and at least one electric capacity；Described magnetic bead is connected with one end of electric capacity, and this electricity
The other end ground connection held；Described power port is connected between magnetic bead and electric capacity.
Referring to Figure 41, it is the partial enlarged drawing of PORT COM of video record chip.Described PORT COM 404 includes two
Individual pin, carries out communication as serial ports and external command.By the way of serial communication, the data wire of use is few, can save
Communications cost.
Hereinafter the course of work of the image processing circuit of the present invention is described:
S1: will be to this picture processing chip, the first signal conversion chip, secondary signal conversion chip, and image enhaucament chip
Outside port carries out circuit access according to above-mentioned requirement；
S2: when picture processing chip is energized, first passes through this frequency multiplier and input voltage frequency carries out multiplication regulation, to adapt to work as
Front operating frequency；
S3: the data sink 11 first passing through picture processing chip 10 receives the view data of outside；
S4: image is processed by described image processor 13.Concrete the most respectively by described Lens Shading Compensation circuit 131 by mirror
The shade that head produces compensates process；Bright by described optical detection circuit 132 and flash detection circuit 133 detection image
Degree and flashing state, and result of detection is sent to exposure gain circuit；Then exposure is increased by described exposure gain circuit 134
Gain size.The most again by described white balance permanent circuit 35 according to default parameter, carry out the fixed adjustment of white balance.
View data after S5: described data logger 14 will process carries out exporting the first signal conversion chip.
S6: the data reader 212 of described first signal conversion chip receives the bt1120 of picture processing chip output and transmits signal,
And send to signal format converter；
S7: bt1120 vision signal is converted to the vision signal of lvds by described signal format converter 213, and sends to serial
Device 214；
S8: described serializer 214 converts parallel data into serial data, and sends to data logger；
S9: described data logger 215, for exporting lvds signal data to secondary signal conversion chip.
S10: the lvds transmission of video of the first signal conversion chip is believed by the data reader 222 in secondary signal conversion chip
Number, and send to signal format converter；
S11: lvds vision signal is converted to the vision signal of bt1120 by described signal format converter 223, and sends to also
Row device；
S12: described deserializer 224 converts serial data into parallel data, and sends to data logger；
Bt1120 video signal data is exported to image enhaucament chip by S13: described data logger 225.
S14: received the view data of outside by the data sink 31 of image enhaucament chip；
S15: described data sink 31, receives viewdata signal, and sends to de-noising processor 32；
S16: described de-noising processor 32 carries out noise reduction process, then is forwarded to dynamic memory 33.
S17: described dynamic memory 33 is after receiving the view data after de-noising processor 32 processes, then is forwarded to image increasing
Strong device 34.
S18: described image intensifier 34, it includes an image border intensifier circuit；Described image border intensifier circuit strengthens figure
Definition as edge.View data after described image intensifier first will process sends to described pixel self adaptation proofreading equipment 35.
S19: described pixel self adaptation proofreading equipment 35 carries out pixel and adapts to check and correction, retransmits to data logger 36.
View data after S20: described data logger 36 will process carries out exporting to video record chip 40.
S21: by the described data sink 41 of video record chip 40 in the vision signal outside reception, and send to image
Reason device 42；
S22: described image processor 42 receives the video of data sink transmission to be carried out, and processes video image, then
Send to video encoder 43；Wherein, described image processor includes that the edge of the definition for strengthening image border strengthens electricity
Road and for eliminating the interference circuit that abates the noise of signal disturbing.
Encoding video signal is recorded by S23: described video encoder 43；
S24: when receiving external communication order, decoding video signal is played back, and sends by described Video Decoder 44
To data logger 45；
S25: vision signal is exported by described data logger 45.
Compared to prior art, the image gathered, by increasing by a picture processing chip in camera lens part, is processed by the present invention,
Main frame backstage increases an image enhaucament chip, carries out level image enhancing, make the image finally exported become apparent from.
First, picture processing chip is divided into multiple functional module, distinguishes and by each functional module independence co-ordination,
It is capable of low-power consumption, low-light (level), and can be the picture more high definition of output.Meanwhile, further at this image processor
In a white balance permanent circuit is set, for being fixed by this white balance parameter, it is not necessary to operationally carry out the regulation of white balance,
Thus prevent the phenomenon of aberration interference.
Then, image enhaucament chip is also divided into multiple functional module, distinguishes and by each functional module independence co-ordination,
It is capable of the enhancing to image to process.Meanwhile, an image border intensifier circuit is set further in this image intensifier, uses
To strengthen the definition of image border.
It addition, in order to improve signal transmission stability, the present invention by first bt1120 signal being converted to lvds signal, thus
Stable transmission, and there is low noise ability.Then, it is being bt1120 signal by lvds signals revivification, thus ensure that follow-up
The quality of the picture play.
The invention is not limited in above-mentioned embodiment, if to the various changes of the present invention or deformation without departing from the spirit of the present invention
And scope, if within the scope of these are changed and deform claim and the equivalent technologies belonging to the present invention, then the present invention is also intended to
Comprise these to change and deformation.
Claims (9)
1. one kind for medical endoscope image procossing strengthen and video recorder circuitry, it is characterised in that: include picture processing chip,
Signal conversion chip, image enhaucament chip and video record chip；Described signal conversion chip includes the first signal conversion core
Sheet and secondary signal conversion chip；Described first signal conversion chip is for being converted to lvds signal by bt1120 signal；Institute
State secondary signal conversion chip for lvds signal is converted to bt1120 signal；After described picture processing chip will process
Picture signal sends to the first signal conversion chip, and is sent to secondary signal conversion chip by this first signal conversion chip；
Described secondary signal conversion chip sends to image enhaucament chip after being changed by signal；Described image enhaucament chip is by reception
Video image carries out enhancing process, and sends to video record chip, this video record chip record；
Described picture processing chip includes: data sink, master controller, image processor, data logger；
Described data sink, it is for receiving the view data of outside；
Described master controller, it is for receiving the triggering signal of outside, and controls described data sink, image accordingly
Processor and the duty of data logger；
Described image processor, it is for processing image；Described image processor includes a white balance permanent circuit,
It is for according to the parameter preset, carrying out the fixed adjustment of white balance；
Described data logger, its view data after processing exports；
Described first signal conversion chip includes: controller, data reader, signal format converter, serializer, data are defeated
Go out device；
Described controller, its for receive outside triggering signal, and control data reader, signal format converter,
Serializer and the work of data logger；
Described data reader, it transmits signal for the bt1120 receiving outside, and sends to signal format converter；
Described signal format converter, it for being converted to the vision signal of lvds by bt1120 vision signal, and sends extremely
Serializer；
Described serializer, it is used for converting parallel data into serial data, and sends to data logger；
Described data logger, for exporting lvds signal data to secondary signal conversion chip；
Described secondary signal conversion chip includes: controller, data reader, signal format converter, deserializer, data are defeated
Go out device；
Described controller, its for receive outside triggering signal, and control data reader, signal format converter,
Deserializer and the work of data logger；
Described data reader, it is for the lvds video transfer signal of the first signal conversion chip, and sends to signal lattice
Formula converter；
Described signal format converter, it for being converted to the vision signal of bt1120 by lvds vision signal, and sends extremely
Deserializer；
Described deserializer, it is used for converting serial data into parallel data, and sends to data logger；
Described data logger, for exporting bt1120 video signal data；
Described image enhaucament chip includes: data sink, controller, static memory, image intensifier, data logger
And clock generator；
Described data sink, it is used for receiving viewdata signal, and sends to this image intensifier；
Described controller, it is used for receiving outer triggering signal, and controls data sink, its sum of image enhaucament accordingly
Duty according to follower；
Described static memory, it is for storing the driving data of image intensifier, to drive the work of this image intensifier；
Described image intensifier, it includes an image border intensifier circuit；Described image border intensifier circuit is used for strengthening figure
Definition as edge；
Described data logger, it is for receiving the view data after image intensifier processes, and carries out data output；
Described clock generator, it is for producing clock signal for image enhaucament chip；
Described video record chip includes: data sink, video encoder, Video Decoder, data logger and place
Reason device；
Described data sink, for receiving the vision signal of outside, and sends to video encoder；
Described video encoder, for recording encoding video signal；
Described Video Decoder, for playing back decoding video signal；
Described data logger, for exporting vision signal；
Described processor, for controlling the work of data sink, video encoder, Video Decoder and data logger.
The most according to claim 1, the image procossing for medical endoscope strengthens and video recorder circuitry, it is characterised in that: institute
Stating picture processing chip and also include a frequency multiplier, it carries out doubling process for the frequency triggering signal inputted outside,
Retransmit to master controller；
Described first signal conversion chip also includes a phase-locked loop, being connected with signal format converter and serializer respectively, being used for
Unified integration clock signal；
Described secondary signal conversion chip also includes a phase-locked loop, being connected with signal format converter and serializer respectively, being used for
Unified integration clock signal；
Described image enhaucament chip also includes a de-noising processor；The viewdata signal that described data sink receives, sends
Carry out noise reduction process to de-noising processor, then be forwarded to image intensifier；
Described video record chip also includes an image processor, processes for the video being received data sink, and
Image after processing sends to video encoder.
The most according to claim 1, the image procossing for medical endoscope strengthens and video recorder circuitry, it is characterised in that: institute
State image processor and also include an exposure gain circuit, be used for increasing exposure gain size；
Described first signal conversion chip also includes a clock data restorer, and it is connected with data reader, for from transmission letter
The distortion in road and noise recover data；
Described secondary signal conversion chip also includes a clock data restorer, and it is connected with data reader, for from transmission letter
The distortion in road and noise recover data；
Described image enhaucament chip also includes a dynamic memory；Described de-noising processor process after view data, first send to
Dynamic memory stores, then is forwarded to image intensifier；
The image processor of described video record chip includes edge intensifier circuit and the interference circuit that abates the noise.
The most according to claim 3, the image procossing for medical endoscope strengthens and video recorder circuitry, it is characterised in that: institute
State image processor and also include an optical detection circuit and flash detection circuit, its brightness being used for detection image and flicker feelings
Condition, and result of detection is sent to exposure gain circuit；
Described image enhaucament chip also includes a pixel self adaptation proofreading equipment；Described image intensifier first will process after view data
Send to described pixel self adaptation proofreading equipment, this pixel self adaptation proofreading equipment carry out pixel and adapt to check and correction, retransmit to number
According to follower.
The most according to claim 4, the image procossing for medical endoscope strengthens and video recorder circuitry, it is characterised in that: institute
State image enhaucament chip and also include a vision signal multiplier and a storage signal multiplier；Described clock generator, will produce
Raw clock signal is respectively sent to vision signal multiplier and storage signal multiplier, and will by this vision signal multiplier
Clock signal sends to data sink, this storage signal multiplier send clock signal to dynamic memory and static state
Memory.
The most according to claim 1, the image procossing for medical endoscope strengthens and video recorder circuitry, it is characterised in that: institute
State and be provided with outside picture processing chip: for receiving the power port of supply voltage, connecing for receiving the signal of picture signal
Receiving end mouth, for exporting the video signal port of vision signal, for exporting the row field signal port of row field signal, being used for
Receive the clock signal port of external timing signal, for receiving the data receiver port and of storage data outside receiving
The PORT COM of portion's communication command；
It is provided with outside described first signal conversion chip: for receiving the power port of supply voltage, for receiving bt1120
The receiver port of vision signal, for exporting the video signal port of lvds vision signal and for exporting row field signal
Row field signal port；
It is provided with outside described secondary signal conversion chip: for receiving the power port of supply voltage, for receiving lvds
The receiver port of vision signal and for exporting the video signal port of bt1120 vision signal；
Described image enhaucament chip exterior is provided with: for receiving the power port of supply voltage, for receiving picture signal
Receiver port, for export vision signal video signal port, for export row field signal row field signal port,
For receiving the clock signal port of external timing signal and for receiving the data receiver port of storage data；
Described video record chip exterior is provided with: power port, video input port, video-out port and PORT COM；
Described video input port is connected with the data sink of this video record chip internal, for receiving the video data of outside；
Described video-out port, is connected with described data logger, is used for exporting video data；Described PORT COM, with institute
State processor to connect, for receiving the serial port command of outside.
The most according to claim 6, the image procossing for medical endoscope strengthens and video recorder circuitry, it is characterised in that: institute
State the power port of picture processing chip and be circumscribed with one for the filter circuit of voltage stabilizing；Described filter circuit includes an inductance
With at least one electric capacity；Described inductance one end is connected with external power source, and the other end is connected with each electric capacity respectively, described often
The other end of individual electric capacity and ground connection；Power port is accessed in one end that described inductance is connected with electric capacity；
The power port of described picture processing chip is circumscribed with one for the filter circuit of voltage stabilizing；Described filter circuit includes one
Individual inductance and at least one electric capacity；Described inductance one end is connected with external power source, and the other end is connected with each electric capacity respectively,
The other end of described each electric capacity and ground connection；Power port is accessed in one end that described inductance is connected with electric capacity；
The power port of described video record chip is circumscribed with a filter circuit；Described filter circuit includes a magnetic bead and at least
One electric capacity；Described magnetic bead is connected with one end of electric capacity, and the other end ground connection of this electric capacity；Described power port is connected to
Between magnetic bead and electric capacity.
The most according to claim 7, the image procossing for medical endoscope strengthens and video recorder circuitry, it is characterised in that: institute
Stating the external clock circuit of clock signal port of picture processing chip, it includes that a clock shakes chip；Described clock shakes chip
Power end is connected with power supply by a filter circuit, and this clock shakes the output of chip by a debugging circuit and described clock letter
Number port connects；Described filter circuit includes being made up of an inductance and capacitances in series, and one end of described inductance is connected with power supply,
The other end is connected with electric capacity, and the other end ground connection of this electric capacity；Described clock shake chip power end be connected with inductance and electricity
Between appearance；Described debugging electricity routing resistance and electric capacity composition；One end of the resistance of this debugging circuit connects with the output of Zhong Zhen
Connecing, the other end is connected with electric capacity, and the other end ground connection of this electric capacity；Described clock signal port is connected to this resistance and electricity
Between appearance；
The external clock circuit of clock signal port of described image enhaucament chip, it includes that a clock shakes chip；Described clock shakes
The power end of chip is connected with power supply by a filter circuit, and this clock shakes the output of chip and described clock signal port company
Connect；Described filter circuit includes being made up of an inductance and capacitances in series, and one end of described inductance is connected with power supply, the other end
It is connected with electric capacity, and the other end ground connection of this electric capacity.
The most according to claim 8, the image procossing for medical endoscope strengthens and video recorder circuitry, it is characterised in that: institute
The data receiver port stating picture processing chip is circumscribed with a memory circuitry, and it includes a memory, is connected to this storage
The filter circuit of the voltage port of device, and it is connected to the resistance of the output port of this memory.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102258359A (en) * | 2010-05-31 | 2011-11-30 | 奥林巴斯株式会社 | Endoscope system |
| CN203120054U (en) * | 2013-01-31 | 2013-08-07 | 深圳洪迪实业有限公司 | Camera capable of monitoring at a long distance |
| CN103750805A (en) * | 2014-01-02 | 2014-04-30 | 上海大学 | High-definition medical endoscope video processing device and method |
| CN103795980A (en) * | 2014-01-25 | 2014-05-14 | 武汉烽火众智数字技术有限责任公司 | Cascading video device and data processing method thereof |
| CN103873830A (en) * | 2014-03-20 | 2014-06-18 | 郑州赛福特电子设备有限公司 | Electronic endoscope image system and electronic endoscope image processing method |
| CN104042179A (en) * | 2014-07-04 | 2014-09-17 | 王刚 | Integrated medical endoscope system |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4757019B2 (en) * | 2005-12-26 | 2011-08-24 | オリンパスメディカルシステムズ株式会社 | Endoscope device |
-
2015
- 2015-06-30 CN CN201510385773.0A patent/CN105049676B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102258359A (en) * | 2010-05-31 | 2011-11-30 | 奥林巴斯株式会社 | Endoscope system |
| CN203120054U (en) * | 2013-01-31 | 2013-08-07 | 深圳洪迪实业有限公司 | Camera capable of monitoring at a long distance |
| CN103750805A (en) * | 2014-01-02 | 2014-04-30 | 上海大学 | High-definition medical endoscope video processing device and method |
| CN103795980A (en) * | 2014-01-25 | 2014-05-14 | 武汉烽火众智数字技术有限责任公司 | Cascading video device and data processing method thereof |
| CN103873830A (en) * | 2014-03-20 | 2014-06-18 | 郑州赛福特电子设备有限公司 | Electronic endoscope image system and electronic endoscope image processing method |
| CN104042179A (en) * | 2014-07-04 | 2014-09-17 | 王刚 | Integrated medical endoscope system |
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