CN105049675B - A kind of image procossing enhancing of medical endoscope and display driver circuit - Google Patents
A kind of image procossing enhancing of medical endoscope and display driver circuit Download PDFInfo
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Abstract
The present invention relates to a kind of enhancing of the image procossing of medical endoscope and display driver circuit, including picture processing chip, signal conversion chip, image enhaucament chip and display driver chip；The signal conversion chip includes the first signal conversion chip and secondary signal conversion chip；The first signal conversion chip is used to bt1120 signals being converted to lvds signals；The secondary signal conversion chip is used to lvds signals being converted to bt1120 signals；Described image process chip sends the picture signal after processing to the first signal conversion chip, and is sent by the first signal conversion chip to secondary signal conversion chip；The secondary signal conversion chip is sent to image enhaucament chip after signal is changed；Described image enhancing chip is used to carry out image enhancement processing to the vision signal of reception, retransmits to display driver chip, is driven display.
Description
Technical field
The present invention relates to a kind of image processing circuit, particularly a kind of image procossing for medical endoscope strengthens and shown
Show drive circuit.
Background technology
Endoscope is a kind of conventional medicine equipment, is made up of bendable portion, light source and one group of camera lens.Day through human body
Right duct, or the small otch that does of underwent operative enter in human body, and endoscope is imported to during use the organ of preliminary examination, can be direct
Spy on the change about position.
After the camera lens of endoscope is partially completed video acquisition, it is also necessary to which the output for carrying out video plays.And in video
When being driven broadcasting, using the video drive playing circuit of routine, the not smooth problem of video playback is often produced.Therefore,
Need to provide a kind of video driver circuit that can be used in medical endoscope.
Wherein, the quality of picture quality directly affects the using effect of endoscope.Existing typically use is peeped in electronics
Mirror is observed, and the processing system that the image after observation is sent to external connection carries out image procossing.However, due in people
When carrying out IMAQ in vivo, can due to a variety of causes of inside of human body, and cause noise jamming occur, brightness can not adjust automatically
Section causes image aberration occur due to the color of light, so causes in the image procossing in later stage, it is difficult to which reduction is true
Image, make doctor observation when be difficult to recognize.
The content of the invention
The invention reside in the shortcomings that overcoming prior art and insufficient, there is provided a kind of image procossing for medical endoscope increases
Strong and display driver circuit.
The present invention is achieved through the following technical solutions：A kind of image procossing enhancing of medical endoscope and display driving electricity
Road, including picture processing chip, signal conversion chip, image enhaucament chip and display driver chip；The signal conversion chip
Including the first signal conversion chip and secondary signal conversion chip；The first signal conversion chip is used to turn bt1120 signals
It is changed to lvds signals；The secondary signal conversion chip is used to lvds signals being converted to bt1120 signals；Described image processing
Chip sends the picture signal after processing to the first signal conversion chip, and is sent by the first signal conversion chip to second
Signal conversion chip；The secondary signal conversion chip is sent to image enhaucament chip after signal is changed；Described image strengthens
Chip is used to carry out image enhancement processing to the vision signal of reception, retransmits to display driver chip, is driven display.
Compared to prior art, the present invention is entered by increasing by a picture processing chip in camera lens part to the image of collection
Row processing, increases by an image enhaucament chip on main frame backstage, carries out level image enhancing, makes the image that finally exports more clear
It is clear.
First, multiple functional modules are divided into picture processing chip, are coordinated respectively and independently by each functional module
Work, can realize low-power consumption, low-light (level), and can be the picture more high definition of output.Meanwhile further at the image
A white balance permanent circuit is set in reason device, for the white balance parameter to be fixed, without carrying out white balance at work
Regulation, so as to prevent aberration interference phenomenon.
Then, multiple functional modules are also divided into image enhaucament chip, are assisted respectively and independently by each functional module
Work is adjusted, the enhancing processing to image can be realized.Meanwhile further an image border is set to strengthen in the image intensifier
Circuit, to strengthen the definition of image border.
In addition, in order to improve the stability of signal transmission, it is of the invention by the way that bt1120 signals first are converted into lvds signals,
So as to stable transmission, and there is low noise ability.Then, it is being bt1120 signals by lvds signals revivifications, so as to ensure that
The quality of the picture of follow-up play.
As a further improvement on the present invention, described image process chip includes：Data sink, master controller, figure
As processor, data logger；
--- the data sink, it is used for the view data for receiving outside；
--- the master controller, it is used to receiving the trigger signal of outside, and accordingly control the data sink,
The working condition of image processor and data logger；
--- described image processor, it is used to handle image；Described image processor is consolidated including a white balance
Determine circuit, it is used for the fixed adjustment that white balance is carried out according to default parameter；
--- the data logger, it is used to be exported the view data after processing；
The first signal conversion chip includes：Controller, data reader, signal format converter, serializer, data
Follower；
--- the controller, it is used for the trigger signal for receiving outside, and control data reader, signal format are changed
The work of device, serializer and data logger；
--- the data reader, it is used for the bt1120 transmission signals for receiving outside, and sends to signal format and turn
Parallel operation；
--- the signal format converter, it is used for the vision signal that bt1120 vision signals are converted to lvds, and
Send to serializer；
--- the serializer, it is used to convert parallel data into serial data, and sends to data logger；
--- the data logger, for lvds signal datas to be exported to secondary signal conversion chip；
The secondary signal conversion chip includes：Controller, data reader, signal format converter, deserializer, data
Follower；
--- the controller, it is used for the trigger signal for receiving outside, and control data reader, signal format are changed
The work of device, deserializer and data logger；
--- the data reader, it is used for the lvds video transfer signals of the first signal conversion chip, and sends extremely
Signal format converter；
--- the signal format converter, it is used for the vision signal that lvds vision signals are converted to bt1120, and
Send to deserializer；
--- the deserializer, it is used to convert serial data into parallel data, and sends to data logger；
--- the data logger, for bt1120 video signal datas to be exported；
Described image enhancing chip includes：Data sink, controller, static memory, image intensifier, data output
Device and clock generator；
--- the data sink, it is used to receive viewdata signal, and sends to the image intensifier；
--- the controller, it is used to receiving outer triggering signal, and corresponding control data receiver, image enhaucament its
With the working condition of data logger；
--- the static memory, it is used for the driving data of storage image booster, to drive the image intensifier
Work；
--- described image booster, it includes image border enhancing circuit；Described image edge enhancing circuit is used for
Strengthen the definition of image border；
--- the data logger, it is used to receive the view data after image intensifier processing, and it is defeated to carry out data
Go out；
--- the clock generator, it is used to produce clock signal for image enhaucament chip；
The display driver chip includes：Receiver of the analog signal, digit signal receiver, analog-digital converter, multiplexer,
Output format converter, data logger and controller；
--- the receiver of the analog signal, for receiving analog signal, and send to analog-digital converter；
--- the analog-digital converter, for converting analog signals into data-signal, and send to multiplexer；
--- the data signal receiver, for receiving data-signal, and send to multiplexer；
--- the multiplexer, for two paths of signals to be integrated, and exported to output format converter；
--- the output format converter, for signal format to be changed, and export to data logger；
--- the data logger, by signal output, and shown；
--- the controller, for controlling receiver of the analog signal, digit signal receiver, analog-digital converter, multiplexing
The work of device, output format converter and data logger.
As a further improvement on the present invention, described image process chip also includes a frequency multiplier, and it is used for will be outside defeated
The frequency of the trigger signal entered carries out doubling processing, retransmits to master controller；
The first signal conversion chip also includes a phase-locked loop, connects respectively with signal format converter and serializer
Connect, for unified integration clock signal；
The secondary signal conversion chip also includes a phase-locked loop, connects respectively with signal format converter and serializer
Connect, for unified integration clock signal；
Described image enhancing chip also includes a de-noising processor；Picture number that the data sink receives it is believed that
Number, send to de-noising processor and carry out noise reduction process, then be forwarded to image intensifier；
The display driver chip also includes a Video Decoder, field flyback data processor and memory；
The Video Decoder, the analog signal for receiver of the analog signal to be received are decoded, and are sent to field
Flyback data processor；
The field flyback data processor, for decoded analog signal to be inserted into data row, and send and deposited to described
Reservoir is stored；
The memory, for storing the data after field flyback data processor processes, and send to output format and turn
Parallel operation.
As a further improvement on the present invention, described image processor also includes an exposure gain circuit, is exposed for increasing
Gain of light size；
The first signal conversion chip also includes a clock data restorer, and it is connected with data reader, for from
Recover data in the distortion of transmission channel and noise；
The secondary signal conversion chip also includes a clock data restorer, and it is connected with data reader, for from
Recover data in the distortion of transmission channel and noise；
Described image enhancing chip also includes a dynamic memory；View data after the de-noising processor processing, first
Send to dynamic memory and stored, then be forwarded to image intensifier；
The display driver chip also includes an image border smoothing processor, for receiving the signal of restorer, and it is right
The edge of video image is smoothed, and is retransmited to format converter.
As a further improvement on the present invention, described image processor also includes an optical detection circuit and flash detection electricity
Road, it is used for the brightness of detection image and flashing state, and result of detection is sent to exposure gain circuit；
Described image enhancing chip also includes the adaptive proofreading equipment of a pixel；Described image booster is first by the figure after processing
As data are sent to the adaptive proofreading equipment of the pixel, pixel is carried out by the adaptive proofreading equipment of the pixel and adapts to check and correction, is retransmited
To data logger；
The data logger of the display driver chip carries out color output and the output of lvds vision signals simultaneously.
As a further improvement on the present invention, described image enhancing chip also includes a vision signal multiplier and a storage
Signal multiplier；The clock generator, caused clock signal is respectively sent to vision signal multiplier and storage signal
Multiplier, and being sent clock signal to data sink by the vision signal multiplier, by the storage signal multiplier by when
Clock signal is sent to dynamic memory and static memory.
As a further improvement on the present invention, it is provided with outside described image process chip：For receiving the electricity of supply voltage
Source port, the receiver port for receiving picture signal, the video signal port for exporting vision signal, for exporting
The row field signal port of row field signal, the clock signal port for receiving external timing signal, for receiving data storage
Data receiver port and a PORT COM for receiving external communication order；
It is provided with outside the first signal conversion chip：The center processing chip exterior is provided with：For receiving power supply electricity
The power port of pressure, the receiver port for receiving bt1120 vision signals, the video for exporting lvds vision signals
Signal port and the row field signal port for exporting row field signal；
It is provided with outside the secondary signal conversion chip：The center processing chip exterior is provided with：Supplied for receiving
The power port of piezoelectric voltage, the receiver port for receiving lvds vision signals and for exporting bt1120 vision signals
Video signal port；
Described image enhancing chip exterior is provided with：For receiving the power port of supply voltage, for receiving picture signal
Receiver port, the video signal port for exporting vision signal, the row field signal port for exporting row field signal,
For receiving the clock signal port of external timing signal and data receiver port for receiving data storage；
The outside of the display driver chip is provided with：Power port, video reception port and VT
Mouthful；The video reception port connects with the receiver of the analog signal inside display driver chip and data signal receiver
Connect；The video-out port is connected with the data logger inside display driver chip.
As a further improvement on the present invention, the power port of described image process chip is circumscribed with a filter for being used for voltage stabilizing
Wave circuit；The filter circuit includes an inductance and at least one electric capacity；Described inductance one end is connected with external power source, another
End respectively with each capacitance connection, the other end of each electric capacity and ground connection；One end of the inductance and capacitance connection is accessed
Power port；
The power port of described image process chip is circumscribed with a filter circuit for being used for voltage stabilizing；The filter circuit includes
One inductance and at least one electric capacity；Described inductance one end is connected with external power source, the other end respectively with each capacitance connection, institute
State the other end and the ground connection of each electric capacity；Power port is accessed in one end of the inductance and capacitance connection.
As a further improvement on the present invention, the external clock circuit in the clock signal port of described image process chip,
It includes a clock and shaken chip；The shake power end of chip of the clock is connected by a filter circuit with power supply, and the clock shakes the defeated of chip
Go out end to be connected with the clock signal port by a debug circuit；The filter circuit is included by an inductance and electric capacity series connection group
Into one end of the inductance is connected with power supply, the other end and capacitance connection, and the other end ground connection of the electric capacity；The clock shakes core
Between the power end and connection and inductance and electric capacity of piece；The debug circuit is made up of resistance and electric capacity；The electricity of the debug circuit
One end of resistance and Zhong Zhen output end connect, the other end and capacitance connection, and the other end ground connection of the electric capacity；The clock signal
Port is connected between the resistance and electric capacity；
Described image strengthens the external clock circuit in clock signal port of chip, and it includes a clock and shaken chip；The clock
The power end of chip of shaking is connected by a filter circuit with power supply, and the clock shakes the output end of chip and the clock signal port connects
Connect；The filter circuit includes being composed in series by an inductance and electric capacity, and one end of the inductance is connected with power supply, the other end and electricity
Hold connection, and the other end ground connection of the electric capacity.
As a further improvement on the present invention, the data receiver port of described image process chip is circumscribed with memory electricity
Road, it include a memory, be connected to the memory voltage port filter circuit, and be connected to the output of the memory
The resistance of port.
In order to more fully understand and implement, the invention will now be described in detail with reference to the accompanying drawings.
Brief description of the drawings
Fig. 1 is the chip connection diagram of the present invention.
Fig. 2 is the internal module connection diagram of picture processing chip.
Fig. 3 is the circuit module schematic diagram of the image processor of picture processing chip.
Fig. 4 is the voltage segment circuit diagram of picture processing chip.
Fig. 5 is the outside port circuit diagram of picture processing chip.
Fig. 6 is the circuit diagram of the filter circuit of the 3.3V voltages of picture processing chip.
Fig. 7 is the circuit diagram of the filter circuit of the 1.8V voltages of picture processing chip.
Fig. 8 is the circuit diagram of the filter circuit of the 1.2V voltages of picture processing chip.
Fig. 9 is the partial enlarged drawing of the receiver port of picture processing chip.
Figure 10 is the partial enlarged drawing of the video signal port of picture processing chip.
Figure 11 is the partial enlarged drawing of the row field signal port of picture processing chip.
Figure 12 is the schematic diagram of the clock circuit of picture processing chip.
Figure 13 is the schematic diagram of the storage circuit of picture processing chip.
Figure 14 is the partial enlarged drawing of the PORT COM of picture processing chip.
Figure 15 is the internal components connection diagram of the first signal conversion chip.
Figure 16 is the internal module connection diagram of secondary signal conversion chip.
Figure 17 is the outside port connection diagram of the first signal conversion chip.
Figure 18 is the close-up schematic view of the power port of the first signal conversion chip.
Figure 19 is the partial enlarged drawing of the receiver port of the first signal conversion chip.
Figure 20 is the partial enlarged drawing of the video signal port of the first signal conversion chip.
Figure 21 is the partial enlarged drawing of the row field signal port of the first signal conversion chip.
Figure 22 is the external connection circuit diagram of secondary signal conversion chip.
Figure 23 is the partial enlarged drawing of the receiver port of secondary signal conversion chip.
Figure 24 is the partial enlarged drawing of the video signal port of secondary signal conversion chip.
Figure 25 is the partial enlarged drawing of the row field signal port of secondary signal conversion chip.
Figure 26 is the internal module connection diagram of image enhaucament chip.
Figure 27 is the Part I external connection circuit diagram of image enhaucament chip.
Figure 28 is the Part II external connection circuit diagram of image enhaucament chip.
Figure 29 is the circuit diagram of the filter circuit of pressure-stabilizing of the 3.3V voltages of image enhaucament chip.
Figure 30 is that the 3.3V of image enhaucament chip is converted to 1.8V power-switching circuit figure.
Figure 31 is that the 3.3V of image enhaucament chip is converted to 1.2V power-switching circuit figure.
Figure 32 is the partial enlarged drawing of the receiver port of image enhaucament chip.
Figure 33 a are the partial enlarged drawings of the video signal port Part I of image enhaucament chip.
Figure 33 b are the partial enlarged drawings of the video signal port Part II of image enhaucament chip.
Figure 34 is the circuit diagram of the clock circuit of image enhaucament chip.
Figure 35 is the partial enlarged drawing of the row field signal port of image enhaucament chip.
Figure 36 is the internal components connection diagram of display driver chip.
Figure 37 is the external signal input circuit figure of display driver chip.
Figure 38 is the external signal output circuit figure of display driver chip.
Figure 39 is the partial enlarged drawing of the power port of display driver chip.
Figure 40 is the partial enlarged drawing of the video input port of display driver chip.
Figure 41 is the partial enlarged drawing of the video-out port of display driver chip.
Embodiment
Referring to Fig. 1, its chip connection diagram for the present invention.The invention provides a kind of image of medical endoscope
Processing enhancing and display driver circuit, including picture processing chip 10, signal conversion chip 20 and image enhaucament chip 30；It is described
Signal conversion chip 20 includes the first signal conversion chip 21 and secondary signal conversion chip 22；The first signal conversion chip
21 are used to bt1120 signals being converted to lvds signals；The secondary signal conversion chip 22 is used to be converted to lvds signals
Bt1120 signals；Described image process chip 10 sends the picture signal after processing to the first signal conversion chip 21, and by
The first signal conversion chip 21 is sent to secondary signal conversion chip 22；The secondary signal conversion chip 22 changes signal
After send to image enhaucament chip 30.
Referring to Fig. 2, it is the internal module connection diagram of picture processing chip.Described image process chip includes：
Data sink 11, master controller 12, image processor 13, data logger 14.
The data sink 11, it is used for the view data for receiving outside；
The master controller 12, it is used for the trigger signal for receiving outside, and accordingly controls the data sink, figure
As the working condition of processor and data logger；
Described image processor 13, it is used to handle image.
The data logger 14, it is used to be exported the view data after processing.
Further, described image process chip also includes a frequency multiplier 15, and it is used for the trigger signal of outside input
Frequency carries out doubling processing, retransmits to master controller 12.
Referring to Fig. 3, its circuit module schematic diagram for the image processor of picture processing chip.Specifically, the figure
As processor 13 includes a Lens Shading Compensation circuit 131, optical detection circuit 132, flash detection circuit 133, exposure gain
Circuit 134 and white balance permanent circuit 135.
The Lens Shading Compensation circuit 131, it is used to shade caused by camera lens compensating processing.
The optical detection circuit 132 and flash detection circuit 133, it is used for the brightness of detection image and flashing state,
And result of detection is sent to exposure gain circuit.
The exposure gain circuit 134, for increasing exposure gain size.
The white balance permanent circuit 135, it is used for the fixed adjustment that white balance is carried out according to default parameter.
Please refer to Fig. 4 and Fig. 5, it is respectively the voltage segment and other outside port circuits of picture processing chip
Figure.In addition, in order in order to adapt to the application of the picture processing chip, be further provided with outside described image process chip：With
In the power port 101 of reception supply voltage, the receiver port 102 for receiving picture signal, for exporting video letter
Number video signal port 103, the row field signal port 104 for exporting row field signal, for receiving external timing signal
Clock signal port 105, for receiving the data receiver port 106 and one of data storage it is used to receive the logical of external communication order
Interrogate port 107.
Fig. 6-8 are referred to, it is respectively 3.3V, 1.8V and 1.2V of picture processing chip circuit diagram.Further, it is described
Power port 101 is circumscribed with a filter circuit for being used for voltage stabilizing；The filter circuit includes an inductance and at least one electric capacity；
Described inductance one end is connected with external power source, and the other end is respectively with each capacitance connection, and the other end of each electric capacity is with connecing
Ground；Power port is accessed in one end of the inductance and capacitance connection.Specifically, the external voltage bag of described image process chip
Include：Tri- kinds of 3.3V, 1.8V and 1.2V.Wherein, 3.3V voltages access circuit includes 2 electric capacity, and 1.8V voltages access circuit includes 5
Individual electric capacity, 1.2V voltage access circuit includes 6 electric capacity, to filter the interference signal of different frequency respectively.
Referring to Fig. 9, its partial enlarged drawing for the receiver port of picture processing chip.The receiver port
102 include 8 pins, for receiving the video signal of outside.
Referring to Fig. 10, its partial enlarged drawing for the video signal port of picture processing chip.The vision signal end
Mouth 103 includes the vision signal of two groups of different-formats, carries out doubleway output, is played and recorded in real time respectively to facilitate.
Figure 11 is referred to, it is the partial enlarged drawing of the row field signal port of picture processing chip.The row field signal end
Mouth 104 is used for the frequency and order for controlling video frequency output.Such as：Display frequency of the vision signal on screen can be controlled and shown
Show order, can often row output or export from left to right under upper.
Figure 12 is referred to, it is the schematic diagram of the clock circuit of picture processing chip.The clock signal port 105 is external
One clock circuit, it includes a clock and shaken chip；The shake power end of chip of the clock is connected by a filter circuit with power supply, the clock
The output end of chip of shaking is connected by a debug circuit with the clock signal port；The filter circuit include by an inductance and
Electric capacity is composed in series, and one end of the inductance is connected with power supply, the other end and capacitance connection, and the other end ground connection of the electric capacity；
The clock shake chip power end and connection and inductance and electric capacity between；The debug circuit is made up of resistance and electric capacity；The tune
Try one end of the resistance of circuit and Zhong Zhen output end connects, the other end and capacitance connection, and the other end ground connection of the electric capacity；Institute
Clock signal port is stated to be connected between the resistance and electric capacity.
Figure 13 is referred to, it is the schematic diagram of the storage circuit of picture processing chip.Further, the data receiver port
106 are circumscribed with a memory circuitry, it include a memory, be connected to the memory voltage port filter circuit, and
It is connected to the resistance of the output port of the memory.
Figure 14 is referred to, it is the partial enlarged drawing of the PORT COM of picture processing chip.The PORT COM 107 is used for
The trigger command of outside transmission is received, to trigger being operated for the picture processing chip.
Figure 15 is referred to, it is the internal components connection diagram of the first signal conversion chip.The first signal conversion
Chip 21 includes：Controller 211, data reader 212, signal format converter 213, serializer 214, data logger 215,
Phase-locked loop 216 and clock data restorer 217；
The controller 211, it is used for the trigger signal for receiving outside, and control data reader 212, signal format turn
The work of parallel operation 213, serializer 214 and data logger 215；
The data reader 212, it is used for the bt1120 transmission signals for receiving outside, and sends to signal format and change
Device；
The signal format converter 213, it is used for the vision signal that bt1120 vision signals are converted to lvds, concurrently
Deliver to serializer；
The serializer 214, it is used to convert parallel data into serial data, and sends to data logger；
The data logger 215, for lvds signal datas to be exported to secondary signal conversion chip.
The phase-locked loop 216, is connected with signal format converter and serializer respectively, believes for unified integration clock pulse
Number.
The clock data restorer 217, it is connected with data reader, for from the distortion and noise of transmission channel
Recover data.
Figure 16 is referred to, it is the internal module connection diagram of secondary signal conversion chip.The secondary signal conversion
Chip 22 includes：Controller 221, data reader 222, signal format converter 223, deserializer 224, data logger 225,
Phase-locked loop 226 and clock data restorer 227；
The controller 221, it is used for the trigger signal for receiving outside, and control data reader 222, signal format turn
The work of parallel operation 223, deserializer 224 and data logger 225；
The data reader 222, it is used for the lvds video transfer signals of the first signal conversion chip, and sends to letter
Number format converter；
The signal format converter 223, it is used for the vision signal that lvds vision signals are converted to bt1120, concurrently
Deliver to deserializer 224；
The deserializer 224, it is used to convert serial data into parallel data, and sends to data logger；
The data logger 225, for bt1120 video signal datas to be exported.
The phase-locked loop 226, is connected with signal format converter and deserializer respectively, believes for unified integration clock pulse
Number.
The clock data restorer 227, it is connected with data reader 222, for the distortion from transmission channel and makes an uproar
Recover data in sound.
Figure 17 is referred to, it is the outside port connection diagram of the first signal conversion chip.The first signal conversion
Chip exterior is provided with：The center processing chip exterior is provided with：For receiving the power port 2101 of supply voltage, for receiving
The receiver port 2102 of bt1120 vision signals, the video signal port 2103 for exporting lvds vision signals and it is used for
Export the row field signal port 2104 of row field signal.
Please refer to Figure 18, it is the close-up schematic view of the power port of the first signal conversion chip.The electricity
The electric capacity for filtering alternating current is circumscribed with source port 2101.
Figure 19 is referred to, it is the partial enlarged drawing of the receiver port of the first signal conversion chip.The signal connects
Receiving end mouth 2102, it is connected with the data reader 21；Specifically, the receiver port includes 20 pins, it is used for
Receive outside bt1120 vision signal.
Figure 20 is referred to, it is the partial enlarged drawing of the video signal port of the first signal conversion chip.The video letter
Number port 2103 includes 4 output pins, for exporting lvds vision signals, and the video signal port and the data output
Device connects.
Figure 21 is referred to, it is the partial enlarged drawing of the row field signal port of the first signal conversion chip.The row field letter
Number port 2104 includes a line signal output pin and a field signal output pin；The row field signal port 2104 is used to control
The frequency and order of video frequency output processed.Such as：Display frequency and display order of the vision signal on screen can be controlled, can be with
It is often row output or to export from left to right under upper.
Figure 22 is referred to, it is the external connection circuit diagram of secondary signal conversion chip.The secondary signal conversion
Chip exterior is provided with：For receiving the receiver port 2201 of lvds vision signals, for exporting bt1120 vision signals
Video signal port 2202 and row field signal port 2203.
Figure 23 is referred to, it is the partial enlarged drawing of the receiver port of secondary signal conversion chip.The signal connects
Receiving end mouth 2201, it is connected with the data reader 221；Specifically, the receiver port includes 4 pins, it is used for
Receive the lvds vision signals of the first signal conversion chip output.
Figure 24 is referred to, it is the partial enlarged drawing of the video signal port of secondary signal conversion chip.The video letter
Number port 2202 includes 20 output pins, for exporting bt1120 vision signals, and the video signal port and the data
Follower connects.
Figure 25 is referred to, it is the partial enlarged drawing of the row field signal port of secondary signal conversion chip.The row field letter
Number port 2203 includes a line signal output pin and a field signal output pin；The row field signal port 2104 is used to control
The frequency and order of video frequency output processed.Such as：Display frequency and display order of the vision signal on screen can be controlled, can be with
It is often row output or to export from left to right under upper.
Figure 26 is referred to, it is the internal module connection diagram of image enhaucament chip.Described image enhancing chip includes：
The adaptive proofreading equipment 35 of data sink 31, de-noising processor 32, dynamic memory 33, image intensifier 34, pixel, data are defeated
Go out device 36, static memory 37, controller 38, vision signal multiplier 39, storage signal multiplier 310, clock generator
311。
The data sink 31, it is used to receive viewdata signal, and sends to de-noising processor 32；
The viewdata signal that the data sink 31 receives, send to de-noising processor 32 and carry out noise reduction process,
Dynamic memory 33 is forwarded to again.
The dynamic memory 33 is after the view data after receiving de-noising processor 22 and handling, then is forwarded to image increasing
Strong device 34.
Described image booster 34, it includes image border enhancing circuit；Described image edge enhancing circuit is used to increase
The definition of strong image border.Further, described image booster first sends the view data after processing to the pixel certainly
Proofreading equipment 35 is adapted to, carrying out pixel by the adaptive proofreading equipment 35 of the pixel adapts to check and correction, retransmits to data logger 36.
The data logger 36, it is used to receive the view data after image intensifier processing, and carries out data output；
The static memory 37, it is used for the driving data of storage image booster, to drive the image intensifier
Work；
The controller 38, it is used to receiving outer triggering signal, and corresponding control data receiver, image enhaucament itself and
The working condition of data logger；
The clock generator 311, it is used to produce clock signal for image enhaucament chip.Further, the clock hair
Raw device, caused clock signal is respectively sent to vision signal multiplier 29 and storage signal multiplier 310, and by the video
Signal multiplier 39 sends clock signal to data sink, by the storage signal multiplier 310 by clock signal send to
Dynamic memory and static memory.
Please refer to Figure 27 and Figure 28, it is respectively the external connection circuit diagram of image enhaucament chip.
Further, described image enhancing chip exterior is provided with：For receiving the power port of supply voltage, for reception figure
Receiver port 301 as signal, the video signal port 302 for exporting vision signal, for receive external clock letter
Number clock signal port 303, the row field signal port 304 for exporting row field signal.
Specifically, in the present embodiment, the external voltage of the power port includes tri- kinds of electricity of 3.3V, 1.8V and 1.2V
Pressure.Figure 29 is referred to, it is the circuit diagram of the filter circuit of pressure-stabilizing of 3.3V voltages.The filter circuit is including an inductance and extremely
Few electric capacity；Described inductance one end is connected with external power source, the other end respectively with each capacitance connection, each electric capacity
The other end and ground connection；Power port is accessed in one end of the inductance and capacitance connection.
Figure 30-31 are referred to, it is respectively that 3.3V is converted to 1.8V power-switching circuit figure and 3.3V is converted to 1.2V
Change-over circuit figure.In the present embodiment, by a power-switching circuit, 3.3V voltage is respectively converted into 1.8V and 1.2V
Voltage.Specifically, the power-switching circuit includes a power conversion chip；The input access of the power conversion chip
3.3V voltage, output end export 1.8V and 1.2V voltage respectively, to be powered to image enhaucament chip.
Figure 32 is referred to, it is the partial enlarged drawing of the receiver port of image enhaucament chip.The signal receiving end
Mouth 301 includes 20 signal pins, is connected with the data sink 31 of inside, for receiving the picture signal of input.
Refer to Figure 33 a and 33b, its be respectively the video signal port of image enhaucament chip Part I and second
The partial enlarged drawing divided.The video signal port 302 includes 20 signal pins, and itself and internal data logger 36 connect
Connect, for output image signal.
Figure 34 is referred to, it is the circuit diagram of the clock circuit of image enhaucament chip.Further, the clock signal port
A 303 external clock circuits, it includes a clock and shaken chip；The shake power end of chip of the clock passes through a filter circuit and power supply and connected
Connect, the shake output end of chip of the clock is connected with the clock signal port；The filter circuit is included by an inductance and electric capacity string
Connection composition, one end of the inductance are connected with power supply, the other end and capacitance connection, and the other end ground connection of the electric capacity.
Figure 35 is referred to, it is the partial enlarged drawing of the row field signal port of image enhaucament chip.The row field signal end
Mouth 304 includes a row signal pins and a field signal pin.The row field signal port 304 is used to control video frequency output
Frequency and order.Such as：Display frequency and display order of the vision signal on screen can be controlled, can be every under upper
Row is exported or exported from left to right.
Figure 36 is referred to, it is the internal components connection diagram of the display driver chip of the present invention.The display driving
Chip includes：Receiver of the analog signal 41, digit signal receiver 42, analog-digital converter 43, multiplexer 44, image border are smooth
Processor 45, Video Decoder 46, field flyback data processor 47, memory 48, output format converter 49, data logger
410 and controller 411.
The receiver of the analog signal 41, for receiving analog signal, and send to analog-digital converter 43；
The data signal receiver 42, for receiving data-signal, and send to multiplexer 44；
The analog-digital converter 43, for converting analog signals into data-signal, and send to multiplexer 44；
The multiplexer 44, for two paths of signals to be integrated, and exported to the processing of output image edge-smoothing
Device 45；
Described image edge-smoothing processor 45, carried out for receiving the signal of restorer, and to the edge of video image
Smoothing processing, retransmit to format converter 49.
The Video Decoder 46, the analog signal for receiver of the analog signal to be received are decoded, and are sent extremely
Field flyback data processor 47；
The field flyback data processor 47, for decoded analog signal to be inserted into data row, and send to described
Memory 48 is stored；
The memory 48, for storing the data after field flyback data processor processes, and send to output format
Converter 49.
The output format converter 49, for signal format to be changed, and export to data logger 410；
The data logger 410 carries out color output and the output of lvds vision signals simultaneously.
The controller 411, for control receiver of the analog signal 41, digit signal receiver 42, analog-digital converter 43,
Multiplexer 44, image border smoothing processor 45, Video Decoder 46, field flyback data processor 47, memory 48, output lattice
The work of formula converter 49 and data logger 410.
Figure 37 and Figure 38 are referred to, it is respectively the external signal input circuit figure and signal output electricity of display driver chip
Lu Tu.Further, the outside of the display driver chip is provided with：Power port 401, video reception port 402 and video
Signal output port 403；Receiver of the analog signal 41 inside the video reception port 402 and display driver chip and
Data signal receiver 42 connects；The video-out port 403 connects with the data logger 410 inside display driver chip
Connect.
Figure 39 is referred to, it is the partial enlarged drawing of the power port of display driver chip.The power port 401 includes
One 1.2V power pins and 3.3V power pins；The 1.2V pins are circumscribed with two electric capacity in parallel, for filtering
AC signal；The 3.3V is circumscribed with 5 shunt capacitances, for filtering the AC signal of different frequency.
Figure 40 is referred to, it is the partial enlarged drawing of the video input port of display driver chip.The video inputs
Mouth 402 includes two groups of pins, and one group is used to receive the recording signal for recording circuit, and another group is used to receive the video played in real time
Signal.Wherein, pin B5~B8, A5~A8 are used to receive the recording signal for recording circuit, and pin B1~B4, A1~A4 are used to connect
Receive the vision signal played in real time.
Figure 41 is referred to, it is the partial enlarged drawing of the video-out port of display driver chip.The video output terminals
Mouth 403 includes 12 groups of pins, is connected respectively with data logger, for exporting playback vision signal and real time video signals.
The course of work of the image processing circuit of the present invention is described below：
S1：Will be to the picture processing chip, the first signal conversion chip, secondary signal conversion chip, and image enhaucament core
The outside port of piece carries out circuit access according to above-mentioned requirement；
S2：When picture processing chip is powered, first passes through the frequency multiplier and input voltage frequency is subjected to multiplication regulation, with suitable
Should before working frequency；
S3：The data sink 11 for first passing through picture processing chip 10 receives the view data of outside；
S4：Described image processor 13 is handled image.Specifically pass through the Lens Shading Compensation circuit 131 respectively
Shade caused by camera lens is compensated into processing；Pass through the optical detection circuit 132 and the detection image of flash detection circuit 133
Brightness and flashing state, and result of detection is sent to exposure gain circuit；Then increased by the exposure gain circuit 134
Exposure gain size.Finally again by the white balance permanent circuit 35 according to default parameter, carry out the fixed of white balance and adjust
It is whole.
S5：The data logger 14 carries out the view data after processing to export the first signal conversion chip.
S6：The bt1120 that the data reader 212 of the first signal conversion chip receives picture processing chip output is passed
Defeated signal, and send to signal format converter；
S7：The signal format converter 213 is converted to bt1120 vision signals lvds vision signal, and sends extremely
Serializer 214；
S8：The serializer 214 converts parallel data into serial data, and sends to data logger；
S9：The data logger 215, for lvds signal datas to be exported to secondary signal conversion chip.
S10：The lvds videos of the first signal conversion chip are passed by the data reader 222 in secondary signal conversion chip
Defeated signal, and send to signal format converter；
S11：The signal format converter 223 is converted to lvds vision signals bt1120 vision signal, and sends
To deserializer；
S12：The deserializer 224 converts serial data into parallel data, and sends to data logger；
S13：The data logger 225 exports bt1120 video signal datas to image enhaucament chip.
S14：The view data of outside is received by the data sink 31 of image enhaucament chip；
S15：The data sink 31, viewdata signal is received, and sent to de-noising processor 32；
S16：The de-noising processor 32 carries out noise reduction process, then is forwarded to dynamic memory 33.
S17：The dynamic memory 33 is after the view data after receiving de-noising processor 32 and handling, then is forwarded to figure
Image intensifier 34.
S18：Described image booster 34, it includes image border enhancing circuit；Described image edge enhancing circuit increases
The definition of strong image border.View data after processing is first sent to the pixel and adaptively proofreaded by described image booster
Device 35.
S19：The adaptive proofreading equipment 35 of pixel carries out pixel and adapts to check and correction, retransmits to data logger 36.
S20：The data logger 36 is exported the view data after processing to display driver chip 40.
S21：The receiver of the analog signal 41 of the display driver chip 40 receives analog signal, and sends to analog-to-digital conversion
Device 43；
S22：The data signal receiver 42 receives data-signal, and sends to multiplexer 44；
S23：The analog-digital converter 43 converts analog signals into data-signal, and sends to multiplexer 44；
S24：The multiplexer 44 is integrated two paths of signals, and is exported to output image edge-smoothing processor
45；
S25：Described image edge-smoothing processor 45 receives the signal of restorer, and the edge of video image is put down
Sliding processing, is retransmited to format converter 49.
S26：The Video Decoder 46 is decoded the analog signal that receiver of the analog signal receives, and is sent to field
Flyback data processor 47；
S27：The field flyback data processor 47, for decoded analog signal to be inserted into data row, and send extremely
The memory 48 is stored；
S28：The memory 48 stores the data after field flyback data processor processes, and sends to output format and turn
Parallel operation 49.
S29：The output format converter 49 is changed signal format, and is exported to data logger 410；
S30：The data logger 410 carries out color output and the output of lvds vision signals simultaneously.
Compared to prior art, the present invention is entered by increasing by a picture processing chip in camera lens part to the image of collection
Row processing, increases by an image enhaucament chip on main frame backstage, carries out level image enhancing, makes the image that finally exports more clear
It is clear.
First, multiple functional modules are divided into picture processing chip, are coordinated respectively and independently by each functional module
Work, can realize low-power consumption, low-light (level), and can be the picture more high definition of output.Meanwhile further at the image
A white balance permanent circuit is set in reason device, for the white balance parameter to be fixed, without carrying out white balance at work
Regulation, so as to prevent aberration interference phenomenon.
Then, multiple functional modules are also divided into image enhaucament chip, are assisted respectively and independently by each functional module
Work is adjusted, the enhancing processing to image can be realized.Meanwhile further an image border is set to strengthen in the image intensifier
Circuit, to strengthen the definition of image border.
In addition, in order to improve the stability of signal transmission, it is of the invention by the way that bt1120 signals first are converted into lvds signals,
So as to stable transmission, and there is low noise ability.Then, it is being bt1120 signals by lvds signals revivifications, so as to ensure that
The quality of the picture of follow-up play.
The invention is not limited in above-mentioned embodiment, if the various changes or deformation to the present invention do not depart from the present invention
Spirit and scope, if these changes and deformation belong within the scope of the claim and equivalent technologies of the present invention, then this hair
It is bright to be also intended to comprising these changes and deformation.
Claims (9)
1. a kind of image procossing enhancing of medical endoscope and display driver circuit, it is characterised in that：Including picture processing chip,
Signal conversion chip, image enhaucament chip and display driver chip；The signal conversion chip includes the first signal conversion chip
With secondary signal conversion chip；The first signal conversion chip is used to bt1120 signals being converted to lvds signals；Described
Binary signal conversion chip is used to lvds signals being converted to bt1120 signals；Described image process chip believes the image after processing
Number transmission is sent to secondary signal conversion chip to the first signal conversion chip, and by the first signal conversion chip；Described
Binary signal conversion chip is sent to image enhaucament chip after signal is changed；Described image enhancing chip is used for the video to reception
Signal carries out image enhancement processing, retransmits to display driver chip, is driven display；
Described image process chip includes：Data sink, master controller, image processor, data logger；
--- the data sink, it is used for the view data for receiving outside；
--- the master controller, it is used for the trigger signal for receiving outside, and accordingly controls the data sink, image
The working condition of processor and data logger；
--- described image processor, it is used to handle image；Described image processor includes a white balance and fixes electricity
Road, it is used for the fixed adjustment that white balance is carried out according to default parameter；
--- the data logger, it is used to be exported the view data after processing；
The first signal conversion chip includes：Controller, data reader, signal format converter, serializer, data output
Device；
--- the controller, it is used to receiving the trigger signal of outside, and control data reader, signal format converter,
The work of serializer and data logger；
--- the data reader, it is used for the bt1120 transmission signals for receiving outside, and sends to signal format converter；
--- the signal format converter, it is used for the vision signal that bt1120 vision signals are converted to lvds, and sends
To serializer；
--- the serializer, it is used to convert parallel data into serial data, and sends to data logger；
--- the data logger, for lvds signal datas to be exported to secondary signal conversion chip；
The secondary signal conversion chip includes：Controller, data reader, signal format converter, deserializer, data output
Device；
--- the controller, it is used to receiving the trigger signal of outside, and control data reader, signal format converter,
The work of deserializer and data logger；
--- the data reader, it is used for the lvds video transfer signals of the first signal conversion chip, and sends to signal
Format converter；
--- the signal format converter, it is used for the vision signal that lvds vision signals are converted to bt1120, and sends
To deserializer；
--- the deserializer, it is used to convert serial data into parallel data, and sends to data logger；
--- the data logger, for bt1120 video signal datas to be exported；
Described image enhancing chip includes：Data sink, controller, static memory, image intensifier, data logger and
Clock generator；
--- the data sink, it is used to receive viewdata signal, and sends to the image intensifier；
--- the controller, it is used to receiving outer triggering signal, and corresponding control data receiver, image enhaucament its sum
According to the working condition of follower；
--- the static memory, it is used for the driving data of storage image booster, to drive the work of the image intensifier
Make；
--- described image booster, it includes image border enhancing circuit；Described image edge enhancing circuit is used to strengthen
The definition of image border；
--- the data logger, it is used to receive the view data after image intensifier processing, and carries out data output；
--- the clock generator, it is used to produce clock signal for image enhaucament chip；
The display driver chip includes：Receiver of the analog signal, digit signal receiver, analog-digital converter, multiplexer, output
Format converter, data logger and controller；
--- the receiver of the analog signal, for receiving analog signal, and send to analog-digital converter；
--- the analog-digital converter, for converting analog signals into data-signal, and send to multiplexer；
--- the data signal receiver, for receiving data-signal, and send to multiplexer；
--- the multiplexer, for two paths of signals to be integrated, and exported to output format converter；
--- the output format converter, for signal format to be changed, and export to data logger；
--- the data logger, by signal output, and shown；
--- the controller, for controlling receiver of the analog signal, digit signal receiver, analog-digital converter, multiplexer, defeated
Go out the work of format converter and data logger.
2. the image procossing enhancing of medical endoscope and display driver circuit according to claim 1, it is characterised in that：It is described
Picture processing chip also includes a frequency multiplier, and it is used to carry out the frequency of the trigger signal of outside input to double processing, then sends out
Deliver to master controller；
The first signal conversion chip also includes a phase-locked loop, is connected respectively with signal format converter and serializer, uses
In unified integration clock signal；
The secondary signal conversion chip also includes a phase-locked loop, is connected respectively with signal format converter and serializer, uses
In unified integration clock signal；
Described image enhancing chip also includes a de-noising processor；The viewdata signal that the data sink receives, hair
Deliver to de-noising processor and carry out noise reduction process, then be forwarded to image intensifier；
The display driver chip also includes a Video Decoder, field flyback data processor and memory；
The Video Decoder, the analog signal for receiver of the analog signal to be received are decoded, and are sent to field flyback
Data processor；
The field flyback data processor, for decoded analog signal to be inserted into data row, and send to the memory
Stored；
The memory, for storing the data after field flyback data processor processes, and send to output format converter.
3. the image procossing enhancing of medical endoscope and display driver circuit according to claim 2, it is characterised in that：It is described
Image processor also includes an exposure gain circuit, for increasing exposure gain size；
The first signal conversion chip also includes a clock data restorer, and it is connected with data reader, for from transmission
Recover data in the distortion of channel and noise；
The secondary signal conversion chip also includes a clock data restorer, and it is connected with data reader, for from transmission
Recover data in the distortion of channel and noise；
Described image enhancing chip also includes a dynamic memory；View data after the de-noising processor processing, first sends
Stored to dynamic memory, then be forwarded to image intensifier；
The display driver chip also includes an image border smoothing processor, for receiving the signal of restorer, and to video
The edge of image is smoothed, and is retransmited to format converter.
4. the image procossing enhancing of medical endoscope and display driver circuit according to claim 3, it is characterised in that：It is described
Image processor also includes an optical detection circuit and flash detection circuit, and it is used for the brightness of detection image and flashing state,
And result of detection is sent to exposure gain circuit；
Described image enhancing chip also includes the adaptive proofreading equipment of a pixel；Described image booster is first by the picture number after processing
According to sending to the adaptive proofreading equipment of the pixel, pixel is carried out by the adaptive proofreading equipment of the pixel and adapts to check and correction, is retransmited to number
According to follower；
The data logger of the display driver chip carries out color output and the output of lvds vision signals simultaneously.
5. the video acquisition enhancing circuit of medical endoscope according to claim 4, it is characterised in that：Described image strengthens core
Piece also includes a vision signal multiplier and a storage signal multiplier；The clock generator, by caused clock signal point
Do not send to vision signal multiplier and storage signal multiplier, and sent clock signal to number by the vision signal multiplier
According to receiver, clock signal is sent to dynamic memory and static memory by the storage signal multiplier.
6. the image procossing enhancing of medical endoscope and display driver circuit according to claim 1, it is characterised in that：It is described
It is provided with outside picture processing chip：For receiving the power port of supply voltage, the signal receiving end for receiving picture signal
Mouth, the video signal port for exporting vision signal, the row field signal port for exporting row field signal, for receiving outside
The clock signal port of clock signal, the data receiver port for receiving data storage and one are used to receive external communication order
PORT COM；
It is provided with outside the first signal conversion chip：The center processing chip exterior is provided with：For receiving supply voltage
Power port, the receiver port for receiving bt1120 vision signals, the vision signal for exporting lvds vision signals
Port and the row field signal port for exporting row field signal；
It is provided with outside the secondary signal conversion chip：The center processing chip exterior is provided with：For receiving power supply electricity
The power port of pressure, the receiver port for receiving lvds vision signals and the video for exporting bt1120 vision signals
Signal port；
Described image enhancing chip exterior is provided with：For receiving the power port of supply voltage, the letter for receiving picture signal
Number receiving port, the video signal port for exporting vision signal, the row field signal port for exporting row field signal, it is used for
Receive the clock signal port of external timing signal and the data receiver port for receiving data storage；
The outside of the display driver chip is provided with：Power port, video reception port and VT mouth；Institute
Video reception port is stated to be connected with the receiver of the analog signal inside display driver chip and data signal receiver；It is described
Video-out port is connected with the data logger inside display driver chip.
7. the image procossing enhancing of medical endoscope and display driver circuit according to claim 6, it is characterised in that：It is described
The power port of picture processing chip is circumscribed with a filter circuit for being used for voltage stabilizing；The filter circuit is including an inductance and extremely
Few electric capacity；Described inductance one end is connected with external power source, the other end respectively with each capacitance connection, each electric capacity
The other end and ground connection；Power port is accessed in one end of the inductance and capacitance connection；
The power port of described image process chip is circumscribed with a filter circuit for being used for voltage stabilizing；The filter circuit includes one
Inductance and at least one electric capacity；Described inductance one end is connected with external power source, and the other end is described every respectively with each capacitance connection
The other end of individual electric capacity and ground connection；Power port is accessed in one end of the inductance and capacitance connection.
8. the image procossing enhancing of medical endoscope and display driver circuit according to claim 6, it is characterised in that：It is described
The external clock circuit in clock signal port of picture processing chip, it includes a clock and shaken chip；The clock shakes the power supply of chip
End is connected by a filter circuit with power supply, and the shake output end of chip of the clock passes through a debug circuit and the clock signal port
Connection；The filter circuit include be composed in series by an inductance and electric capacity, one end of the inductance is connected with power supply, the other end and
Capacitance connection, and the other end ground connection of the electric capacity；The clock shake chip power end and connection and inductance and electric capacity between；It is described
Debug circuit is made up of resistance and electric capacity；One end of the resistance of the debug circuit and Zhong Zhen output end connect, the other end and electricity
Hold connection, and the other end ground connection of the electric capacity；The clock signal port is connected between the resistance and electric capacity；
Described image strengthens the external clock circuit in clock signal port of chip, and it includes a clock and shaken chip；The clock shakes core
The power end of piece is connected by a filter circuit with power supply, and the shake output end of chip of the clock is connected with the clock signal port；
The filter circuit includes being composed in series by an inductance and electric capacity, and one end of the inductance is connected with power supply, the other end and electric capacity
Connection, and the other end ground connection of the electric capacity.
9. the image procossing enhancing of medical endoscope and display driver circuit according to claim 6, it is characterised in that：It is described
The data receiver port of picture processing chip is circumscribed with a memory circuitry, and it includes a memory, is connected to the memory
The filter circuit of voltage port, and it is connected to the resistance of the output port of the memory.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201001147Y (en) * | 2007-01-10 | 2008-01-02 | 云南金隆伟业科技有限公司 | Network digital camera |
| CN101105097A (en) * | 2007-08-23 | 2008-01-16 | 上海交通大学 | Platform shield door intelligent control method |
| CN101217621A (en) * | 2007-01-05 | 2008-07-09 | 安奇逻辑股份有限公司 | Camera module, electronic apparatus having the same and method of manufacturing the same |
| CN101309430A (en) * | 2008-06-26 | 2008-11-19 | 天津市亚安科技电子有限公司 | Video image preprocessor on basis of FPGA |
| CN101485194A (en) * | 2006-06-30 | 2009-07-15 | 索尼株式会社 | Solid-state image pickup device, data transmitting method and image pickup device |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2805688Y (en) * | 2005-07-07 | 2006-08-16 | 傅强 | Endoscope vidicon with automation, manual enhancement and white balance function |
| CN201229452Y (en) * | 2008-05-30 | 2009-04-29 | 邱环中 | Optical adapter |
| CN101620315A (en) * | 2009-08-10 | 2010-01-06 | 浙江大学 | Electronic endoscope image pick-up device |
| CN201622819U (en) * | 2009-09-21 | 2010-11-03 | 智点科技（深圳）有限公司 | Driving device for touch control FPD |
| JP5612028B2 (en) * | 2012-07-02 | 2014-10-22 | 富士フイルム株式会社 | Light source device and endoscope system |
| CN103607545A (en) * | 2013-11-20 | 2014-02-26 | 四川九洲电器集团有限责任公司 | High definition video acquisition device and working method thereof |
-
2015
- 2015-06-30 CN CN201510385518.6A patent/CN105049675B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101485194A (en) * | 2006-06-30 | 2009-07-15 | 索尼株式会社 | Solid-state image pickup device, data transmitting method and image pickup device |
| CN101217621A (en) * | 2007-01-05 | 2008-07-09 | 安奇逻辑股份有限公司 | Camera module, electronic apparatus having the same and method of manufacturing the same |
| CN201001147Y (en) * | 2007-01-10 | 2008-01-02 | 云南金隆伟业科技有限公司 | Network digital camera |
| CN101105097A (en) * | 2007-08-23 | 2008-01-16 | 上海交通大学 | Platform shield door intelligent control method |
| CN101309430A (en) * | 2008-06-26 | 2008-11-19 | 天津市亚安科技电子有限公司 | Video image preprocessor on basis of FPGA |
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|---|---|
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Denomination of invention: An image processing, enhancement and display driving circuit of medical endoscope Effective date of registration: 20220331 Granted publication date: 20180313 Pledgee: Zengcheng sub branch of Bank of Guangzhou Co.,Ltd. Pledgor: GUANGZHOU SOFTLINK MEDICAL INNOVATION Co. LTO Registration number: Y2022980003649 |
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Denomination of invention: An Image Processing Enhancement and Display Driver Circuit for Medical Endoscopes Effective date of registration: 20230524 Granted publication date: 20180313 Pledgee: Zengcheng sub branch of Bank of Guangzhou Co.,Ltd. Pledgor: GUANGZHOU SOFTLINK MEDICAL INNOVATION Co. LTO Registration number: Y2023980041627 |
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