CN204887166U - A image enhancement , video are recorded and display circuit for medical endoscope - Google Patents
A image enhancement , video are recorded and display circuit for medical endoscope Download PDFInfo
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- CN204887166U CN204887166U CN201520460846.3U CN201520460846U CN204887166U CN 204887166 U CN204887166 U CN 204887166U CN 201520460846 U CN201520460846 U CN 201520460846U CN 204887166 U CN204887166 U CN 204887166U
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Abstract
The utility model relates to an image enhancement, video are recorded and display circuit for medical endoscope, record chip and display driving chip including image enhancement chip, video, the image enhancement chip carries out the humidifying treatment with the video image who receives to sent simultaneously records chip and display driving chip to the video, records the chip by this video and records, is play in real time by this display driving chip, the video is recorded chip completion video and is recorded the back, sends to display driving chip, carries out the video playback. Compare in prior art's defect, the utility model discloses use image enhancement chip, video to record simultaneously and carry out the collaborative work with display driving chip, make the picture of output more clear.
Description
Technical field
The utility model relates to a kind of video recorder circuitry, particularly a kind of image enhaucament for medical endoscope, video record and display circuit.
Background technology
Endoscope is a kind of conventional medicine equipment, is become by flexible part, light source and an arrangement of mirrors head group.Through the natural hole of human body, or the minimal incision * that underwent operative is done enters in human body, during use, endoscope is imported the organ of preliminary examination, directly can spy on the change of relevant portion.
When endoscope is at inside of human body, is divided by the camera lens part of this endoscope and carry out video acquisition, and the transmission of video after gathering is carried out image procossing to main frame backstage, and play in real time.Then, because doctor is in surgical procedure, may need to repeat viewing to some pictures or video.
Meanwhile, after completing video record, the playback carrying out video is also needed to broadcast.And when video carries out driving broadcasting, use conventional video drive playing circuit, often can produce the not smooth problem of video playback.
Wherein, the quality of picture quality directly affects the result of use of endoscope.During owing to carrying out IMAQ in human body, can due to a variety of causes of inside of human body, and cause occurring noise jamming, brightness cannot regulate or cause due to the color of light image to occur aberration automatically, so cause in the image procossing in later stage, being difficult to the image of rediscover, making doctor be difficult to identification when observing.Therefore, need to provide a kind of and strengthen picture quality, carry out video record and drive the circuit of display.
Utility model content
The utility model is that the shortcoming overcoming prior art is with not enough, provides a kind of image enhaucament for medical endoscope, video record and display circuit.
The utility model is achieved through the following technical solutions: a kind of image enhaucament for medical endoscope, video record and display circuit, comprises image enhaucament chip, video record chip and display driver chip; The video image of reception is carried out enhancing process by described image enhaucament chip, and is sent to video record chip and display driver chip simultaneously, is recorded, play in real time by this display driver chip by this video record chip; After described video record chip completes video record, be sent to display driver chip, carry out video playback;
---described image enhaucament chip comprises: data sink, controller, static memory, image intensifier, data logger and clock generator;
---described data sink, it is for receiving viewdata signal, and is sent to this image intensifier;
---described controller, it is for receiving outer triggering signal, and the operating state of corresponding control data receiver, image enhaucament itself and data logger;
---described static memory, it is for the driving data of memory image booster, to drive the work of this image intensifier;
---described image intensifier, it comprises an image border intensifier circuit; Described image border intensifier circuit is for strengthening the definition of image border;
---described data logger, it for receiving the view data after image intensifier process, and carries out data output;
---described clock generator, it is for being image enhaucament chip clocking;
Described video record chip comprises: data sink, video encoder, Video Decoder, data logger and processor;
---described data sink, for receiving outside vision signal, and is sent to video encoder;
---described video encoder, for recording encoding video signal;
---described Video Decoder, for decoding video signal playback;
---described data logger, for exporting vision signal;
---described processor, for the work of control data receiver, video encoder, Video Decoder and data logger;
Described display driver chip comprises: receiver of the analog signal, digit signal receiver, analog to digital converter, multiplexer, output format transducer, data logger and controller;
---described receiver of the analog signal, for receiving analog signal, and is sent to analog to digital converter;
---described analog to digital converter, for analog signal is converted to data-signal, and is sent to multiplexer;
---described data signal receiver, for receiving data-signal, and is sent to multiplexer;
---described multiplexer, for being integrated by two paths of signals, line output of going forward side by side is to output format transducer;
---described output format transducer, for signal format being changed, and exports data logger to;
---described data logger, exports signal, and shows;
---described controller, for the work of control simulation signal receiver, digit signal receiver, analog to digital converter, multiplexer, output format transducer and data logger.
Compared to prior art, the utility model, for the defect of prior art, provides a kind of video recorder circuitry being specifically designed to medical endoscope.Especially by being divided into multiple functional module in control chip, by each functional module independence co-ordination, can realize video record respectively also, reaching can the effect replayed of playback.
Further, the utility model additionally provides a kind of video driver circuit being specifically designed to medical endoscope.Especially by being divided into multiple functional module in control chip, difference also by each functional module independence co-ordination, can realize the effect to video drive, makes broadcasting more smooth clear.
In addition, in order to make the picture of broadcasting more clear, also add the process that image enhaucament chip carries out image, making the final picture exported clear.
Further, described image enhaucament chip also comprises a de-noising processor; The viewdata signal that described data sink receives, is sent to de-noising processor and carries out noise reduction process, then be forwarded to image intensifier.
Further, described image enhaucament chip also comprises a dynamic memory; View data after described de-noising processor process, is first sent to dynamic memory and stores, then be forwarded to image intensifier.
Further, described image enhaucament chip also comprises a pixel self adaptation proofreading equipment; View data after process is first sent to described pixel self adaptation proofreading equipment by described image intensifier, carries out pixel and adapts to check and correction, then be sent to data logger by this pixel self adaptation proofreading equipment.
Further, described image enhaucament chip also comprises a vision signal multiplier and a storage signal multiplier; Described clock generator, the clock signal of generation is sent to respectively vision signal multiplier and storage signal multiplier, and by this vision signal multiplier, clock signal is sent to data sink, by this storage signal multiplier, clock signal is sent to dynamic memory and static memory.
Further, described video record chip also comprises an image processor, processes for the video received data sink, and the image after process is sent to video encoder.
Further, described image processor comprises edge intensifier circuit and the interfered circuit that abates the noise.
Further, described image enhaucament chip exterior is provided with: for receive supply power voltage power port, for receive picture signal receiver port, for outputting video signal video signal port, for export row field signal row field signal port, for receiving the clock signal port of external timing signal and storing the data receiver port of data for receiving;
Described video record chip exterior is provided with: power port, video input port, video-out port and PORT COM; Described video input port is connected with the data sink of this video record chip internal, for receiving outside video data; Described video-out port, is connected with described data logger, for output video data; Described PORT COM, is connected with described processor, for receiving outside serial port command;
Described display driver chip outside is provided with: power port, video input port, video-out port and PORT COM; Described video input port is connected with the data sink of this video record chip internal, for receiving outside video data; Described video-out port, is connected with described data logger, for output video data; Described PORT COM, is connected with described processor, for receiving outside serial port command.
Further, the power port of described image enhaucament chip is circumscribed with one for the filter circuit of voltage stabilizing; Described filter circuit comprises an inductance and at least one electric capacity; Described inductance one end is connected with external power source, and the other end is connected with each electric capacity respectively, the other end of described each electric capacity and ground connection; Power port is accessed in one end that described inductance is connected with electric capacity;
The power port of described video record chip is circumscribed with a filter circuit; Described filter circuit comprises a magnetic bead and at least one electric capacity; Described magnetic bead is connected with one end of electric capacity, and the other end ground connection of this electric capacity; Described power port is connected between magnetic bead and electric capacity;
Described display driver chip power port is circumscribed with a filter circuit; Described filter circuit comprises a magnetic bead and at least one electric capacity; Described magnetic bead is connected with one end of electric capacity, and the other end ground connection of this electric capacity; Described power port is connected between magnetic bead and electric capacity.
Further, described display driver chip also comprises a Video Decoder, field flyback data processor and memory;
Described Video Decoder, decodes for the analog signal received by receiver of the analog signal, and is sent to field flyback data processor;
Described field flyback data processor, for by capable for decoded analog signal data inserting, and be sent to described memory and store;
Described memory, for storing the data after field flyback data processor processes, and is sent to output format transducer.
In order to understand better and implement, describe the utility model in detail below in conjunction with accompanying drawing.
Accompanying drawing explanation
Fig. 1 is the connection diagram of image enhaucament chip of the present utility model and video record chip.
Fig. 2 is the internal module connection diagram of image enhaucament chip.
Fig. 3 is the outside connecting circuit figure of Part I of image enhaucament chip.
Fig. 4 is the outside connecting circuit figure of Part II of image enhaucament chip.
Fig. 5 is the circuit diagram of the filter circuit of pressure-stabilizing of the 3.3V voltage of image enhaucament chip.
Fig. 6 is the power-switching circuit figure that the 3.3V of image enhaucament chip is converted to 1.8V.
Fig. 7 is the power-switching circuit figure that the 3.3V of image enhaucament chip is converted to 1.2V.
Fig. 8 is the partial enlarged drawing of the receiver port of image enhaucament chip.
Fig. 9 a is the partial enlarged drawing of the video signal port of the Part I of image enhaucament chip.
Fig. 9 b is the partial enlarged drawing of the video signal port of the Part II of image enhaucament chip.
Figure 10 is the circuit diagram of the clock circuit of image enhaucament chip.
Figure 11 is the partial enlarged drawing of the row field signal port of image enhaucament chip.
Figure 12 is the internal components connection diagram of video record chip.
Figure 13 is the video input circuit figure of video record chip.
Figure 14 is the video output circuit figure of video record chip.
Figure 15 be video record chip with communication input circuit figure.
Figure 16 is the partial enlarged drawing of the power port of video record chip.
Figure 17 is the partial enlarged drawing of the PORT COM of video record chip.
Figure 18 is the internal components connection diagram of display driver chip.
Figure 19 is the external signal input circuit figure of display driver chip.
Figure 20 is the external signal output circuit figure of display driver chip.
Figure 21 is the partial enlarged drawing of the power port of display driver chip.
Figure 22 is the partial enlarged drawing of the video input port of display driver chip.
Figure 23 is the partial enlarged drawing of the video-out port of display driver chip.
Embodiment
Refer to Fig. 1, its be image enhaucament chip of the present utility model, video record chip and connection diagram.The utility model provides a kind of image enhaucament for medical endoscope, video record and display circuit, comprises image enhaucament chip 10, video record chip 20 and display driver chip 30; The video image of reception is carried out enhancing process by described image enhaucament chip 10, and is sent to video record chip 20 and display driver chip 30 simultaneously, is recorded, play in real time by this display driver chip 30 by this video record chip 20; After described video record chip 20 completes video record, be sent to display driver chip 30, carry out video playback.
Refer to Fig. 2, it is the internal module connection diagram of image enhaucament chip.Described image enhaucament chip comprises: data sink 11, de-noising processor 12, dynamic memory 13, image intensifier 14, pixel self adaptation proofreading equipment 15, data logger 16, static memory 17, controller 18, vision signal multiplier 19, storage signal multiplier 110, clock generator 111.
Described data sink 11, it is for receiving viewdata signal, and is sent to de-noising processor 12;
The viewdata signal that described data sink 11 receives, is sent to de-noising processor 12 and carries out noise reduction process, then be forwarded to dynamic memory 13.
After the view data of described dynamic memory 13 after receiving de-noising processor 12 process, then be forwarded to image intensifier 14.
Described image intensifier 14, it comprises an image border intensifier circuit; Described image border intensifier circuit is for strengthening the definition of image border.Further, the view data after process is first sent to described pixel self adaptation proofreading equipment 15 by described image intensifier, carries out pixel and adapts to check and correction, then be sent to data logger 16 by this pixel self adaptation proofreading equipment 15.
Described data logger 16, it for receiving the view data after image intensifier process, and carries out data output;
Described static memory 17, it is for the driving data of memory image booster, to drive the work of this image intensifier;
Described controller 18, it is for receiving outer triggering signal, and the operating state of corresponding control data receiver, image enhaucament itself and data logger;
Described clock generator 111, it is for being image enhaucament chip clocking.Further, described clock generator, the clock signal of generation is sent to respectively vision signal multiplier 19 and storage signal multiplier 110, and by this vision signal multiplier 9, clock signal is sent to data sink, by this storage signal multiplier 110, clock signal is sent to dynamic memory and static memory.
Please refer to Fig. 3 and Fig. 4, it is respectively the outside connecting circuit figure of image enhaucament chip of the present utility model.
Further, described image enhaucament chip exterior is provided with: for receive supply power voltage power port, for receive picture signal receiver port 101, for outputting video signal video signal port 102, for receive external timing signal clock signal port 103, for exporting the row field signal port one 04 of row field signal.
Concrete, in the present embodiment, the external voltage of described power port comprises 3.3V, 1.8V and 1.2V tri-kinds of voltages.Refer to Fig. 5, it is the circuit diagram of the filter circuit of pressure-stabilizing of 3.3V voltage.Described filter circuit comprises an inductance and at least one electric capacity; Described inductance one end is connected with external power source, and the other end is connected with each electric capacity respectively, the other end of described each electric capacity and ground connection; Power port is accessed in one end that described inductance is connected with electric capacity.
It is respectively the change-over circuit figure that power-switching circuit figure and 3.3V that 3.3V is converted to 1.8V is converted to 1.2V to refer to Fig. 6-7.In the present embodiment, by a power-switching circuit, the voltage of 3.3V is converted to respectively the voltage of 1.8V and 1.2V.Concrete, described power-switching circuit comprises a power conversion chip; The voltage of the input access 3.3V of described power conversion chip, output exports the voltage of 1.8V and 1.2V respectively, to power to image enhaucament chip.
Refer to Fig. 8, it is the partial enlarged drawing of the receiver port of image enhaucament chip.Described receiver port 101 comprises 20 signal pins, is connected with the data sink 11 of inside, for receiving the picture signal of input.
Refer to Fig. 9 a and Fig. 9 b, it is the video signal port Part I of image enhaucament chip and the partial enlarged drawing of Part II.Described video signal port 102 comprises 20 signal pins, and it is connected, for output image signal with inner data logger 16.
Refer to Figure 10, it is the circuit diagram of the clock circuit of image enhaucament chip.Further, the external clock circuit of described clock signal port 103, it comprises a clock and to shake chip; The shake power end of chip of described clock is connected with power supply by a filter circuit, and the shake output of chip of this clock is connected with described clock signal port; Described filter circuit comprises and being made up of an inductance and capacitances in series, and one end of described inductance is connected with power supply, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity.
Refer to Figure 11, it is the partial enlarged drawing of the row field signal port of image enhaucament chip.Described row field signal port one 04 comprises a row signal pins and a field signal pin.Described row field signal port one 04 is for controlling frequency and the order of video frequency output.Such as: the display frequency of vision signal on screen and DISPLAY ORDER can be controlled, can be from every line output under upper, also can be export from left to right.
Refer to Figure 12, it is the internal components connection diagram of video record chip.Described video record chip comprises: data sink 21, image processor 22, video encoder 23, Video Decoder 24, data logger 25 and processor 26;
Described data sink 21, for receiving outside vision signal, and is sent to image processor;
Described image processor 22, the video sent for receiving data sink carries out, and processes video image, then is sent to video encoder; Wherein, described image processor comprises the edge intensifier circuit of the definition for strengthening image border and the interfered circuit that abates the noise for erasure signal interference.
Described video encoder 23, for recording encoding video signal;
Described Video Decoder 24, for decoding video signal playback;
Described data logger 25, for exporting vision signal;
Described processor 26, for the work of control data receiver 21, image processor 22, video encoder 23, Video Decoder 24 and data logger 25.
Refer to Figure 13-15, it is the video input of video record chip, video frequency output and communication input circuit figure.Further, described video record chip exterior is provided with: power port 201, video input port 202, video-out port 203 and PORT COM 204.Described video input port is connected with the data sink of this video record chip internal, for receiving outside video data; Described video-out port, is connected with described data logger, for output video data; Described PORT COM, is connected with described processor, for receiving outside serial port command.
Refer to Figure 16, it is the partial enlarged drawing of the power port of video record chip.Described power port 201 is circumscribed with a filter circuit; Described filter circuit comprises a magnetic bead and at least one electric capacity; Described magnetic bead is connected with one end of electric capacity, and the other end ground connection of this electric capacity; Described power port is connected between magnetic bead and electric capacity.
Refer to Figure 17, it is the partial enlarged drawing of the PORT COM of video record chip.Described PORT COM 204 includes two pins, carries out communication as serial ports and external command.By the mode of serial communication, the data wire of use is few, can save communications cost.
Refer to Figure 18, it is the internal components connection diagram of display driver chip.Described display driver chip comprises: receiver of the analog signal 31, digit signal receiver 32, analog to digital converter 33, multiplexer 34, image border smoothing processor 35, Video Decoder 36, field flyback data processor 37, memory 38, output format transducer 39, data logger 310 and controller 311.
Described receiver of the analog signal 31, for receiving analog signal, and is sent to analog to digital converter 33;
Described data signal receiver 32, for receiving data-signal, and is sent to multiplexer 34;
Described analog to digital converter 33, for analog signal is converted to data-signal, and is sent to multiplexer 34;
Described multiplexer 34, for being integrated by two paths of signals, line output of going forward side by side is to output image edge-smoothing processor 35;
Described image border smoothing processor 35, for receiving the signal of restorer, and to the smoothing process in the edge of video image, then is sent to format converter 39.
Described Video Decoder 36, decodes for the analog signal received by receiver of the analog signal, and is sent to field flyback data processor 37;
Described field flyback data processor 37, for by capable for decoded analog signal data inserting, and be sent to described memory 38 and store;
Described memory 38, for storing the data after field flyback data processor processes, and is sent to output format transducer 39.
Described output format transducer 39, for signal format being changed, and exports data logger 310 to;
Described data logger 310 carries out color simultaneously and exports and the output of lvds vision signal.
Described controller 311, for the work of control simulation signal receiver 31, digit signal receiver 32, analog to digital converter 33, multiplexer 34, image border smoothing processor 35, Video Decoder 36, field flyback data processor 37, memory 38, output format transducer 39 and data logger 310.
Refer to Figure 19 and Figure 20, it is respectively external signal input circuit figure and the signal output apparatus figure of display driver chip.Further, the outside of described display driver chip is provided with: power port 301, video reception port 302 and VT mouth 303; Receiver of the analog signal 31 and the data signal receiver 32 of described video reception port 302 and display driver chip inside are connected; Described video-out port 303 is connected with the data logger 310 of display driver chip inside.
Refer to Figure 21, it is the partial enlarged drawing of the power port of display driver chip.Described power port 301 comprises the power pins of a 1.2V and the power pins of 3.3V; Described 1.2V pin is circumscribed with two electric capacity in parallel, for filtering AC signal; Described 3.3V is circumscribed with 5 shunt capacitances, for filtering the AC signal of different frequency.
Refer to Figure 22, it is the partial enlarged drawing of the video input port of display driver chip.Described video input port 302 comprises two groups of pins, and record the recording signal of circuit for receiving for one group, another group is for receiving the vision signal play in real time.Wherein, pin B5 ~ B8, A5 ~ A8 record the recording signal of circuit for receiving, and pin B1 ~ B4, A1 ~ A4 are for receiving the vision signal play in real time.
Refer to Figure 23, it is the partial enlarged drawing of the video-out port of display driver chip.Described video-out port 303 comprises 12 groups of pins, is connected respectively with data logger, for exporting playback video signal and real time video signals.
Below the course of work of Image Enhancement Circuit of the present utility model is described:
S1: carry out circuit access according to above-mentioned requirement by the outside port of this image enhaucament chip and video record chip;
S2: described data sink 11 receives outside view data;
S3: reception viewdata signal is sent to de-noising processor 12 by described data sink 11;
S4: described de-noising processor 12 carries out noise reduction process, then is forwarded to dynamic memory 13.
S5: after the view data of described dynamic memory 13 after receiving de-noising processor 12 process, then be forwarded to image intensifier 14.
S6: described image intensifier 14, it comprises an image border intensifier circuit; Described image border intensifier circuit is for strengthening the definition of image border.View data after process is first sent to described pixel self adaptation proofreading equipment 15 by described image intensifier.
S7: described pixel self adaptation proofreading equipment 15 carries out pixel and adapts to check and correction, then is sent to data logger 16.
S8: described data logger 16 exports the view data after process to video record chip and display driver chip respectively.
S9: by the described data sink 21 of video record chip in receiving outside vision signal, and be sent to image processor 22;
S10: the video that described image processor 22 receives data sink transmission carries out, and processes video image, then is sent to video encoder 23; Wherein, described image processor comprises the edge intensifier circuit of the definition for strengthening image border and the interfered circuit that abates the noise for erasure signal interference.
S11: described video encoder 23 pairs of encoding video signals are recorded;
S12: when receiving external communication order, the 24 pairs of decoding video signal playback of described Video Decoder, and be sent to data logger;
S13: described data logger 25 pairs of vision signals export display driver chip to.
S14: the receiver of the analog signal 31 of described display driver chip receives analog signal, and is sent to analog to digital converter 33;
S15: described data signal receiver 32 receives data-signal, and is sent to multiplexer 34;
S16: analog signal is converted to data-signal by described analog to digital converter 33, and is sent to multiplexer 34;
S17: two paths of signals is integrated by described multiplexer 34, line output of going forward side by side is to output image edge-smoothing processor 35;
S18: described image border smoothing processor 35 receives the signal of restorer, and to the smoothing process in the edge of video image, then be sent to format converter 39.
S19: the analog signal that receiver of the analog signal receives is decoded by described Video Decoder 36, and is sent to field flyback data processor 37;
S20: described field flyback data processor 37, for by capable for decoded analog signal data inserting, and be sent to described memory 38 and store;
S21: described memory 38 stores the data after field flyback data processor processes, and is sent to output format transducer 39.
S22: described output format transducer 39, for signal format being changed, and exports data logger 310 to;
S23: described data logger 310 carries out color simultaneously and exports and the output of lvds vision signal.
The utility model is not limited to above-mentioned execution mode, if do not depart from spirit and scope of the present utility model to various change of the present utility model or distortion, if these are changed and distortion belongs within claim of the present utility model and equivalent technologies scope, then the utility model is also intended to comprise these changes and distortion.
Claims (10)
1., for the image enhaucament of medical endoscope, video record and a display circuit, it is characterized in that: comprise image enhaucament chip, video record chip and display driver chip; The video image of reception is carried out enhancing process by described image enhaucament chip, and is sent to video record chip and display driver chip simultaneously, is recorded, play in real time by this display driver chip by this video record chip; After described video record chip completes video record, be sent to display driver chip, carry out video playback;
---described image enhaucament chip comprises: data sink, controller, static memory, image intensifier, data logger and clock generator;
---described data sink, it is for receiving viewdata signal, and is sent to this image intensifier;
---described controller, it is for receiving outer triggering signal, and the operating state of corresponding control data receiver, image enhaucament itself and data logger;
---described static memory, it is for the driving data of memory image booster, to drive the work of this image intensifier;
---described image intensifier, it comprises an image border intensifier circuit; Described image border intensifier circuit is for strengthening the definition of image border;
---described data logger, it for receiving the view data after image intensifier process, and carries out data output;
---described clock generator, it is for being image enhaucament chip clocking;
Described video record chip comprises: data sink, video encoder, Video Decoder, data logger and processor;
---described data sink, for receiving outside vision signal, and is sent to video encoder;
---described video encoder, for recording encoding video signal;
---described Video Decoder, for decoding video signal playback;
---described data logger, for exporting vision signal;
---described processor, for the work of control data receiver, video encoder, Video Decoder and data logger;
Described display driver chip comprises: receiver of the analog signal, digit signal receiver, analog to digital converter, multiplexer, output format transducer, data logger and controller;
---described receiver of the analog signal, for receiving analog signal, and is sent to analog to digital converter;
---described analog to digital converter, for analog signal is converted to data-signal, and is sent to multiplexer;
---described data signal receiver, for receiving data-signal, and is sent to multiplexer;
---described multiplexer, for being integrated by two paths of signals, line output of going forward side by side is to output format transducer;
---described output format transducer, for signal format being changed, and exports data logger to;
---described data logger, exports signal, and shows;
---described controller, for the work of control simulation signal receiver, digit signal receiver, analog to digital converter, multiplexer, output format transducer and data logger.
2., according to claim 1 for the circuit of the image enhaucament of medical endoscope, video record and display, it is characterized in that: described image enhaucament chip also comprises a de-noising processor; The viewdata signal that described data sink receives, is sent to de-noising processor and carries out noise reduction process, then be forwarded to image intensifier.
3., according to claim 2 for the circuit of the image enhaucament of medical endoscope, video record and display, it is characterized in that: described image enhaucament chip also comprises a dynamic memory; View data after described de-noising processor process, is first sent to dynamic memory and stores, then be forwarded to image intensifier.
4., according to claim 3 for the circuit of the image enhaucament of medical endoscope, video record and display, it is characterized in that: described image enhaucament chip also comprises a pixel self adaptation proofreading equipment; View data after process is first sent to described pixel self adaptation proofreading equipment by described image intensifier, carries out pixel and adapts to check and correction, then be sent to data logger by this pixel self adaptation proofreading equipment.
5., according to claim 4 for the circuit of the image enhaucament of medical endoscope, video record and display, it is characterized in that: described image enhaucament chip also comprises a vision signal multiplier and a storage signal multiplier; Described clock generator, the clock signal of generation is sent to respectively vision signal multiplier and storage signal multiplier, and by this vision signal multiplier, clock signal is sent to data sink, by this storage signal multiplier, clock signal is sent to dynamic memory and static memory.
6. according to claim 1 for the circuit of the image enhaucament of medical endoscope, video record and display, it is characterized in that: described video record chip also comprises an image processor, video for receiving data sink processes, and the image after process is sent to video encoder.
7., according to claim 6 for the circuit of the image enhaucament of medical endoscope, video record and display, it is characterized in that: described image processor comprises edge intensifier circuit and the interfered circuit that abates the noise.
8., according to claim 7 for the circuit of the image enhaucament of medical endoscope, video record and display, it is characterized in that: described image enhaucament chip exterior is provided with: for receive supply power voltage power port, for receive picture signal receiver port, for outputting video signal video signal port, for export row field signal row field signal port, for receive external timing signal clock signal port and for receiving the data receiver port storing data;
Described video record chip exterior is provided with: power port, video input port, video-out port and PORT COM; Described video input port is connected with the data sink of this video record chip internal, for receiving outside video data; Described video-out port, is connected with described data logger, for output video data; Described PORT COM, is connected with described processor, for receiving outside serial port command;
Described display driver chip outside is provided with: power port, video input port, video-out port and PORT COM; Described video input port is connected with the data sink of this video record chip internal, for receiving outside video data;
Described video-out port, is connected with described data logger, for output video data; Described PORT COM, is connected with described processor, for receiving outside serial port command.
9. according to claim 8 for the circuit of the image enhaucament of medical endoscope, video record and display, it is characterized in that: the power port of described image enhaucament chip is circumscribed with one for the filter circuit of voltage stabilizing; Described filter circuit comprises an inductance and at least one electric capacity; Described inductance one end is connected with external power source, and the other end is connected with each electric capacity respectively, the other end of described each electric capacity and ground connection; Power port is accessed in one end that described inductance is connected with electric capacity;
The power port of described video record chip is circumscribed with a filter circuit; Described filter circuit comprises a magnetic bead and at least one electric capacity; Described magnetic bead is connected with one end of electric capacity, and the other end ground connection of this electric capacity; Described power port is connected between magnetic bead and electric capacity;
Described display driver chip power port is circumscribed with a filter circuit; Described filter circuit comprises a magnetic bead and at least one electric capacity; Described magnetic bead is connected with one end of electric capacity, and the other end ground connection of this electric capacity; Described power port is connected between magnetic bead and electric capacity.
10., according to claim 1 for the circuit of the image enhaucament of medical endoscope, video record and display, it is characterized in that: described display driver chip also comprises a Video Decoder, field flyback data processor and memory;
Described Video Decoder, decodes for the analog signal received by receiver of the analog signal, and is sent to field flyback data processor;
Described field flyback data processor, for by capable for decoded analog signal data inserting, and be sent to described memory and store;
Described memory, for storing the data after field flyback data processor processes, and is sent to output format transducer.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105430241A (en) * | 2015-06-30 | 2016-03-23 | 广东实联医疗器械有限公司 | Image enhancement, video recording and display circuit for medical endoscope |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105430241A (en) * | 2015-06-30 | 2016-03-23 | 广东实联医疗器械有限公司 | Image enhancement, video recording and display circuit for medical endoscope |
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