CN104981900A - 半导体芯片组件及制造其的方法 - Google Patents

半导体芯片组件及制造其的方法 Download PDF

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Publication number
CN104981900A
CN104981900A CN201480006563.XA CN201480006563A CN104981900A CN 104981900 A CN104981900 A CN 104981900A CN 201480006563 A CN201480006563 A CN 201480006563A CN 104981900 A CN104981900 A CN 104981900A
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connection substrate
chip
contact surface
joint face
described connection
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CN104981900B (zh
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加西姆·阿兹达什
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Pac Tech Packaging Technologies GmbH
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Pac Tech Packaging Technologies GmbH
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    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/005Soldering by means of radiant energy
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Abstract

本发明涉及一种芯片组件(18),其具有连接基板(12)及布置在连接基板上的多个半导体基板(1),特别为芯片,其中布置在芯片(1)的接触表面上的连接表面(5)被连接至连接基板(12)的接触表面(14)上的连接表面(5),其中芯片(1)的侧边缘平行于连接基板(12)的接触表面延伸,芯片(1)的接触表面横向于连接基板(12)的接触表面延伸,布置在连接基板中的贯穿连接件(13)将布置在外部接触侧上的外部接触部(15)与在连接基板的接触表面上设计成内部接触部(14)的接触表面相连接,与侧边缘相邻的芯片(1)的连接表面通过重熔焊接材料沉积物(16)连接至连接基板的内部接触部。此外,本发明涉及一种用于制造芯片组件(18)的方法。

Description

半导体芯片组件及制造其的方法
技术领域
本发明涉于一种芯片组件,其包括连接基板及布置在连接基板上的多个半导体基板,其中,布置在半导体基板的接触表面上的连接面连接到连接基板的接触表面上的连接面。
背景技术
随着电子装置的微小化的提升,对其中所使用的电子元件的集成度的需求也随之提升。这特别应用于内存元件或扩展内存,其典型地由通过共用接触基板来电性接触的多个内存芯片所组成。
根据德国专利公开号第196 26 126 A1,图1中示意性示出的芯片组件是已知的,其以三明治的方式形成层叠布置,包含了交替布置的芯片1和中间布置的黏合层2,其一方面用于层叠布置的机械黏聚,另一方面允许单个芯片1彼此明确界定间隔。在芯片的层叠布置的一侧,设置配备了单个的导体路径4的接触导体基板3,导体路径4允许芯片1的连接面5与连接基板6电性接触,连接基板6分别划定了层叠布置的顶端及底端,且其连接接触部7作为芯片组件的外部接触部。焊接连接部8被提供用于产生芯片1的连接面5与接触导体基板3的导体路径4之间的电性接触。
鉴于图1所示芯片组件的复杂结构,很明显地,芯片组件的生产也相应地复杂,包含了多个连续的方法步骤,这使得必须使用不同的工具来制造层叠布置,其中芯片1布置在彼此的顶端且通过黏合层2彼此隔开;以及制造在芯片1的连接面5与接触导体基板3的导体路径4之间的焊接连接部8。
发明内容
从现有技术水平起,本发明的目标是提出一种可以轻易地制造的芯片组件,并提出一种允许轻易制造芯片组件的方法。
所述目标是通过具有权利要求1的特征的芯片组件及通过具有权利要求7的特征的制造芯片组件的方法来达成。
在根据本发明的芯片组件中,芯片通过侧向边缘平行于连接基板的接触表面且通过芯片的接触表面横向于连接基板的接触表面而延伸,其中贯穿连接件布置在连接基板中,贯穿连接件将布置在外部接触侧上的外部接触部连接至形成为在连接基板的接触表面上的内部接触部的连接面,其中相邻于侧向边缘布置的半导体基板的连接面通过重熔焊接材料沉积物的方式连接于连接基板的内部接触部。因此,根据本发明的芯片组件允许芯片的列布置,芯片仅在侧向边缘被连接于连接基板。
优选地,连接基板的内部接触部及芯片的连接面以它们形成空间角落的方式相对于彼此布置,使得仅被布置在连接基板的内部接触部上的焊接材料沉积物的重熔允许芯片的连接面的浸润。
优选地,形成在内部接触部与连接面之间的空间角落具有在30°和150°之间的角落角度α,其中60°和120°之间且特别是90°的角落角度允许芯片组件特别紧密地形成。
如果芯片的侧向边缘及连接基板的接触表面通过填充间隙彼此间隔开,则所述填充间隙可用模制材料填充从而产生在芯片和连接基板之间的特别耐用的机械连接。
在根据本发明的用于制造包含连接基板及布置在连接基板上的多个半导体基板(特别是芯片)的芯片组件的方法中,其中布置在半导体基板的接触表面的连接面连接于连接基板的接触表面上的连接面,以相邻于侧向边缘布置的芯片的连接面被分配至连接基板的连接面的方式,芯片通过侧向边缘平行于连接基板的接触表面且通过它们的接触表面横向于连接基板的接触表面而被定位,连接基板的接触表面形成内部接触部,且通过形成在连接基板内的贯穿连接件连接于布置在连接基板的外部接触侧上的外部接触部,内部接触部通过重熔焊接材料沉积物的方式被顺序地连接于连接面。
如果焊接材料沉积物被布置在连接基板的内部接触部上,从而产生在芯片的连接面与连接基板的内部接触部之间的连接,那么可省略焊接材料到多个芯片的应用。取而代之的是,焊接材料沉积物仅需被应用到连接基板的内部接触部,其在本文中还可能位于适合芯片放置的位置处。
如果在半导体基板被定位在连接基板的接触表面上之前,焊接材料沉积物被布置在连接基板的内部接触部上,那么焊接材料的应用不受先前定位的芯片的阻碍。
特别有利的是,芯片在连接基板的接触表面上的定位通过放置工具以放置工具拾起芯片的方式进行,相对连接基板对应于所期望位置取向,且被保持在所述位置。
优选地,芯片以填充间隙形成在芯片的侧向边缘与连接基板的接触表面之间的方式保持在位。
特别优选的是,芯片以如下形式被定位:连接基板的内部接触部与芯片的连接面以其间形成角落角度α的方式相对于彼此布置。
优选地,芯片通过负压保持。
如果用于产生连接基板的内部接触部与芯片的连接面之间的连接的焊接材料沉积物的重熔发生在芯片定位时,则定位和重熔可以在共同的方法步骤中进行。
优选地,焊接材料沉积物通过激光能量以激光辐射穿过放置工具来冲击焊接材料沉积物的方式被重熔。
为了特别容易形成芯片的列配置,芯片在连接基板的接触表面上的定位以及芯片的连接面与连接基板的内部接触部的连接以在平行于连接基板的接触表面的放置方向上一个接一个将芯片定位及连接于连接基板的方式依次地进行。
附图说明
下文将结合附图对本发明进行更详细地解释,其中将特别详细地阐述根据本发明的用于制造芯片组件的方法。在附图中:
图1示出根据现有技术的芯片组件;
图2示出适合用于芯片组件的制造的放置工具的示例性实施例;
图3示出放置工具的纵剖视图;
图4示出芯片组件的连接基板;
图5示出在图4中所示的连接基板上的芯片的定位;
图6示出在放置方向上在连接基板上的连续定位的芯片;
图7示出设有模制化合物的芯片组件。
具体实施方式
在图4至图7中,示出了用于制造芯片组件18的连续的方法步骤,芯片组件18设有模制材料17,从而形成壳体,其中,首先提供图4所示的连接基板12,连接基板12配备了贯穿连接件13,用于产生布置在连接基板12的接触表面上的内部接触部14与布置在连接基板12的外部接触侧的外部接触部15之间的导电连接。
在图2和图3中,用于制造图7中描绘的芯片组件18的放置工具9被以等轴视图及剖视图所示。在导管的末端,放置工具9包括带有定位框架11的窗口开口10,如图3所示,定位框架11允许芯片1在窗口开口10中精确定位。放置工具9的导管允许容纳在定位框架11中的芯片1通过负压U的冲击,以及允许芯片1通过激光辐射L的冲击。
负压U使芯片1被牢固地保持在定位框架11上。通过激光辐射L的芯片1的冲击使芯片1的硅体能够被加热,因此连接面5也以界定的形式布置在芯片1的接触表面上。
如图4所示,连接基板12的内部接触部14设有焊接材料沉积物16,以便为了随后与芯片1的连接面5接触作准备。
如图5和图6所示,首先将芯片1布置在连接基板12的边缘上,接着单个的芯片1被依次地接触,其中每个单个芯片1由放置工具9通过负压U拾取,且以内部接触部14和连接面5相对彼此布置使得它们形成空间角落的方式相对于连接基板12在对应其所期望的位置取向,其中,在目前的情况下,90°的角落角度α分别形成在内部接触部14和连接面5之间。在这种相对位置,至少部分焊接材料沉积物16的重熔通过发射激光辐射L的能量源进行,使得在短期重熔后,通过焊接材料沉积物16形成的焊接连接8快速凝固。
随后,如图6所示,其它芯片1一个接一个连续地通过放置工具9被定位及接触,从而形成芯片1的列布置。在此工序中,芯片1被定位成使得填充间隙20形成在芯片的侧向边缘21及连接基板12的接触表面之间,如图7所示,一旦完成芯片1的列布置,填充间隙20被模制材料17填充。
因此,放置工具9允许芯片1在连接基板12上的界定定位及焊接材料沉积物16的重熔两者,用于产生在连接基板12的内部接触部14与芯片1的连接面5之间的焊接连接8。在这种方式中,芯片1在连接基板12上的布置及导电连接的产生通过焊接材料沉积物16的重熔而进行,从而在共同方法步骤中形成焊接连接8,而不是如参照图1描述的现有技术的情况中用两种不同的工具依次进行。
如图6所示,所有芯片1依次地布置在连接基板12上,并以导电的方式连接至连接基板12,其中,随着焊接材料沉积物16的重熔,芯片1被放置工具9保持直到焊接材料已凝固成为焊接连接8,使得单个芯片1之间不如图1中所示的现有技术的情况下需要黏合层2来固定芯片1的相对布置。
如图7所示,一旦完成了在连接基板12上放置所期望数量的芯片1,则连接基板12和芯片1的气封复合构造可通过应用于连接基板12的模制材料17来制造。

Claims (17)

1.一种芯片组件(18),其包含连接基板(12)及布置在所述连接基板上的多个半导体基板,半导体基板特别为芯片(1),其中布置在所述芯片的接触表面上的连接面(5)连接至在所述连接基板的接触表面上的连接面,其特征在于,
所述芯片通过侧向边缘平行于所述连接基板的接触表面且通过接触表面横向于所述连接基板的接触表面而延伸,其中贯穿连接件(13)布置在所述连接基板中,所述贯穿连接件连接布置在外部接触侧上的外部接触部(15)与在所述连接基板的接触表面上形成作为内部接触部(14)的连接面,其中相邻于所述侧向边缘布置的所述芯片的连接面通过重熔的焊接材料沉积物(16)连接至所述连接基板的所述内部接触部。
2.根据权利要求1所述的芯片组件,其特征在于,
所述连接基板(12)的所述内部接触部(14)与所述芯片(1)的连接面(5)以形成空间角落的方式相对于彼此布置。
3.根据权利要求2所述的芯片组件,其特征在于,
形成在所述内部接触部(14)与所述连接面(5)之间的所述空间角落具有在30°和150°之间的角落角度α。
4.根据权利要求3所述的芯片组件,其特征在于,
所述角落角度α在60°和120°之间。
5.根据权利要求4所述的芯片组件,其特征在于,
所述角落角度α是90°。
6.根据上述权利要求中任一项所述的芯片组件,其特征在于,
所述芯片(1)的所述侧向边缘与所述连接基板(12)的所述接触表面通过填充间隙(20)而彼此间隔开。
7.一种用于制造芯片组件(18)的方法,所述芯片组件(18)包含连接基板(12)及布置在所述连接基板上的多个半导体基板,半导体基板特别为芯片(1),其中布置在所述芯片的接触表面上的连接面(5)连接于所述连接基板的接触表面上的连接面,其特征在于,
以相邻于侧向边缘(21)布置的所述芯片的连接面被分配给所述连接基板的形成内部接触部(14)的连接面的方式,所述芯片通过所述侧向边缘(21)平行于所述连接基板的接触表面且通过接触表面横向于所述连接基板的接触表面而被定位,所述连接面通过形成在所述连接基板内的贯穿连接件(13)被连接至布置在所述连接基板的外部接触侧上的外部接触部(15),所述内部接触部通过重熔的焊接材料沉积物(16)顺序地连接至所述连接面。
8.根据权利要求7所述的方法,其特征在于,
在所述芯片(1)的连接面(5)与所述连接基板(12)的所述内部接触部(14)之间的连接产生之前,所述焊接材料沉积物(16)布置在所述连接基板的所述内部接触部上。
9.根据权利要求8所述的方法,其特征在于,
在所述芯片(1)被定位在所述连接基板的接触表面上之前,将所述焊接材料沉积物(16)布置在所述连接基板(12)的所述内部接触部(14)上。
10.根据权利要求7至9中任一项所述的方法,其特征在于,
通过放置工具(9)以所述芯片由所述放置工具拾起的方式,所述芯片(1)被定位在所述连接基板(12)的接触表面上,以对应于所期望的位置朝向所述连接基板取向,且保持在所述位置中。
11.根据权利要求10所述的方法,其特征在于,
所述芯片(1)以填充间隙(20)形成在所述芯片的所述侧向边缘(21)与所述连接基板(12)的接触表面之间的方式保持在位。
12.根据权利要求7至11中任一项所述的方法,其特征在于,
所述芯片(1)的定位以所述连接基板(12)的所述内部接触部(14)与所述芯片(1)的连接面(5)以在其间形成角落角度α的方式相对于彼此布置的方式进行。
13.根据权利要求10至12中任一项所述的方法,其特征在于,
所述芯片(1)通过负压保持。
14.根据权利要求7至13中任一项所述的方法,其特征在于,
用于在所述连接基板(12)的所述内部接触部(14)与所述芯片(1)的连接面(5)之间产生焊接连接(8)的所述焊接材料沉积物(16)的重熔在所述芯片被定位时进行。
15.根据权利要求7至14中任一项所述的方法,其特征在于,
所述焊接材料沉积物(16)通过激光能量被重熔。
16.根据权利要求15所述的方法,其特征在于,
以通过所述放置工具(9)的激光辐射冲击所述焊接材料沉积物(16)。
17.根据权利要求7至16中任一项所述的方法,其特征在于,
所述芯片(1)在所述连接基板(12)的接触表面上的定位及所述芯片的连接面(5)与所述连接基板(12)的所述内部接触部(14)的连接以如下方式依次进行:在平行于所述连接基板的接触表面的放置方向上,一个接一个将所述芯片定位且连接于所述连接基板。
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JP2016507899A (ja) 2016-03-10
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US9685423B2 (en) 2017-06-20
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EP2951861A2 (de) 2015-12-09
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