CN104966767A - Method for growing epitaxial wafer of GaN-based light emitting diode - Google Patents

Method for growing epitaxial wafer of GaN-based light emitting diode Download PDF

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CN104966767A
CN104966767A CN201510142102.1A CN201510142102A CN104966767A CN 104966767 A CN104966767 A CN 104966767A CN 201510142102 A CN201510142102 A CN 201510142102A CN 104966767 A CN104966767 A CN 104966767A
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CN104966767B (en
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吕蒙普
魏世祯
陈柏松
谢文明
胡加辉
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HC Semitek Corp
HC Semitek Suzhou Co Ltd
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Abstract

The invention discloses a method for growing an epitaxial wafer of a GaN-based light emitting diode, and belongs to the field of a light emitting diode. The method comprises successively growing a buffer layer, an N-type layer, a multi-quantum well layer and a P-type layer on a substrate, wherein the P-type layer is grown by use of a high-pressure low-speed growth mode, the growth pressure of the P-type layer is 400torr to 760torr, the flow of TMGa is lower than 90sccm, the flow of TEGa is lower than 2000sccm, and the thickness of the P-type layer is 10nm to 60nm. According to the invention, through adoption of high-pressure low-speed growth, the crystal quality is quite good, the defect density caused by crystal lattice mismatch is substantially reduced, electric leakage channels between the NP layers are reduced, the current expansion capability of the NP layers is better, breakdown points are reduced, the antistatic capability of the epitaxial wafer is enhanced, requirements are met simply by growing a quite thin P-type layer, the light absorption amount of the P-type layer with a quite small thickness is smaller, and the light emitting amount of the front surface of a chip and the light emitting efficiency of a device are guaranteed.

Description

A kind of growing method of GaN base LED epitaxial slice
Technical field
The present invention relates to light-emitting diode field, particularly a kind of growing method of GaN base LED epitaxial slice.
Background technology
LED (Light Emitting Diode, light-emitting diode), especially the LED component of GaN base, has the advantages such as volume is little, efficiency is high, the life-span is long, is widely used in traffic lights, total colouring, LCD screen backlight, automobile instrument and built-in light etc.
The epitaxial wafer of the LED of existing GaN base mainly comprises the resilient coating grown successively on substrate, N-type layer, multiple quantum well layer, P-type layer and P type contact layer, wherein, multiple quantum well layer comprises InGaN quantum well layer and GaN quantum barrier layer, usually, the growth pressure of P-type layer can not higher than 200torr, the crystal mass of the P-type layer that this low-pressure growth mode grows is poor, the defect concentration that lattice mismatch between substrate and epitaxial wafer causes, and the defect concentration that InGaN quantum well layer in multiple quantum well layer and the lattice mismatch between GaN quantum barrier layer cause, can be amplified further in P-type layer, thus the leak channel added between N P (N-type layer and P-type layer), the current expansion ability of NP layer dies down, breakdown point increases, the antistatic effect of epitaxial wafer is poor, and in order to ensure the antistatic effect of LED component, usually P-type layer can be grown into and be not less than the thicker thickness of 80nm, but, because P-type layer has the characteristic of extinction, be not less than the light that the P-type layer meeting absorptance of 80nm thickness is more, the front amount of light of chip can be reduced again, reduce the luminous efficiency of device.
Summary of the invention
In order to solve the problem of prior art, embodiments provide a kind of growing method of GaN base LED epitaxial slice, technical scheme is as follows:
Embodiments provide a kind of growing method of GaN base LED epitaxial slice, described growing method comprises: grown buffer layer, N-type layer, multiple quantum well layer and P-type layer successively on substrate, described P-type layer adopts high pressure bradyauxesis mode to grow, the growth pressure of described P-type layer is 400torr ~ 760torr, described P-type layer adopts trimethyl gallium TMGa or triethyl-gallium TEGa to grow, the flow of described TMGa is lower than 90sccm, the flow of described TEGa is lower than 2000sccm, and the growth thickness scope of described P-type layer is 10nm ~ 60nm.
Further, the growth pressure of described P-type layer is 600torr ~ 700torr.
Preferably, the growth pressure of described P-type layer is 700torr.
Further, doped with impurity element in described P-type layer, the doping content of described impurity element is not less than 5 × 10 19cm -3.
Further, the range of flow of described TMGa is 20 ~ 45sccm, and the flow of described TEGa is lower than 1000sccm.
Alternatively, the growth temperature range of described N-type layer is 1000 DEG C ~ 1200 DEG C.
Alternatively, described N-type layer comprises N-type GaN layer and N-type current extending.
Further, the doping content in described N-type GaN layer is 5 × 10 18cm -3, the doping content in described N-type current extending is 2 × 10 17cm -3.
Alternatively, before the described P-type layer of growth, first grow P-type electron barrier layer, described P-type electron barrier layer is P type Al xga 1-xn layer, wherein, 0 ﹤ x ﹤ 1, after the described P-type layer of growth, described P-type layer grows one deck ohmic contact layer.
Alternatively, described resilient coating, described P-type electron barrier layer and described ohmic contact layer are one or more layers structure.
Further, described growing method also comprises:
After described ohmic contact layer growth terminates, growth temperature is adjusted to 600 DEG C ~ 900 DEG C, annealing in process 10 ~ 20 minutes under pure nitrogen gas atmosphere, and is cooled to room temperature, terminate the growth of described epitaxial wafer.
The beneficial effect of the technical scheme that the embodiment of the present invention provides is:
By adopting high pressure bradyauxesis mode growing P-type layer, high pressure growth P-type layer is grown finer and close, it is slow that bradyauxesis builds brilliant speed, crystal is laid more even, the crystal mass of P-type layer is relatively good, the defect concentration caused by lattice mismatch significantly reduces, decrease the leak channel between NP layer, the current expansion ability of NP layer improves, breakdown point tails off, the antistatic effect of epitaxial wafer strengthens, simultaneously, because the antistatic effect of epitaxial wafer is stronger, P-type layer growth can be met the demands at the thinner thickness range of 10nm ~ 60nm, the extinction amount of the P-type layer of thinner thickness can be less, ensure that the front amount of light of chip and the luminous efficiency of device.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the flow chart of the growing method of a kind of GaN base LED epitaxial slice that the embodiment of the present invention provides;
Fig. 2 is the structural representation of the epitaxial wafer of the growing method growth of a kind of GaN base LED epitaxial slice that the embodiment of the present invention provides.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, embodiment of the present invention is described further in detail.
Embodiment one
Embodiments provide a kind of growing method of GaN base LED epitaxial slice, see Fig. 1, the method comprises:
Step 101: at substrate Epitaxial growth cache layer, N-type layer and multiple quantum well layer.
Wherein, substrate is the material of applicable gallium nitride and other semiconductor epitaxial Material growth, such as, and gallium nitride single crystal, sapphire, monocrystalline silicon, single-crystal silicon carbide etc.
Particularly, resilient coating can be one or more layers (i.e. compound buffer layer).When resilient coating is compound buffer layer, it can comprise low temperature buffer layer and high temperature buffer layer.As one citing, the component of low temperature buffer layer can be GaN, and thickness is 15nm ~ 30nm, and preferred thickness is 20nm; The component of high temperature buffer layer can be the plain GaN of high temperature, and thickness is 0.8 μm ~ 2 μm, and preferred thickness is 1.2 μm.
When realizing, the growth temperature range of N-type layer can be 1000 DEG C ~ 1200 DEG C, be preferably 1100 DEG C, N-type layer can comprise N-type GaN layer and N-type current extending, all doped with impurity element in N-type GaN layer and N-type current extending, such as Si, wherein, the doping content in N-type GaN layer can be 5 × 10 18cm -3, the doping content in N-type current extending can be 2 × 10 17cm -3.As one citing, the thickness of N-type layer can between 30nm ~ 80nm.
When realizing, multiple quantum well layer is superlattice structure, its each cycle can comprise InGaN quantum well layer and the GaN quantum barrier layer of growth on InGaN quantum well layer, its periodicity can be 10 ~ 15, be preferably 12, as one citing, in the present embodiment, the cycle of multiple quantum well layer can be 12, and each cycle can comprise the In that thickness is 3nm 0.18ga 0.82n quantum well layer and thickness are the GaN quantum barrier layer of 10.5nm.
It should be noted that, before grown buffer layer, the method can also comprise: substrate is carried out annealing in process in hydrogen atmosphere, and with clean substrate surface, annealing temperature is 1040 ~ 1180 DEG C, then carries out nitrogen treatment.
Step 102: growing P-type electronic barrier layer, P-type layer and ohmic contact layer successively on multiple quantum well layer.
Wherein, P-type electron barrier layer and ohmic contact layer can be all one or more layers structure.P-type electron barrier layer can be P type Al xga 1-xn layer, wherein, 0 ﹤ x ﹤ 1, as one citing, in the present embodiment, P-type electron barrier layer can be P type Al 0.16ga 0.84n layer, wherein also doped with impurity element, such as Mg, doping content can be 5 × 10 17cm -3.
When realizing, ohmic contact layer is optional layer, namely can not grow ohmic contact layer in other implementations.When being provided with ohmic contact layer, ohmic contact layer can adopt GaN material to grow, InGaN Material growth can also be adopted, Mg or Si can also be mixed at ohmic contact layer, to form P type ohmic contact layer or N-type ohmic contact layer, actual prepare LED chip time, P electrode can be made at ohmic contact layer, ohmic contact layer, mainly in order to reduce the operating voltage of P electrode, to prevent the operating voltage of P electrode excessive, and produces the waste that too much heat causes energy.
P-type layer adopts high pressure bradyauxesis mode to grow.Particularly, the growth pressure of P-type layer can be 400torr ~ 760torr, preferable range is 600torr ~ 700torr, optimal value is 700torr, P-type layer can adopt trimethyl gallium TMGa or triethyl-gallium TEGa to grow, wherein, the flow of TMGa lower than the flow of 90sccm, TEGa lower than 2000sccm.The range of flow of preferred TMGa is that the flow of 20 ~ 45sccm, TEGa is lower than 1000sccm.When realizing, the growth thickness scope of P-type layer can be 10nm ~ 60nm.Adopt the growth pattern of high pressure low speed, high pressure growth can make that P-type layer is finer and close (the external morphology situation such as can to vanish from sight from the stain on epitaxial wafer surface, conclude that P-type layer grows finer and close), under the condition of bradyauxesis, the base crystalline substance of P-type layer slows, crystal is laid more even, the crystal mass of P-type layer is relatively good, the defect concentration caused by lattice mismatch significantly reduces, decrease the leak channel between NP layer, the current expansion ability of NP layer improves, breakdown point tails off, the antistatic effect of epitaxial wafer strengthens, simultaneously, because the antistatic effect of epitaxial wafer is stronger, P-type layer growth can be met the demands at the thinner thickness range of 10nm ~ 60nm, the extinction amount of the P-type layer of thinner thickness can be less, ensure that the front amount of light of chip and the luminous efficiency of device.
Further, P-type layer can be the GaN layer of doping, and its impurity element can be Mg, and wherein, the doping content of the impurity element in P-type layer is not less than 5 × 10 19cm -3.Under high pressure bradyauxesis condition, the doping content of the impurity element in P-type layer keeps a higher level, larger effect is had to the activation in Mg and hole, thus the concentration in hole in P-type layer can be promoted, because the electron mobility in N-type layer exceeds a lot than the mobility in the hole in P-type layer, therefore the concentration that P-type layer needs to provide enough holes to reach higher, to ensure electric capacity larger between NP layer, and then ensure the antistatic effect of epitaxial wafer, simultaneously, because P-type layer is mainly for the recombination luminescence in multiple quantum well layer provides hole, improve the concentration in hole in P-type layer, also be conducive to promoting the compound quantity of hole in multiple quantum well layer and electronics, thus also promote the luminous efficiency of chip.
Step 103: after ohmic contact layer growth terminates, growth temperature is adjusted to 600 DEG C ~ 900 DEG C, annealing in process 10 ~ 20 minutes under pure nitrogen gas atmosphere, and is cooled to room temperature, terminate the growth of epitaxial wafer.
See Fig. 2, the epitaxial wafer adopting the growing method of the present embodiment to prepare can comprise the resilient coating 2, N-type layer 3, multiple quantum well layer 4, P-type electron barrier layer 5, P-type layer 6 and the ohmic contact layer 7 that grow successively on substrate 1.
When realizing, aforementioned growth process can adopt MOCVD (Metal-Organic Chemical VaporDeposition, metallorganic chemical vapor deposition) method to carry out in the reaction chamber of MOCVD.When growing P-type layer, the pressure of MO source (i.e. high-purity metal organic compound) bottled equipment can be set as 800torr.
The embodiment of the present invention is by adopting high pressure bradyauxesis mode growing P-type layer, high pressure growth P-type layer is grown finer and close, it is slow that bradyauxesis builds brilliant speed, crystal is laid more even, the crystal mass of P-type layer is relatively good, the defect concentration caused by lattice mismatch significantly reduces, decrease the leak channel between NP layer, the current expansion ability of NP layer improves, breakdown point tails off, the antistatic effect of epitaxial wafer strengthens, simultaneously, because the antistatic effect of epitaxial wafer is stronger, P-type layer growth can be met the demands at the thinner thickness range of 10nm ~ 60nm, the extinction amount of the P-type layer of thinner thickness can be less, ensure that the front amount of light of chip and the luminous efficiency of device.
Embodiment two
Embodiments provide a kind of growing method of GaN base LED epitaxial slice, in the present embodiment, N-type layer comprises high temperature N-type GaN layer and high temperature N-type GaN current extending, and the growth temperature of high temperature N-type GaN layer is 1100 DEG C, the doping content of Si is 5 × 10 18cm -3, the growth temperature of high temperature N-type GaN current extending is 1100 DEG C, the doping content of Si is 2 × 10 17cm -3, multiple quantum well layer is by the In of 12 3nm 0.18ga 0.82the multi layer quantum well that the GaN quantum barrier layer of N quantum well layer and 12 10.5nm is combined into, P-type electron barrier layer is P type Al 0.16ga 0.84n layer, wherein the doping content of Mg is 5 × 10 17cm -3, P-type layer is the GaN layer of mixing Mg, and the concentration of Mg doping is 5 × 10 19cm -3, the pressure of growth pressure to be the flow of 600torr, TMGa the be bottled equipment in 45sccm, MO source is 800torr.
After the growth terminating epitaxial wafer, continue to clean epitaxial wafer, deposition, the semiconducter process such as photoetching make the LED chip that single chips is of a size of 10 × 25mil, the result obtained after testing this LED chip is: measuring current is 60mA, operating voltage is 3.05V, brightness is 107mw, 4KV antistatic effect is 90%, (namely P-type layer adopts low pressure 200torr with the epitaxial wafer of conventional LED chips, the flow of TMGa is 90sccm, the pressure of the bottled equipment in MO source is 800torr, the epitaxial wafer grown under the condition that other growth conditionss are all identical) compare, wherein, the test result of conventional LED chips is: measuring current is 60mA, operating voltage is 3.05V, brightness is 103mw, 4KV antistatic effect is 80%, in the present embodiment, the luminous efficiency of LED chip improves 4%, antistatic effect brings up to 90% of 4KV by 80% of 4KV.
In order to contrast outstanding effect of the present invention, have also been devised other two kinds of chips simultaneously, in embodiment two except P-type layer, when the growth conditions of other layers in epitaxial wafer is constant, the growth pressure of the P-type layer in the epitaxial wafer of a kind of chip A is 600torr, the flow of TMGa is 90sccm, the pressure of the bottled equipment in MO source is 800torr, equally, the result obtained after testing this chip A is: measuring current is 60mA, operating voltage is 3.05V, brightness is 101mw, 4KV antistatic effect is 82%, compared with adopting the LED chip of conventional epitaxial sheet, the luminous efficiency of chip A reduces 2%, the growth pressure of the P-type layer in the epitaxial wafer of another kind of chip B is 200torr, the flow of TMGa is 45sccm, the pressure of the bottled equipment in MO source is 800torr, equally, the result obtained after testing this chip B is: measuring current is 60mA, operating voltage is 3.05V, brightness be 105mw, 4KV antistatic effect is 60%, compared with adopting the LED chip of conventional epitaxial sheet, the luminous efficiency of chip B improves 2%.As can be seen from above correction data, the present invention adopts high pressure bradyauxesis P-type layer, chip brightness, 4KV antistatic effect and luminous efficiency can be significantly improved, and be not adopt separately high pressure growth P-type layer and adopt separately the simple cumulative of the effect of bradyauxesis P-type layer.
Embodiment three
Embodiments provide a kind of growing method of GaN base LED epitaxial slice, cache layer wherein, N-type layer, multiple quantum well layer, P-type electron barrier layer and ohmic contact layer are all with embodiment two, with the difference of embodiment two, only be that the growth pressure of P-type layer becomes 700torr, the flow of TMGa is adjusted to 20sccm.
Equally, after the growth terminating epitaxial wafer, continue to clean epitaxial wafer, deposit, the semiconducter process such as photoetching makes the LED chip that single chips is of a size of 10 × 25mil, this LED chip is carried out to the test of the same terms in embodiment two, the result obtained is: measuring current is 60mA, operating voltage is 3.05V, brightness be 110mw, 4KV antistatic effect is 93%, compared with the epitaxial wafer of conventional LED chips, in the present embodiment, the luminous efficiency of LED chip improves 6.8%, and antistatic effect brings up to 93% of 4KV by 80% of 4KV.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (11)

1. the growing method of a GaN base LED epitaxial slice, described growing method comprises: grown buffer layer, N-type layer, multiple quantum well layer and P-type layer successively on substrate, it is characterized in that, described P-type layer adopts high pressure bradyauxesis mode to grow, the growth pressure of described P-type layer is 400torr ~ 760torr, described P-type layer adopts trimethyl gallium TMGa or triethyl-gallium TEGa to grow, the flow of described TMGa is lower than 90sccm, the flow of described TEGa is lower than 2000sccm, and the growth thickness scope of described P-type layer is 10nm ~ 60nm.
2. growing method according to claim 1, is characterized in that, the growth pressure of described P-type layer is 600torr ~ 700torr.
3. growing method according to claim 2, is characterized in that, the growth pressure of described P-type layer is 700torr.
4. growing method according to claim 1, is characterized in that, doped with impurity element in described P-type layer, the doping content of described impurity element is not less than 5 × 10 19cm -3.
5. growing method according to claim 1, is characterized in that, the range of flow of described TMGa is 20 ~ 45sccm, and the flow of described TEGa is lower than 1000sccm.
6. growing method according to claim 1, is characterized in that, the scope of the growth temperature of described N-type layer is 1000 DEG C ~ 1200 DEG C.
7. growing method according to claim 1, is characterized in that, described N-type layer comprises N-type GaN layer and N-type current extending.
8. growing method according to claim 7, is characterized in that, the doping content in described N-type GaN layer is 5 × 10 18cm -3, the doping content in described N-type current extending is 2 × 10 17cm -3.
9. growing method according to claim 1, is characterized in that, before the described P-type layer of growth, first grow P-type electron barrier layer, described P-type electron barrier layer is P type Al xga 1-xn layer, wherein, 0 ﹤ x ﹤ 1, after the described P-type layer of growth, described P-type layer grows one deck ohmic contact layer.
10. growing method according to claim 9, is characterized in that, described resilient coating, described P-type electron barrier layer and described ohmic contact layer are one or more layers structure.
11. growing methods according to claim 9, is characterized in that, described growing method also comprises:
After described ohmic contact layer growth terminates, growth temperature is adjusted to 600 DEG C ~ 900 DEG C, annealing in process 10 ~ 20 minutes under pure nitrogen gas atmosphere, and is cooled to room temperature, terminate the growth of described epitaxial wafer.
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Cited By (3)

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Publication number Priority date Publication date Assignee Title
CN107731974A (en) * 2017-08-30 2018-02-23 华灿光电(浙江)有限公司 GaN-based light emitting diode epitaxial wafer and growth method thereof
CN112242465A (en) * 2020-09-08 2021-01-19 南昌大学 Nitride semiconductor light-emitting diode with enhanced light-emitting p-type layer
CN114038969A (en) * 2021-11-09 2022-02-11 天津三安光电有限公司 LED epitaxial structure and LED chip

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CN103346219A (en) * 2013-07-12 2013-10-09 湘能华磊光电股份有限公司 Growing method for duplex multi-quantum well luminescent layer structure and LED epitaxial structure
CN103996759A (en) * 2014-06-13 2014-08-20 湘能华磊光电股份有限公司 Led epitaxial layer growing method and led epitaxial layer

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CN103346219A (en) * 2013-07-12 2013-10-09 湘能华磊光电股份有限公司 Growing method for duplex multi-quantum well luminescent layer structure and LED epitaxial structure
CN103996759A (en) * 2014-06-13 2014-08-20 湘能华磊光电股份有限公司 Led epitaxial layer growing method and led epitaxial layer

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Publication number Priority date Publication date Assignee Title
CN107731974A (en) * 2017-08-30 2018-02-23 华灿光电(浙江)有限公司 GaN-based light emitting diode epitaxial wafer and growth method thereof
CN107731974B (en) * 2017-08-30 2019-08-23 华灿光电(浙江)有限公司 GaN-based light emitting diode epitaxial wafer and growth method thereof
CN112242465A (en) * 2020-09-08 2021-01-19 南昌大学 Nitride semiconductor light-emitting diode with enhanced light-emitting p-type layer
CN114038969A (en) * 2021-11-09 2022-02-11 天津三安光电有限公司 LED epitaxial structure and LED chip
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