CN104966767B - A kind of growing method of GaN base light emitting epitaxial wafer - Google Patents
A kind of growing method of GaN base light emitting epitaxial wafer Download PDFInfo
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Abstract
The invention discloses a kind of growing method of GaN base light emitting epitaxial wafer, belong to light emitting diode field.Methods described includes：Grown buffer layer, N-type layer, multiple quantum well layer and P-type layer successively on substrate, P-type layer is grown using high pressure bradyauxesis mode, the growth pressure of P-type layer is 400torr~760torr, TMGa flows are less than 90sccm, TEGa flow is less than 2000sccm, and the thickness of P-type layer is 10nm~60nm.The present invention is by using high pressure bradyauxesis, crystal mass is relatively good, defect concentration is greatly decreased as caused by lattice mismatch, reduce the leak channel between NP layers, NP layer current expansion abilities improve, and breakdown point tails off, the antistatic effect enhancing of epitaxial wafer, relatively thin by P-type layer growth can meet to require, the extinction amount of the P-type layer of thinner thickness can be less, ensure that the front amount of light of chip and the luminous efficiency of device.
Description
Technical field
The present invention relates to light emitting diode field, more particularly to a kind of growing method of GaN base light emitting epitaxial wafer.
Background technology
LED (Light Emitting Diode, light emitting diode), the especially LED component of GaN base, have small volume,
The advantages that efficiency high, long lifespan, be widely used in traffic lights, total colouring, LCD screen backlight, automobile instrument and
Built-in light etc..
The LED of existing GaN base epitaxial wafer mainly includes cushion, N-type layer, the Multiple-quantum being grown in successively on substrate
Well layer, P-type layer and p-type contact layer, wherein, multiple quantum well layer includes InGaN quantum well layers and GaN quantum barrier layers, generally, p-type
Layer growth pressure be not above 200torr, the crystal mass for the P-type layer that this low-pressure growth mode grows is poor, substrate with
InGaN quantum well layers and GaN quantum in defect concentration, and multiple quantum well layer caused by lattice mismatch between epitaxial wafer are built
Defect concentration caused by lattice mismatch between layer, it can be further magnified in P-type layer, so as to add N P (N-type layer and P
Type layer) between leak channel, the current expansion ability of NP layers dies down, and breakdown point increase, the antistatic effect of epitaxial wafer compares
Difference, and in order to ensure the antistatic effect of LED component, it will usually P-type layer is grown into the thickness thicker not less than 80nm, but
It is that, because P-type layer has the characteristic of extinction, the light more not less than the P-type layer meeting absorptance of 80nm thickness, chip can be reduced again
Front amount of light, reduce the luminous efficiency of device.
The content of the invention
In order to solve problem of the prior art, the embodiments of the invention provide a kind of GaN base light emitting epitaxial wafer
Growing method, technical scheme are as follows：
The embodiments of the invention provide a kind of growing method of GaN base light emitting epitaxial wafer, the growing method bag
Include：Grown buffer layer, N-type layer, multiple quantum well layer and P-type layer, the P-type layer use high pressure bradyauxesis side successively on substrate
Formula is grown, and the P-type layer is grown using trimethyl gallium TMGa or triethyl-gallium TEGa, and the flow of the TMGa is less than 90sccm,
The flow of the TEGa is less than 2000sccm, and the growth thickness scope of the P-type layer is 10nm~60nm, the P-type layer
Growth pressure is 700torr.
Further, in the P-type layer doped with impurity element, the doping concentration of the impurity element not less than 5 ×
1019cm-3。
Further, the range of flow of the TMGa is 20~45sccm, and the flow of the TEGa is less than 1000sccm.
Alternatively, the growth temperature range of the N-type layer is 1000 DEG C~1200 DEG C.
Alternatively, the N-type layer includes N-type GaN layer and N-type current extending.
Further, the doping concentration in the N-type GaN layer is 5 × 1018cm-3, mixing in the N-type current extending
Miscellaneous concentration is 2 × 1017cm-3。
Alternatively, before the P-type layer is grown, P-type electron barrier layer is first grown, the P-type electron barrier layer is p-type
AlxGa1-xN layers, wherein, 0 ﹤ x ﹤ 1, after the P-type layer is grown, one layer of ohmic contact layer is grown in the P-type layer.
Alternatively, the cushion, the P-type electron barrier layer and the ohmic contact layer are one or more layers structure.
Further, the growing method also includes：
After ohmic contact layer growth terminates, growth temperature is adjusted to 600 DEG C~900 DEG C, under pure nitrogen gas atmosphere
Annealing 10~20 minutes, and room temperature is cooled to, terminate the growth of the epitaxial wafer.
The beneficial effect of technical scheme provided in an embodiment of the present invention is：
By using high pressure bradyauxesis mode growing P-type layer, high pressure growth makes P-type layer grow finer and close, low speed
Growth builds that brilliant speed is slow, and crystal laying is more uniform, and the crystal mass of P-type layer is relatively good, and the defects of being caused by lattice mismatch is close
Degree is greatly decreased, and reduces the leak channel between NP layers, and the current expansion ability of NP layers improves, and breakdown point tails off, epitaxial wafer
Antistatic effect enhancing, simultaneously as the antistatic effect of epitaxial wafer is stronger, P-type layer is grown in 10nm~60nm's
Relatively thin thickness range can meet to require, the extinction amount of the P-type layer of thinner thickness can be less, ensure that the positive light extraction of chip
The luminous efficiency of amount and device.
Brief description of the drawings
Technical scheme in order to illustrate the embodiments of the present invention more clearly, make required in being described below to embodiment
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for
For those of ordinary skill in the art, on the premise of not paying creative work, other can also be obtained according to these accompanying drawings
Accompanying drawing.
Fig. 1 is a kind of flow chart of the growing method of GaN base light emitting epitaxial wafer provided in an embodiment of the present invention；
Fig. 2 is a kind of extension of the growing method growth of GaN base light emitting epitaxial wafer provided in an embodiment of the present invention
The structural representation of piece.
Embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
The embodiments of the invention provide a kind of growing method of GaN base light emitting epitaxial wafer, referring to Fig. 1, this method
Including：
Step 101：In substrate Epitaxial growth cache layer, N-type layer and multiple quantum well layer.
Wherein, substrate is the material for being adapted to gallium nitride and other semiconductor epitaxial Material growths, for example, gallium nitride single crystal,
Sapphire, monocrystalline silicon, single-crystal silicon carbide etc..
Specifically, cushion can be one or more layers (i.e. compound buffer layer).When cushion is compound buffer layer, its
Low temperature buffer layer and high temperature buffer layer can be included.Illustrated as one kind, the component of low temperature buffer layer can be GaN, and thickness is
15nm~30nm, preferred thickness 20nm；The component of high temperature buffer layer can be the GaN that undopes of high temperature, thickness is 0.8 μm~
2 μm, preferred thickness is 1.2 μm.
When realizing, the growth temperature range of N-type layer can be 1000 DEG C~1200 DEG C, preferably 1100 DEG C, and N-type layer can be with
Including N-type GaN layer and N-type current extending, doped with impurity element, such as Si in N-type GaN layer and N-type current extending,
Wherein, the doping concentration in N-type GaN layer can be 5 × 1018cm-3, the doping concentration in N-type current extending can be 2 ×
1017cm-3.Illustrated as one kind, the thickness of N-type layer can be between 30nm~80nm.
When realizing, multiple quantum well layer is superlattice structure, and each of which cycle can include InGaN quantum well layers and be grown in
GaN quantum barrier layers on InGaN quantum well layers, its periodicity can be 10~15, preferably 12, be illustrated as one kind, at this
In embodiment, the cycle of multiple quantum well layer can be 12, and each cycle can include the In that thickness is 3nm0.18Ga0.82N SQWs
Layer and the GaN quantum barrier layers that thickness is 10.5nm.
It should be noted that before grown buffer layer, this method can also include：Substrate is carried out in hydrogen atmosphere
Annealing, to clean substrate surface, annealing temperature is 1040~1180 DEG C, then carries out nitrogen treatment.
Step 102：Growing P-type electronic barrier layer, P-type layer and ohmic contact layer successively on multiple quantum well layer.
Wherein, P-type electron barrier layer and ohmic contact layer can be one or more layers structure.P-type electron barrier layer can
Think p-type AlxGa1-xN layers, wherein, 0 ﹤ x ﹤ 1, illustrated as one kind, in the present embodiment, P-type electron barrier layer can be p-type
Al0.16Ga0.84N layers, wherein impurity element is also doped with, such as Mg, doping concentration can be 5 × 1017cm-3。
When realizing, ohmic contact layer is optional layer, i.e., ohmic contact layer can not be grown in other implementations.When setting
When having ohmic contact layer, ohmic contact layer can use GaN material to grow, and can also use InGaN Material growths, can also be
Ohmic contact layer mixes Mg or Si, to form p-type ohmic contact layer or N-type ohmic contact layer, is actually preparing LED chip
When, P electrode can be made in ohmic contact layer, ohmic contact layer is primarily to reduce the operating voltage of P electrode, to prevent P
The operating voltage of electrode is excessive, and produces the waste that excessive heat causes energy.
P-type layer is grown using high pressure bradyauxesis mode.Specifically, the growth pressure of P-type layer can be 400torr~
760torr, preferred scope are 600torr~700torr, optimal value 700torr, and P-type layer can use trimethyl gallium TMGa
Or triethyl-gallium TEGa is grown, wherein, TMGa flow is less than 90sccm, and TEGa flow is less than 2000sccm.It is preferred that
TMGa range of flow be 20~45sccm, TEGa flow is less than 1000sccm.When realizing, the growth thickness model of P-type layer
It can be 10nm~60nm to enclose.Using the growth pattern of high pressure low speed, high pressure growth can make P-type layer is finer and close (can be from
The stain on epitaxial wafer surface such as is vanished from sight at the external morphology situation, concludes that P-type layer grows finer and close), in bradyauxesis
Under the conditions of, the base crystalline substance of P-type layer slows, and crystal laying is more uniform, and the crystal mass of P-type layer is relatively good, by lattice mismatch
Caused defect concentration is greatly decreased, and reduces the leak channel between NP layers, and the current expansion ability of NP layers improves, breakdown point
Tail off, the antistatic effect enhancing of epitaxial wafer, simultaneously as the antistatic effect of epitaxial wafer is stronger, P-type layer is grown in
10nm~60nm relatively thin thickness range can meet to require, the extinction amount of the P-type layer of thinner thickness can be less, ensure that core
The front amount of light of piece and the luminous efficiency of device.
Further, P-type layer can be the GaN layer of doping, and its impurity element can be Mg, wherein, the impurity in P-type layer
The doping concentration of element is not less than 5 × 1019cm-3.Under the conditions of high pressure bradyauxesis, the doping of the impurity element in P-type layer is dense
Degree keeps a higher level, the activation to Mg and hole play the role of it is larger, so as to lift the dense of hole in P-type layer
Degree, because the electron mobility in N-type layer is higher by much than the mobility in the hole in P-type layer, therefore P-type layer needs to provide foot
Enough holes reach higher concentration, to ensure larger electric capacity between NP layers, and then ensure the antistatic energy of epitaxial wafer
Power, simultaneously as P-type layer mainly for the recombination luminescence in multiple quantum well layer provides hole, improve the dense of hole in P-type layer
Degree, the compound quantity in the hole and electronics that are also beneficial to be lifted in multiple quantum well layer, so as to also lift the luminous efficiency of chip.
Step 103：After ohmic contact layer growth terminates, growth temperature is adjusted to 600 DEG C~900 DEG C, in purity nitrogen atmosphere
Enclose lower annealing 10~20 minutes, and be cooled to room temperature, terminate the growth of epitaxial wafer.
Referring to Fig. 2, the epitaxial wafer prepared using the growing method of the present embodiment can include growing on substrate 1 successively
Cushion 2, N-type layer 3, multiple quantum well layer 4, P-type electron barrier layer 5, P-type layer 6 and ohmic contact layer 7.
When realizing, aforementioned growth process can use MOCVD (Metal-Organic Chemical Vapor
Deposition, metallorganic chemical vapor deposition) method carries out in MOCVD reaction chamber.In growing P-type layer,
The pressure of MO sources (i.e. high-purity metal organic compound) bottled equipment can be set as 800torr.
The embodiment of the present invention makes P-type layer grow more by using high pressure bradyauxesis mode growing P-type layer, high pressure growth
Add densification, the brilliant speed in bradyauxesis base is slow, and crystal laying is more uniform, and the crystal mass of P-type layer is relatively good, is led by lattice mismatch
The defects of cause, density was greatly decreased, and reduced the leak channel between NP layers, and the current expansion ability of NP layers improves, and breakdown point becomes
It is few, the antistatic effect enhancing of epitaxial wafer, simultaneously as the antistatic effect of epitaxial wafer is stronger, P-type layer is grown in 10nm
~60nm relatively thin thickness range can meet to require, the extinction amount of the P-type layer of thinner thickness can be less, ensure that chip
The luminous efficiency of front amount of light and device.
Embodiment two
The embodiments of the invention provide a kind of growing method of GaN base light emitting epitaxial wafer, in the present embodiment, N
Type layer includes high temperature N-type GaN layer and high temperature N-type GaN current extendings, and the growth temperature of high temperature N-type GaN layer is 1100 DEG C, Si
Doping concentration be 5 × 1018cm-3, the growth temperatures of high temperature N-type GaN current extendings is 1100 DEG C, Si doping concentration is 2
×1017cm-3, multiple quantum well layer is the In by 12 3nm0.18Ga0.82The GaN quantum barrier layers of N quantum well layers and 12 10.5nm
The multi layer quantum well being combined into, P-type electron barrier layer are p-type Al0.16Ga0.84The doping concentration of N layers, wherein Mg is 5 × 1017cm-3, P-type layer is to mix Mg GaN layer, and the concentration of Mg doping is 5 × 1019cm-3, growth pressure 600torr, TMGa flow is
The pressure of the bottled equipment in 45sccm, MO source is 800torr.
After the growth of epitaxial wafer is terminated, continue to clean epitaxial wafer, deposit, the semiconducter process such as photoetching
The LED chip that single chip size is 10 × 25mil is made, the result obtained after testing the LED chip is：Test electricity
It is 90% to flow for 60mA, operating voltage 3.05V, brightness 107mw, 4KV antistatic effect, the extension with conventional LED chips
Piece (it for the pressure of the bottled equipment in 90sccm, MO source is 800torr that i.e. P-type layer, which uses the flow of low pressure 200torr, TMGa, other
The epitaxial wafer grown under conditions of growth conditions all same) compare, wherein, the test result of conventional LED chips is：Test electric current
It is 80% for 60mA, operating voltage 3.05V, brightness 103mw, 4KV antistatic effect, the hair of LED chip in the present embodiment
Light efficiency improves 4%, and antistatic effect brings up to the 90% of 4KV by the 80% of 4KV.
In order to contrast the effect of the prominent present invention, while have also been devised other two kinds of chips, in embodiment two except P
Outside type layer, in the case that the growth conditions of other layers in epitaxial wafer is constant, a kind of life of the P-type layer in chip A epitaxial wafer
Long pressure is 600torr, and TMGa flow is 90sccm, and the pressure of the bottled equipment in MO sources is 800torr, equally, to chip A
The result obtained after being tested is：Test electric current is 60mA, operating voltage 3.05V, the antistatic energy of brightness 101mw, 4KV
Power is 82%, and compared with using the LED chip of conventional epitaxial piece, chip A luminous efficiency reduces 2%；Another chip B's
The growth pressure of P-type layer in epitaxial wafer is 200torr, and TMGa flow is 45sccm, and the pressure of the bottled equipment in MO sources is
800torr, equally, the result obtained after testing chip B is：Test electric current be 60mA, operating voltage 3.05V,
Brightness is that 105mw, 4KV antistatic effect are 60%, compared with using the LED chip of conventional epitaxial piece, chip B luminous efficiency
Improve 2%.The present invention is can be seen that from above correction data and uses high pressure bradyauxesis P-type layer, can significantly improve chip
Brightness, 4KV antistatic effects and luminous efficiency, and be not individually to use high pressure growth P-type layer and individually use bradyauxesis P
The simple of the effect of type layer is added up.
Embodiment three
The embodiments of the invention provide a kind of growing method of GaN base light emitting epitaxial wafer, cache layer therein, N
Type layer, multiple quantum well layer, P-type electron barrier layer and ohmic contact layer are with embodiment two, the difference with embodiment two, only
It is that the growth pressure of P-type layer is changed into 700torr, TMGa flow is adjusted to 20sccm.
Equally, after the growth of epitaxial wafer is terminated, continue to clean epitaxial wafer, deposit, the semiconductor such as photoetching adds
The LED chip that single chip size is 10 × 25mil is made in work technique, and the same terms in embodiment two are carried out to the LED chip
Test, obtained result is：Test electric current is 60mA, operating voltage 3.05V, brightness 110mw, 4KV antistatic effect
For 93%, compared with the epitaxial wafer of conventional LED chips, the luminous efficiency of LED chip improves 6.8% in the present embodiment, resists quiet
Electric energy power brings up to the 93% of 4KV by the 80% of 4KV.
The foregoing is only presently preferred embodiments of the present invention, be not intended to limit the invention, it is all the present invention spirit and
Within principle, any modification, equivalent substitution and improvements made etc., it should be included in the scope of the protection.
Claims (9)
1. a kind of growing method of GaN base light emitting epitaxial wafer, the growing method include：Growth is slow successively on substrate
Rush layer, N-type layer, multiple quantum well layer and P-type layer, it is characterised in that the P-type layer is grown using high pressure bradyauxesis mode, institute
State P-type layer to grow using trimethyl gallium TMGa or triethyl-gallium TEGa, the flow of the TMGa is less than 90sccm, the TEGa's
Flow is less than 2000sccm, and the growth thickness scope of the P-type layer is 10nm~60nm, and the growth pressure of the P-type layer is
700torr。
2. growing method according to claim 1, it is characterised in that described miscellaneous doped with impurity element in the P-type layer
The doping concentration of prime element is not less than 5 × 1019cm-3。
3. growing method according to claim 1, it is characterised in that the range of flow of the TMGa is 20~45sccm,
The flow of the TEGa is less than 1000sccm.
4. growing method according to claim 1, it is characterised in that the scope of the growth temperature of the N-type layer is 1000
DEG C~1200 DEG C.
5. growing method according to claim 1, it is characterised in that the N-type layer includes N-type GaN layer and N-type electric current expands
Open up layer.
6. growing method according to claim 5, it is characterised in that doping concentration in the N-type GaN layer for 5 ×
1018cm-3, the doping concentration in the N-type current extending is 2 × 1017cm-3。
7. growing method according to claim 1, it is characterised in that before the P-type layer is grown, first growing P-type electricity
Sub- barrier layer, the P-type electron barrier layer are p-type AlxGa1-xN layers, wherein, 0 ﹤ x ﹤ 1, after the P-type layer is grown, in institute
State one layer of ohmic contact layer of growth in P-type layer.
8. growing method according to claim 7, it is characterised in that the cushion, the P-type electron barrier layer and institute
It is one or more layers structure to state ohmic contact layer.
9. growing method according to claim 7, it is characterised in that the growing method also includes：
After ohmic contact layer growth terminates, growth temperature is adjusted to 600 DEG C~900 DEG C, annealed under pure nitrogen gas atmosphere
Processing 10~20 minutes, and room temperature is cooled to, terminate the growth of the epitaxial wafer.
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| CN112242465A (en) * | 2020-09-08 | 2021-01-19 | 南昌大学 | Nitride semiconductor light-emitting diode with enhanced light-emitting p-type layer |
| CN114038969B (en) * | 2021-11-09 | 2023-10-20 | 天津三安光电有限公司 | LED epitaxial structure and LED chip |
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| CN103346219A (en) * | 2013-07-12 | 2013-10-09 | 湘能华磊光电股份有限公司 | Growing method for duplex multi-quantum well luminescent layer structure and LED epitaxial structure |
| CN103996759A (en) * | 2014-06-13 | 2014-08-20 | 湘能华磊光电股份有限公司 | Led epitaxial layer growing method and led epitaxial layer |
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| CN103346219A (en) * | 2013-07-12 | 2013-10-09 | 湘能华磊光电股份有限公司 | Growing method for duplex multi-quantum well luminescent layer structure and LED epitaxial structure |
| CN103996759A (en) * | 2014-06-13 | 2014-08-20 | 湘能华磊光电股份有限公司 | Led epitaxial layer growing method and led epitaxial layer |
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