CN103346219A - Growing method for duplex multi-quantum well luminescent layer structure and LED epitaxial structure - Google Patents
Growing method for duplex multi-quantum well luminescent layer structure and LED epitaxial structure Download PDFInfo
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- CN103346219A CN103346219A CN2013102934834A CN201310293483A CN103346219A CN 103346219 A CN103346219 A CN 103346219A CN 2013102934834 A CN2013102934834 A CN 2013102934834A CN 201310293483 A CN201310293483 A CN 201310293483A CN 103346219 A CN103346219 A CN 103346219A
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Abstract
The invention provides a growing method for a duplex multi-quantum well luminescent layer structure and an LED epitaxial structure. A well luminescent layer of the epitaxial structure comprises six to eight unit layers, wherein each unit layer comprises a first well layer, a second well layer, a first epitaxial layer, a first well layer, a second well layer and a second epitaxial layer from top to bottom in sequence. According to the growing method for a duplex multiple-quantum well luminescent layer structure and the LED epitaxial structure, a duplex multiple-quantum well is adopted, the situation that separation of wave functions is caused by the stress of well layers and epitaxial layers in a traditional multi-quantum well is improved, and the situation that the hole concentration of the well layers is too low due to the epitaxial width in the traditional multi-quantum well is improved. Efficiency obtaining of the quantum well inside an LED chip is improved, the brightness of medium and small size LED chips is improved in macro view, and the lighting effects of large size LED chips are improved.
Description
Technical field
The present invention relates to LED extension design field, especially, relate to a kind of growing method and corresponding LED epitaxial structure of compound multiple quantum well light emitting layer structure.
Background technology
On LED market, street lighting uses the high-power specification 30mil*30mi chip of large scale more, and back light uses small-medium size 12mil*28mil standard chip more, and the product quality height is all relevant with chip brightness.Therefore, the brightness of various sizes chip then becomes encapsulation client's focal point.
Improving large scale light efficiency and small-medium size brightness at present has a variety of epitaxial growth methods at present, and most of structure innovation is P type layer, for example:
(1) the P layer structure that increases superlattice such as PAlGaN/PInGaN, PAlGaN/PGaN, the PAlGaN/GaN extended capability that improves electric current reaches the purpose that improves brightness;
(2) ionization rate of the raising Mg such as doping way of change P layer Mg improves hole concentration and reaches the purpose that improves light efficiency and brightness.
Summary of the invention
The object of the invention is to provide a kind of growing method and corresponding LED epitaxial structure of compound multiple quantum well light emitting layer structure, to solve the technical problem of present led chip luminance shortage.
For achieving the above object, the invention provides a kind of growing method of compound multiple quantum well light emitting layer structure, comprise following step:
A, with temperature control at 710-750 ℃, chamber pressure control at 300-400mbar, the flow of feeding In is 1500-1700sccm, the In of the 2.7-3.5nm of grow doping In
xGa
(1-x)N trap layer, x=0.20-0.22;
B, keep temperature and pressure constant, the flow that feeds In is 300-450sccm, the In of the 0.5-1.0nm of grow doping In
zGa
(1-z)N trap layer, z=0.04-0.08,
C, keep-up pressure constantly, be warming up to 810-840 ℃, the flow that feeds Al is 30-50sccm, and the flow that feeds In is 800-1000sccm, the doped with Al of growth 4-6nm, the Al of In
X1In
X2Ga
(1-x1-x2)N layer of heap of stone, x
1=0.04-0.05, x
2=0.10-0.12;
D, repeating step A, B;
E, keep-up pressure constantly, be warming up to the GaN layer of heap of stone of 810-840 ℃ of growth 10-12nm;
F, repeating step A, B, C, D, E6-8 time reach 162-216nm until the general thickness of trap luminescent layer.
Preferably, comprise step before the described steps A:
Under S1,1000-1100 ℃ the hydrogen atmosphere, chamber pressure is 150-200mbar, handles Sapphire Substrate 4-5 minute;
S2, be cooled to 540-570 ℃, chamber pressure is controlled at 450-600mbar, and growth thickness is the low temperature buffer layer GaN of 30-50nm on Sapphire Substrate;
S3, rising temperature are to 950-1050 ℃, and chamber pressure is controlled at 450-600mbar, continue the GaN that undopes of growth 2.5-3.0um;
S4, keep temperature-resistant, chamber pressure control at 200-400mbar, then continues the N-type GaN of growth 3.5-4.5 μ m doping Si, and the doping content of Si is controlled at 8E+18-1E19atom/cm
3
Preferably, comprise step after the described step F:
D1, rising temperature are to 900-950 ℃, and chamber pressure is controlled at 150-300mbar, continue the P type In that growth 30-40nm mixes Al, In
yAl
(1-y)The GaN layer, y=0.08-0.12;
D2, rising temperature are to 1000-1100 ℃, and chamber pressure is controlled at 200-600mbar, continue the P type GaN layer that growth 60-90nm mixes Mg, and the doping content control of Mg is at 3E+18-4E18atom/cm
3
D3, be cooled to 650-700 ℃, behind the insulation 20-30min, cooling in the stove.
The invention also discloses a kind of LED epitaxial structure, the trap luminescent layer of described LED epitaxial structure comprises 6-8 elementary layer, and each elementary layer comprises from bottom to up successively:
The first trap layer, the described first trap layer is the In of doping 2.7-3.5nmIn
xGa
(1-x)N trap layer, x=0.20-0.22;
The second trap layer, the described second trap layer is the In of doping 0.5-1.0nmIn
zGa
(1-z)N trap layer, z=0.04-0.08;
First layer of heap of stone, described first layer of heap of stone is the Al of doping 4-6nm, the Al of In
X1In
X2Ga
(1-x1-x2)N layer of heap of stone, x
1=0.04-0.05, x
2=0.10-0.12;
The first trap layer, the described first trap layer is the In of doping 2.7-3.5nmIn
xGa
(1-x)N trap layer, x=0.20-0.22;
The second trap layer, the described second trap layer is the In of doping 0.5-1.0nmIn
zGa
(1-z)N trap layer, z=0.04-0.08;
Second layer of heap of stone, the GaN layer of heap of stone that described second layer of heap of stone is 10-12nm.
Preferably, comprise successively from bottom to up under the described elementary layer:
Low temperature buffer GaN layer, thickness are 30-50nm;
The GaN layer that undopes, thickness is 2.5-3.0um;
N-type GaN layer, thickness are 3.5-4.5 μ m, doping Si, the doping content control 8E+18-1E19atom/cm of Si
3
Preferably, comprise successively from bottom to up on the described elementary layer:
P type AlGaN layer, thickness are the P type In of 30-40nm
yAl
(1-y)The GaN layer, y=0.08-0.12;
P type GaN layer, thickness is 60-90nm, doped with Mg, the doping content control 3E+18-4E18atom/cm of Mg
3
The present invention has following beneficial effect:
1, increase light extraction efficiency in the unit are: the lattice of traditional multiple quantum well layer and layer of heap of stone do not match and layer of heap of stone thicker, cause existing polarization, compression stress, cause the wave function in trap layer electronics and hole to be separated on the microcosmic, electronics and hole-recombination efficient are poor, and the number of photons that produces in the unit interval unit are is less; And the elementary layer structure that the present invention sets out, make transition zone (a plurality of compound trap layer) adjust the lattice coupling of InGaN and GaN, make the stress between trap layer and the layer of heap of stone diminish, the wave function in electronics and hole is more concentrated, increases the probability of recombination in electronics and hole.
2, increase the hole concentration of trap layer: the thickness of traditional Multiple Quantum Well layer of heap of stone is about 10-12nm, because potential barrier is wideer, is restricted in traditional Multiple Quantum Well propagation by P layer injected holes; And the present invention's first layer of heap of stone is the growth of AlInGaN quaternary, make the lattice of layer of heap of stone near the lattice of trap layer by the component of adjusting Al and In, reduced layer of heap of stone to the influence of trap ply stress, the THICKNESS CONTROL of first layer of heap of stone is at 4-6nm, littler than tradition layer thickness of heap of stone, be conducive to P layer injected hole in the propagation of compound quantum well, increase the hole concentration of the first trap layer and the second trap layer.
The compound multiple quantum well layer of the present invention has improved traditional Multiple Quantum Well because the situation that the wave function that trap ply stress of heap of stone causes is separated has been improved traditional Multiple Quantum Well because the wide low excessively situation of trap layer hole concentration that causes of heap of stone.By above improvement, the inside quantum well efficient of led chip gets a promotion, and objectively improves the brightness of small-medium size, improves large-sized light efficiency.
Except purpose described above, feature and advantage, the present invention also has other purpose, feature and advantage.With reference to figure, the present invention is further detailed explanation below.
Description of drawings
The accompanying drawing that constitutes the application's a part is used to provide further understanding of the present invention, and illustrative examples of the present invention and explanation thereof are used for explaining the present invention, do not constitute improper restriction of the present invention.In the accompanying drawings:
Fig. 1 is the structural representation of existing LED epitaxial structure;
Fig. 2 is the structural representation of the LED epitaxial structure of the preferred embodiment of the present invention;
Fig. 3 is the band structure schematic diagram of existing LED epitaxial structure; Figure (a) is the conduction level schematic diagram; Figure (b) is the valence-band level schematic diagram;
Fig. 4 is the band structure schematic diagram of the preferred embodiment of the present invention; Figure (a) is the conduction level schematic diagram; Figure (b) is the valence-band level schematic diagram;
Fig. 5 is the photoelectric properties data point comparison diagram of sample 1 and sample 2;
Fig. 6 is the photoelectric properties data point comparison diagram of sample 3 and sample 4;
Wherein, 1, P type GaN layer; 2, P type InAlGaN layer, 3-1, volume layer of heap of stone, 3-2, multiple quantum well layer, 4, N-type GaN, 5, U-shaped GaN; 3-A, the first trap layer, 3-B, the second trap layer, 3-C, first layer of heap of stone, 3-D, second layer of heap of stone; 6, P type AlGaN layer, 7, low temperature buffer GaN layer, 8, the GaN layer undopes.
Embodiment
Below in conjunction with accompanying drawing embodiments of the invention are elaborated, but the present invention can implement according to the multitude of different ways that claim limits and covers.
Below the explanation employing prepares the comparative example one of sample 1 and the embodiment one that growing method of the present invention prepares sample 2 with existing conventional method respectively, two kinds of methods is obtained sample 1 and sample 2 again and carries out Performance Detection relatively.
Comparative example one,
1,1000-1100 ℃ hydrogen atmosphere under, chamber pressure is controlled at 150-200mbar, high-temperature process Sapphire Substrate 4-5 minute;
2, be cooled under 540-570 ℃, chamber pressure is controlled at 450-600mbar, and growth thickness is the low temperature buffer layer GaN of 30-50nm on Sapphire Substrate;
3, rising temperature is under 950-1050 ℃, and chamber pressure is controlled at 450-600mbar, continues the GaN that undopes of growth 2.5-3.0um;
4, keep temperature-resistant, chamber pressure is controlled at 200-400mbar, and the 3.5-4.5 μ m that then grows continues the N-type GaN of doped silicon;
5, be cooled to 710-840 ℃, chamber pressure is controlled at 300-400mbar, growth periodicity growth multiple quantum well light emitting layer, and the monocycle growing method: (1) is cooled to the In of the 2.7-3.5nm of 710-750 ℃ of grow doping In
xGa
(1-x)N(x=0.20-0.22) trap layer, (2) are warming up to the GaN layer of heap of stone of 810-840 ℃ of growth 10-12nm, are that one-period carries out repeated growth with (1) (2) then, and the repeated growth periodicity is 13-15, and general thickness is controlled at 165-233nm;
6, raise temperature again to 900-950 ℃, chamber pressure is controlled at 150-300mbar, continues the P type In that growth 30-40nm mixes indium, aluminium
yAl
(1-y)The GaN layer, y=0.08-0.12;
7, raise temperature again to 1000-1100 ℃, chamber pressure is controlled at 200-600mbar, continues the P type GaN layer that growth 60-90nm mixes magnesium;
8, be cooled to 650-700 ℃ at last, insulation 20-30min, cooling in the stove then obtains sample 1.
Embodiment one,
The present invention uses the AixtronCruisIIMOCVD brightness GaN base LED epitaxial wafer that grows tall next life.Adopt high-purity H
2Or high-purity N
2Or high-purity H
2And high-purity N
2Mist as carrier gas, high-purity N H3 is as the N source, trimethyl gallium (TMGa) and triethyl-gallium (TEGa) be as the gallium source, trimethyl indium (TMIn) is as the indium source, silane (SiH
4) as the N-type dopant, trimethyl aluminium (TMAl) is as the aluminium source, two luxuriant magnesium (CP
2Mg) as P type dopant, substrate is (0001) surface sapphire, chamber pressure at 150mbar between the 600mbar.
1,1000-1100 ℃ hydrogen atmosphere under, chamber pressure is controlled at 150-200mbar, high-temperature process Sapphire Substrate 4-5 minute;
2, be cooled under 540-570 ℃, chamber pressure is controlled at 450-600mbar, and growth thickness is the low temperature buffer layer GaN of 30-50nm on Sapphire Substrate;
3, rising temperature is under 950-1050 ℃, and chamber pressure is controlled at 450-600mbar, continues the GaN that undopes of growth 2.5-3.0um;
4, keep temperature-resistant, chamber pressure is controlled at 200-400mbar, and the 3.5-4.5 μ m that then grows continues the N-type GaN of doped silicon;
5, be cooled to 710-840 ℃, chamber pressure is controlled at 300-400mbar, growth periodicity growth multiple quantum well light emitting layer, and the monocycle growing method:
(1) is cooled to 710-750 ℃, the In of the 2.7-3.5nm of grow doping In
xGa
(1-x)N trap layer, x=0.20-0.22;
(2) keep temperature and pressure constant, by changing the flow of indium, the In of the 0.5-1.0nm of grow doping In
zGa
(1-z)N trap layer, z=0.04-0.08;
(3) keep-up pressure constantly, be warming up to the adulterated al, the Al of indium of 810-840 ℃ of growth 4-6nm
X1In
X2Ga
(1-x1-x2)N layer of heap of stone, x
1=0.04-0.05, x
2=0.10-0.12;
(4) keep-up pressure constantly, be cooled to the In of the 2.7-3.5nm of 710-750 ℃ of grow doping In
xGa
(1-x)N trap layer, x=0.20-0.22;
(5) keep temperature and pressure constant, by changing the flow of indium, the In of the 0.5-1.0nm of grow doping In
zGa
(1-z)N(z=0.04-0.08) trap layer;
(6) keep-up pressure constantly, be warming up to the GaN layer of heap of stone of 810-840 ℃ of growth 10-12nm;
Be that one-period carries out repeated growth with (1) (2) (3) (4) (5) (6) then, the repeated growth periodicity is 6-8, and general thickness is controlled at 162-216nm;
6, raise temperature again to 900-950 ℃, chamber pressure is controlled at 150-300mbar, continues the P type In that growth 30-40nm mixes indium, aluminium
yAl
(1-y)The GaN layer, y=0.08-0.12;
7, raise temperature again to 1000-1100 ℃, chamber pressure is controlled at 200-600mbar, continues the P type GaN layer that growth 60-90nm mixes magnesium;
8, be cooled to 650-700 ℃ at last, insulation 20-30min, cooling in the stove then obtains sample 2.
Comparative example one can see the following form 1 with the growth parameter(s) contrast of embodiment one.
Table 1 comparative example one contrasts with the growth parameter(s) of embodiment one
Illustrate: in the table 1-the representative nothing
Referring to Fig. 1, the multiple quantum well layer 3-1 in the sample 1 that conventional method makes and volume layer of heap of stone 3-2.Referring to Fig. 2, in the sample 2 that the inventive method makes, become the compound multiple quantum well layer that is constituted by the first trap layer 3-A, the second trap layer 3-B, first layer 3-C, the first trap layer 3-A of heap of stone, the second trap layer 3-B, the second overlapping coincidence of layer 3-D of heap of stone.Referring to Fig. 3 and Fig. 4, the difference of both structures makes sample produce corresponding a plurality of trap energy level, increases the concentration of hole and electronics, mainly is the escape that reduces electronics, increases the concentration in hole, improves combined efficiency; And the wave function that a plurality of trap energy levels make electronics and hole separately central point on the K space is more close, increases the probability of recombination in electronics and hole.
From Fig. 3 as can be seen, the multiple quantum well layer 3-1 of sample 1 and volume layer of heap of stone 3-2 corresponding A point and the indicated conduction level position of B point respectively in figure (a), difference corresponding A in scheming (b) ' put and B ' puts indicated valence-band level position.
From Fig. 4 as can be seen, the first trap layer 3-A of sample 2, the second trap layer 3-B, first of heap of stone layer 3-C, the first trap layer 3-A corresponding A point, B point, C point, the indicated conduction level position of D point respectively in figure (a), difference corresponding A in figure (b) ' point, B ' point, C ' point, D ' put indicated valence-band level position.
Then, the sample 1 that makes is plated ITO layer 150-200nm with sample 2 under identical preceding process conditions, plating Cr/Pt/Au electrode 130-150nm under the identical condition, plating SiO under the identical condition
240-50nm becomes the sample grinding and cutting 305 μ m*711 μ m(12mi*28mil then under identical condition) the chip particle, sample 1 and sample 2 are selected 150 crystal grain separately in same position then, under identical packaging technology, are packaged into white light LEDs.Adopt the photoelectric properties of integrating sphere specimen 1 and sample 2 under drive current 350mA condition then, the parameter that obtains is seen Fig. 5.
The ordinate of Fig. 5 is light efficiency (1m/w), and abscissa is chip distribution of particles number.Sample 2 value corresponding are the thicker lines in top, and sample 1 value corresponding is the thinner lines in below.Draw sample 2 from Fig. 5 data and promote 6-7% than sample 1 light efficiency.The growing method that this patent provides has improved the light efficiency of large size chip.
Comparative example two,
Implementation step obtains sample 3 referring to comparative example one.
Embodiment two,
Implementation step obtains sample 4 referring to embodiment one.
Comparative example two can see the following form 2 with the growth parameter(s) contrast of embodiment two.
Table 2 comparative example two contrasts with the growth parameter(s) of embodiment two
Then, with sample 3 and sample 4 take with the same processing method of sample 1 and sample 2 after the photoelectric properties of specimen 3 and sample 4, the parameter that obtains is seen Fig. 6.The ordinate of Fig. 6 is brightness (Lm), and abscissa is chip distribution of particles number.Sample 4 value corresponding are the thicker lines in top, and sample 3 value corresponding are the thinner lines in below.Draw sample 4 from Fig. 6 data and promote 8-9% than sample 3 brightness.The growing method that this patent provides has improved the light efficiency of large size chip.
Referring to Fig. 2, the invention also discloses a kind of LED epitaxial structure that makes according to the growing method of above-mentioned compound multiple quantum well light emitting layer structure, the trap luminescent layer of described LED epitaxial structure comprises 6-8 elementary layer, each elementary layer comprises from bottom to up successively:
The first trap layer 3-A, the described first trap layer 3-A is the In of doping 2.7-3.5nmIn
xGa
(1-x)N trap layer, x=0.20-0.22;
The second trap layer 3-B, the described second trap layer 3-B is the In of doping 0.5-1.0nmIn
zGa
(1-z)N trap layer, z=0.04-0.08;
The first layer 3-C of heap of stone, the described first layer 3-C of heap of stone is the Al of doping 4-6nm, the Al of In
X1In
X2Ga
(1-x1-x2)N layer of heap of stone, x
1=0.04-0.05, x
2=0.10-0.12;
The first trap layer 3-A, the described first trap layer 3-A is the In of doping 2.7-3.5nmIn
xGa
(1-x)N trap layer, x=0.20-0.22;
The second trap layer 3-B, the described second trap layer 3-B is the In of doping 0.5-1.0nmIn
zGa
(1-z)N trap layer, z=0.04-0.08;
The second layer 3-D of heap of stone, the GaN layer of heap of stone that the described second layer 3-D of heap of stone is 10-12nm.
In addition, under the said units layer, also can comprise successively from bottom to up:
Low temperature buffer GaN layer 7, thickness are 30-50nm; This layer is the nucleating layer of growing at substrate, for the GaN growth that undopes provides crystal growth needed one-tenth nuclear island, becomes the nuclear island further growth to become crystal;
The GaN layer 8 that undopes, thickness is 2.5-3.0um; The growth of GaN of undoping is on the nucleating layer basis, become nuclear island constantly the complete merging of growth become complete crystal;
N-type GaN layer 4, thickness are 3.5-4.5 μ m, doping Si, the doping content control 8E+18-1E19atom/cm of Si
3
On described elementary layer, also can comprise successively from bottom to up:
P type AlGaN layer 6, thickness are the P type In of 30-40nm
yAl
(1-y)The GaN layer, y=0.08-0.12;
P type GaN layer 1, thickness is 60-90nm, doped with Mg, the doping content control 3E+18-4E18atom/cm of Mg
3
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (6)
1. the growing method of a compound multiple quantum well light emitting layer structure is characterized in that, comprises following step:
A, with temperature control at 710-750 ℃, chamber pressure control at 300-400mbar, the flow of feeding In is 1500-1700sccm, the In of the 2.7-3.5nm of grow doping In
xGa
(1-x)N trap layer, x=0.20-0.22;
B, keep temperature and pressure constant, the flow that feeds In is 300-450sccm, the In of the 0.5-1.0nm of grow doping In
zGa
(1-z)N trap layer, z=0.04-0.08,
C, keep-up pressure constantly, be warming up to 810-840 ℃, the flow that feeds Al is 30-50sccm, and the flow that feeds In is 800-1000sccm, the doped with Al of growth 4-6nm, the Al of In
X1In
X2Ga
(1-x1-x2)N layer of heap of stone, x
1=0.04-0.05, x
2=0.10-0.12;
D, repeating step A, B;
E, keep-up pressure constantly, be warming up to the GaN layer of heap of stone of 810-840 ℃ of growth 10-12nm;
F, repeating step A, B, C, D, E6-8 time reach 162-216nm until the general thickness of trap luminescent layer.
2. the growing method of a kind of compound multiple quantum well light emitting layer structure according to claim 1 is characterized in that, comprises step before the described steps A:
Under S1,1000-1100 ℃ the hydrogen atmosphere, chamber pressure is 150-200mbar, handles Sapphire Substrate 4-5 minute;
S2, be cooled to 540-570 ℃, chamber pressure is controlled at 450-600mbar, and growth thickness is the low temperature buffer layer GaN of 30-50nm on Sapphire Substrate;
S3, rising temperature are to 950-1050 ℃, and chamber pressure is controlled at 450-600mbar, continue the GaN that undopes of growth 2.5-3.0um;
S4, keep temperature-resistant, chamber pressure control at 200-400mbar, then continues the N-type GaN of growth 3.5-4.5 μ m doping Si, and the doping content of Si is controlled at 8E+18-1E19atom/cm
3
3. the growing method of a kind of compound multiple quantum well light emitting layer structure according to claim 1 is characterized in that, comprises step after the described step F:
D1, rising temperature are to 900-950 ℃, and chamber pressure is controlled at 150-300mbar, continue the P type In that growth 30-40nm mixes Al, In
yAl
(1-y)The GaN layer, y=0.08-0.12;
D2, rising temperature are to 1000-1100 ℃, and chamber pressure is controlled at 200-600mbar, continue the P type GaN layer that growth 60-90nm mixes Mg, and the doping content control of Mg is at 3E+18-4E18atom/cm
3
D3, be cooled to 650-700 ℃, behind the insulation 20-30min, cooling in the stove.
4. a LED epitaxial structure is characterized in that, the trap luminescent layer of described LED epitaxial structure comprises 6-8 elementary layer, and each elementary layer comprises from bottom to up successively:
The first trap layer, the described first trap layer is the In of doping 2.7-3.5nmIn
xGa
(1-x)N trap layer, x=0.20-0.22;
The second trap layer, the described second trap layer is the In of doping 0.5-1.0nmIn
zGa
(1-z)N trap layer, z=0.04-0.08;
First layer of heap of stone, described first layer of heap of stone is the Al of doping 4-6nm, the Al of In
X1In
X2Ga
(1-x1-x2)N layer of heap of stone, x
1=0.04-0.05, x
2=0.10-0.12;
The first trap layer, the described first trap layer is the In of doping 2.7-3.5nmIn
xGa
(1-x)N trap layer, x=0.20-0.22;
The second trap layer, the described second trap layer is the In of doping 0.5-1.0nmIn
zGa
(1-z)N trap layer, z=0.04-0.08;
Second layer of heap of stone, the GaN layer of heap of stone that described second layer of heap of stone is 10-12nm.
5. a kind of LED epitaxial structure according to claim 4 is characterized in that, comprises successively from bottom to up under the described elementary layer:
Low temperature buffer GaN layer, thickness are 30-50nm;
The GaN layer that undopes, thickness is 2.5-3.0um;
N-type GaN layer, thickness are 3.5-4.5 μ m, doping Si, the doping content control 8E+18-1E19atom/cm of Si
3
6. a kind of LED epitaxial structure according to claim 4 is characterized in that, comprises successively from bottom to up on the described elementary layer:
P type AlGaN layer, thickness are the P type In of 30-40nm
yAl
(1-y)The GaN layer, y=0.08-0.12;
P type GaN layer, thickness is 60-90nm, doped with Mg, the doping content control 3E+18-4E18atom/cm of Mg
3
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| CN103952684A (en) * | 2014-04-23 | 2014-07-30 | 湘能华磊光电股份有限公司 | LED (light-emitting diode) epitaxial layer growth method and LED epitaxial layer |
| CN104966767A (en) * | 2015-03-30 | 2015-10-07 | 华灿光电(苏州）有限公司 | Method for growing epitaxial wafer of GaN-based light emitting diode |
| CN111312867A (en) * | 2020-02-21 | 2020-06-19 | 湘能华磊光电股份有限公司 | Preparation method of single-chip white light LED |
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| CN104966767A (en) * | 2015-03-30 | 2015-10-07 | 华灿光电(苏州）有限公司 | Method for growing epitaxial wafer of GaN-based light emitting diode |
| CN104966767B (en) * | 2015-03-30 | 2018-01-09 | 华灿光电(苏州）有限公司 | A kind of growing method of GaN base light emitting epitaxial wafer |
| WO2020211346A1 (en) * | 2019-04-19 | 2020-10-22 | 开发晶照明（厦门）有限公司 | Light-emitting diode |
| CN111312867A (en) * | 2020-02-21 | 2020-06-19 | 湘能华磊光电股份有限公司 | Preparation method of single-chip white light LED |
| CN111312867B (en) * | 2020-02-21 | 2023-12-15 | 湘能华磊光电股份有限公司 | Preparation method of single-chip white light LED |
| CN115050866A (en) * | 2022-08-16 | 2022-09-13 | 江苏第三代半导体研究院有限公司 | Polarization-controllable quantum dot Micro-LED homoepitaxial structure and preparation method thereof |
| CN115050866B (en) * | 2022-08-16 | 2022-11-08 | 江苏第三代半导体研究院有限公司 | Polarization-controllable quantum dot Micro-LED homoepitaxial structure and preparation method thereof |
| CN115377259A (en) * | 2022-10-26 | 2022-11-22 | 江西兆驰半导体有限公司 | Light emitting diode epitaxial wafer, preparation method thereof and light emitting diode |
| CN115377259B (en) * | 2022-10-26 | 2023-01-31 | 江西兆驰半导体有限公司 | Light emitting diode epitaxial wafer, preparation method thereof and light emitting diode |
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