CN104953004A - High-reliability LAMP light-emitting diode packaging technology - Google Patents

High-reliability LAMP light-emitting diode packaging technology Download PDF

Info

Publication number
CN104953004A
CN104953004A CN201410120467.XA CN201410120467A CN104953004A CN 104953004 A CN104953004 A CN 104953004A CN 201410120467 A CN201410120467 A CN 201410120467A CN 104953004 A CN104953004 A CN 104953004A
Authority
CN
China
Prior art keywords
led
coating
line tail
support
point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410120467.XA
Other languages
Chinese (zh)
Inventor
严春伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangsu Wenrun Optoelectronic Co Ltd
Original Assignee
Jiangsu Wenrun Optoelectronic Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangsu Wenrun Optoelectronic Co Ltd filed Critical Jiangsu Wenrun Optoelectronic Co Ltd
Priority to CN201410120467.XA priority Critical patent/CN104953004A/en
Publication of CN104953004A publication Critical patent/CN104953004A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4899Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids
    • H01L2224/48996Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/48997Reinforcing structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/85951Forming additional members, e.g. for reinforcing

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

The invention relates to high-reliability LAMP light-emitting diode packaging technology. Normal die bonding and wire bonding are carried out on a LED chip, a conductive coating material is used for coating and covering a wire end after wire bonding, the covering material is baked and cured after covering, the LED wire end support and the conductive coating material are firmly bonded together, after baking, glue sealing, pin cutting and testing are normally carried out, and thus high-reliability LAMP light-emitting diode packaging is completed. When the method is used for packaging the LED, strength of the LED wire end can be greatly enhanced, LED failure caused by wire end breaking and falling during the LED use process can be avoided, and reliability of the LED is enhanced.

Description

A kind of high reliability LAMP light-emitting diode packaging technology
technical fieldthe present invention relates to a kind of high reliability LAMP light-emitting diode packaging technology
background technologylAMP light-emitting diode is a kind of comparatively traditional LED package form, and use field numerous, up to the present use amount is still very huge.LAMP encapsulation adopts the technique of gold thread bonding welding, is connected by LED chip with gold thread with support bonding, forms loop.
Tradition bonding welding procedure, is divided into A according to structure, B, C, D, E, 5 points (as accompanying drawing 1) by the gold thread connecting chip and support.Wherein D, E two points are two points the most fragile in bonding wire, and terminal client is in welding use procedure, and LED is heated after internal expansion and pulls inner gold thread structure, easily causes the fracture of D point or E point and support to come off, thus causes LED to lose efficacy.In order to reduce the phenomenons such as D, E point ruptures/comes off in the welding of tradition bonding, have employed the welding manners such as BSOB and BBOS.BSOB, first on support, make a call to a gold goal, then beat on gold goal by E dotted line tail, to improve the adhesion strength of E point and support, but gold thread D point is still exposed to outside, is still subject to stress fracture; BBOS; first gold thread line tail is beaten on support; make a call to a gold goal above online tail again and push down line tail; play the effect of protection D point and E point; but owing to beating the limitation of gold goal technique; gold goal is more difficult to be covered completely by D point and E point, and when beating gold goal, bonding wire porcelain mouth can produce certain compression to the D point of line tail, reduces the bonding strength of D point.
summary of the inventionin order to overcome traditional LAMP light-emitting diode, gold thread D, E point easily ruptures in welding process, come off the problem such as cause that LED lost efficacy, and proposes a kind of high reliability LAMP light-emitting diode packaging technology:
A kind of LED encapsulation structure, wherein comprises LED support, at least one LED chip, at least one gold thread, and a line tail overlay.Adopt the normal die bond bonding wire of LED support, conduction coating is used the coating of LED line tail to be covered to the semi-finished product after bonding wire, carrying out baking after coating makes coating solidification LED line tail and support be combined closely, normal sealing, cutting, test after baking.Complete low high reliability LAMP LED package.
LED wafer, as accompanying drawing 1, is 3. fixed to LED support by bonder and 1. goes up, normally toast after die bond by concrete operation method, and baking condition 150 DEG C of 2HRS, are bonded on chip and support by bonding equipment by gold thread after baking, the connection between conducting chip and support; Use conduction coating 9. 8. 7. the D point of LED line tail to be applied covering with E point to the semi-finished product after bonding wire, to covering baking-curing after covering, LED line tail support and conduction coating are firmly combined, normal sealing, cutting, test after baking.Complete low high reliability LAMP LED package.
The advantage of high reliability LAMP light-emitting diode packaging technology:
1, use covering D point more fragile for LED line tail, E point to be covered solidification completely, less gold thread line tail thermal stress pullling D, E point in LED use procedure, promote the intensity of LED internal structure
2, covering adopts electric conducting material (silver slurry, copper slurry etc.), even if LED in use, excessive line tail D, E point that causes of stress ruptures, comes off, and covering still by gold thread and support conducting, can guarantee that LED normally works.
embodimentas shown in Figure 1,3. LED wafer is fixed to LED support by bonder and 1. goes up, normally toast after die bond, baking condition 150 DEG C of 2HRS, are bonded on chip and support by bonding equipment by gold thread after baking, the connection between conducting chip and support; Conduction coating is used 9. 8. 7. the D point of LED line tail to be applied covering with E point to the semi-finished product after bonding wire, to covering baking-curing after covering, baking condition 150 DEG C of 2HRS, make LED line tail support and conduction coating firmly combine, normal sealing, cutting, test after baking.Complete low high reliability LAMP LED package.
Accompanying drawing explanation
Fig. 1 uses conducting objects that the coating of line tail is covered schematic diagram after normal bonding wire
Fig. 2 is traditional conventional bonding wire mode schematic diagram
Fig. 3 is BSOB bonding wire mode schematic diagram
Fig. 4 is BBOS bonding wire mode schematic diagram
Mark in figure is illustrated:
1. %2 LED support
2. %2 elargol
3. %2 LED chip
4. %2 LED A point
5. %2 LED B point
6. %2 LED C point
7. %2 LED D point
8. %2 LED E point
9. %2 line tail conduction covering
10. gold goal bottom %2 line tail
%2 line tail top-gold.

Claims (3)

1. a LED encapsulation structure, wherein comprises LED support, at least one LED chip, at least one gold thread, and a line tail overlay.Adopt the normal die bond bonding wire of LED support, conduction coating is used the coating of LED line tail to be covered to the semi-finished product after bonding wire, carrying out baking after coating makes coating solidification LED line tail and support be combined closely, normal sealing, cutting, test after baking.Complete low high reliability LAMP LED package.
2. LED encapsulation structure as claimed in claim 1, is characterized in that: LED line tail D point, E point need cover by coating completely.
3. LED encapsulation structure as claimed in claim 1, is characterized in that: coating is conduction coating, can be the mixture of the conducting metal such as silver powder, copper powder and resin.
CN201410120467.XA 2014-03-27 2014-03-27 High-reliability LAMP light-emitting diode packaging technology Pending CN104953004A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410120467.XA CN104953004A (en) 2014-03-27 2014-03-27 High-reliability LAMP light-emitting diode packaging technology

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410120467.XA CN104953004A (en) 2014-03-27 2014-03-27 High-reliability LAMP light-emitting diode packaging technology

Publications (1)

Publication Number Publication Date
CN104953004A true CN104953004A (en) 2015-09-30

Family

ID=54167532

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410120467.XA Pending CN104953004A (en) 2014-03-27 2014-03-27 High-reliability LAMP light-emitting diode packaging technology

Country Status (1)

Country Link
CN (1) CN104953004A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113540330A (en) * 2021-07-12 2021-10-22 格力电器(合肥)有限公司 Light-emitting diode

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1355571A (en) * 2000-11-23 2002-06-26 诠兴开发科技股份有限公司 Packaging method for LED
CN102130280A (en) * 2010-12-31 2011-07-20 浙江名芯半导体科技有限公司 LED (Light Emitting Diode) package solder joint structure and process
CN203179954U (en) * 2013-02-06 2013-09-04 华宏光电子(深圳)有限公司 LED welding wire packaging structure

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1355571A (en) * 2000-11-23 2002-06-26 诠兴开发科技股份有限公司 Packaging method for LED
CN102130280A (en) * 2010-12-31 2011-07-20 浙江名芯半导体科技有限公司 LED (Light Emitting Diode) package solder joint structure and process
CN203179954U (en) * 2013-02-06 2013-09-04 华宏光电子(深圳)有限公司 LED welding wire packaging structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113540330A (en) * 2021-07-12 2021-10-22 格力电器(合肥)有限公司 Light-emitting diode

Similar Documents

Publication Publication Date Title
US20130288406A1 (en) Method for manufacturing light emitting diode package having led die fixed by anisotropic conductive paste
JP2014179541A (en) Semiconductor device and method of manufacturing the same
CN102760825A (en) LED package and method for manufacturing same
CN104934404B (en) Semiconductor device and method for manufacturing the same
US8970053B2 (en) Semiconductor package having light-emitting-diode solder-bonded on first and second conductive pads separated by at least 75 UM
JP2015070199A (en) Light-emitting device
CN105591010B (en) The packaging method of LED chip, LED support and LED chip
CN104409615A (en) Flip LED chip and manufacturing method thereof, and flip LED chip packaging body and manufacturing method thereof
CN104953004A (en) High-reliability LAMP light-emitting diode packaging technology
CN101800206B (en) Semiconductor package and method of packaging the same
CN105140374A (en) Routing-free LED packaging structure and preparation method therefor
CN101834267B (en) Planar bracket and encapsulating method
CN114783895A (en) Application method of aluminum strip bonding wire in packaging body and manufactured semiconductor device
CN104835903A (en) Method for manufacturing low-light-decay ice blue light emitting diode
CN103594604A (en) LED support with electrodes being fully wrapped and packaged, SMD LED lamp and manufacturing method thereof
CN204230289U (en) LED chip and the LED support for LED chip
CN203521401U (en) High-density lead frame for packaging discrete semiconductor devices
CN208835051U (en) A kind of low stress semiconductor core piece fixed structure, semiconductor devices
JP3255284B2 (en) Semiconductor device and light emitting diode
CN201708185U (en) Plane bracket
CN201773836U (en) Package lead of integrated circuit device
CN208352340U (en) A kind of LAMP-LED encapsulating structure of high reliability
CN205920991U (en) LED packaging structure
CN104465634A (en) Chip pasting structure of SMD LED lamp and manufacturing method thereof
CN203932043U (en) A kind of power device of paster encapsulation

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20150930