CN105140374A - Routing-free LED packaging structure and preparation method therefor - Google Patents
Routing-free LED packaging structure and preparation method therefor Download PDFInfo
- Publication number
- CN105140374A CN105140374A CN201510494749.0A CN201510494749A CN105140374A CN 105140374 A CN105140374 A CN 105140374A CN 201510494749 A CN201510494749 A CN 201510494749A CN 105140374 A CN105140374 A CN 105140374A
- Authority
- CN
- China
- Prior art keywords
- led chip
- led
- bonding
- die bond
- routing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29339—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83909—Post-treatment of the layer connector or bonding area
- H01L2224/83951—Forming additional members, e.g. for reinforcing, fillet sealant
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
Abstract
A routing-free LED packaging structure and a preparation method therefor are disclosed. The routing-free LED packaging structure comprises an LED chip and a die-bonding substrate; the LED chip is arranged on the die-bonding substrate in a side-down manner; the LED chip and the die-bonding substrate are glued through insulation die-bonding adhesive; the side face of the side-down LED chip is coated with the insulation die-bonding adhesive; conductive silver adhesive for enabling the LED chip and the die-bonding substrate to be electrically communicated is coated on the insulation die-bonding adhesive on the side face of the LED chip; the LED chip is arranged in the side-down manner; the LED chip is glued on the die-bonding substrate through the insulation die-bonding adhesive; meanwhile, the insulation die-bonding adhesive is coated on the periphery, the side faces and the bottom of the side-down LED chip and then the LED chip is roasted and cured; the conductive silver adhesive is dispensed on the insulation die-bonding adhesive on the side face of the LED chip and then the LED chip is roasted and cured; and the LED chip is wrapped with potting adhesive. According to the preparation method, the LED chip is arranged in the side-down manner, and then die-bonding for two times by the die-bonding glue is performed, so that the purpose of electrically communicating the chip with the die-bonding substrate is fulfilled, and meanwhile, the light-emitting of the chip is reinforced, the packaging process is simple and the yield of the packaged product is high.
Description
Technical field
The present invention relates to the encapsulating structure of a kind of LED, and preparation method thereof, belong to light emitting semiconductor device manufacturing technology field.
Background technology
The appearance of LED is a revolution for conventional light source, and LED welcomes by illumination market deeply with the characteristic of its excellence, but it also brings the high shortcoming of looking forward to not of cost simultaneously, such as heat transmission aluminium, encapsulation gold thread.In encapsulation engineering, use gold thread to weld certainly will cause difficulty to popularizing of LED in cost control.
Conventional LED chip die bond encapsulating structure as shown in Figure 1, by there is the LED chip of conductive substrate layer, n-layer, luminescent layer and p-type layer from bottom to top conductive substrate layer by conductive silver glue 3 die bond on die bond substrate 1, routing spun gold 5 is set between p-type layer and die bond substrate 1, then by casting glue 6, LED chip and routing spun gold 5 is covered.
Use gold thread to cause as routing material the one side that LED product cost is high, and in LED process, the height of routing yield affects another importance that LED finished product yield affects product cost then.Packaging and routing is a very important processing step in whole encapsulation process, routing excellent not only by qualitative effects prepared by chip metal electrode, also depend on that in welding process, board is to the correction identification of chip, the appropriate adjustment of welding parameter, otherwise it is abnormal just to there will be routing, such as electrode delamination, be partially welded electric leakage, break dead lamp etc., and if once occur that bonding wire is not rejected extremely in time, the follow-up packaging cost that more continues then increases.
In order to tackle normal chip welding prepared by chip electrode to the requirement of quality, to the requirement of chip routing quality, people begin one's study the use of flip-chip.The method for packing of flip LED chips prepares two P that area is large, thickness is thick, N electrode pads on LED chip surface, with the ultrasonic wave gold wire ball solder joint on alternative patch support, the direct eutectic postwelding of heat-radiating substrate can not be needed to use.Chinese patent literature CN104269486A is for foregoing problems, a kind of flip LED chips and preparation method thereof is proposed, the preparation method of flip LED chips proposed have exempt from routing, perfect heat-dissipating, the advantage such as voltage is low, brightness is high, easy encapsulation, be compared to other flip-chips, without the need to preparing reflector, barrier layer, N linking layer, use and establish the double effect doing reflector of figuratum separator, do not need to make the PN welded disc that area is large, thickness is thick.But the method is complicated relative to formal dress chip technology at LED chip processing procedure, and product cost is far away higher than positive cartridge chip.
Chinese patent literature CN104078544A discloses a kind of LED chip and the packaging technology thereof of exempting from wire-bonding package, this LED chip of exempting from wire-bonding package once comprises transparency conducting layer, luminescent layer and substrate from top to bottom, also comprise positive electrode, negative electrode and isolated area, described positive electrode extends upwardly to hyaline layer along substrate, and described isolated area to be arranged between positive electrode and negative electrode and to extend upwardly to transparency conducting layer; Its packaging technology: negative electrode is set on substrate; Substrate arranges positive electrode, and makes positive electrode connect transparency conducting layer; Offer the isolation aisle that negative electrode and positive electrode are kept apart.This invention can overcome the low problem of the product yield that causes because of routing, but LED chip preparation process is complicated, and step is more, and the preparation cost of chip is obviously increased.
Summary of the invention
For the problem that the preparation process existed in existing LED process is complicated, cost is high, limit by bonding wire condition and bonding wire yield, the invention provides that a kind of encapsulation process is simple, yield is high exempts from routing LED encapsulation structure, a kind of preparation method of this structure is provided simultaneously.
Of the present inventionly exempt from routing LED encapsulation structure, by the following technical solutions:
This exempts from routing LED encapsulation structure, comprise LED chip and die bond substrate, LED chip side is placed on die bond substrate, bonding by insulation crystal-bonding adhesive between the two, die bond electrical property of substrate disconnects by arranging insulation partition by die bond substrate, form positive and negative polarities, the LED chip surrounding side that side is fallen also scribbles insulation crystal-bonding adhesive, and on the side, two ends being parallel to each conductive layer direction of LED chip coated with conductive elargol, conductive silver glue covers insulation crystal-bonding adhesive, the conductive silver glue of side, two ends is connected with positive and negative polarities respectively, is communicated with by LED chip with die bond electrical property of substrate.
The above-mentioned preparation method exempting from routing LED encapsulation structure, comprises the following steps:
(1) put treating to put upside down in the LED chip side of die bond, the whole bottom surface coating insulation crystal-bonding adhesive of the LED chip fallen in side, make LED chip be bonded on die bond substrate by insulation crystal-bonding adhesive, die bond substrate electrically disconnecting by arranging insulation partition, forming positive and negative polarities; Fall the surrounding side bottom coating insulation crystal-bonding adhesive of LED chip in side simultaneously; Then baking-curing;
Put upside down in LED chip side put can by overturning 90 ° of realizations again after bonder suction nozzle grab chips.
The insulation crystal-bonding adhesive height of LED chip surrounding side bottom coating is 15-30 micron.
(2) LED chip is fallen in the side after solidification, coated with conductive elargol on the side, two ends being parallel to each conductive layer direction of LED chip, conductive silver glue covers insulation crystal-bonding adhesive, the conductive silver glue of side, two ends is connected with positive and negative polarities respectively, LED chip is communicated with die bond electrical property of substrate, then baking-curing;
(3) coated casting glue outside LED chip, protects, and obtains the LED exempting from wire-bonding package.Casting glue external form is arc or square.
Baking-curing in step (1) and (2) toasts 60 minutes-90 minutes at 90 DEG C of-120 DEG C of temperature.
The present invention adopts and is fallen LED chip side, then the mode of twice crystal-bonding adhesive die bond is carried out, not only reach the object be communicated with die bond electrical property of substrate by chip, strengthen chip light emitting simultaneously, importantly substitute the mode of traditional routing, avoid because the metal electrode of chip own is prepared bad, or the not prison welding that in encapsulation process, routing causes, be partially welded electric leakage, a series of problems affecting product yield such as spun gold fracture.
Compare and existingly exempt from routing LED mode, routing LED encapsulation structure of exempting from of the present invention does not need particular process of manufacture or makes any change, prepares less demanding to chip metal pad, has the advantage that encapsulation process is simple, encapsulating products yield improves greatly simultaneously.
Accompanying drawing explanation
Fig. 1 is conventional LED chip die bond encapsulating structure schematic diagram.
Fig. 2 is the semiconductor structure schematic diagram in the present invention after die bond.
Fig. 3 is the semiconductor structure schematic diagram in the present invention after spot printing conductive silver glue.
Fig. 4 is the overall structure schematic diagram in the present invention after casting glue.
In figure, 1, die bond substrate, 2, insulation crystal-bonding adhesive, 3, conductive silver glue, 4, insulation cuts off, 5, routing spun gold, 6, casting glue.
Embodiment
Of the present inventionly exempt from routing LED encapsulation structure as shown in Figure 4, comprise LED chip and die bond substrate 1, LED chip side is placed on die bond substrate 1, bonding by insulation crystal-bonding adhesive 2 between the two, the LED chip side surrounding that side is fallen also scribbles insulation crystal-bonding adhesive, coated with conductive elargol 3 on the side, two ends being parallel to each conductive layer direction of LED chip, conductive silver glue 3 is by LED chip and die bond substrate 1 electrical communication, die bond substrate 1 electrically disconnects by arranging insulation partition 4 by die bond substrate 1, form positive and negative polarities, be connected with the conductive silver glue 3 of described side, LED chip two ends respectively.This encapsulating structure is applicable to the LED chip with vertical stratification.
The above-mentioned preparation process exempting from routing LED encapsulation structure is as follows:
(1) as shown in Figure 2, put treating to put upside down in the LED chip side of die bond (substrate layer of LED chip, n-layer, luminescent layer and p-type layer being changed into from left to right or horizontal positioned of turning left from the right side by vertical placement from bottom to top), after can capturing the normal LED chip placed by bonder suction nozzle, upset 90 ° realizes chip side.The whole bottom surface coating insulation crystal-bonding adhesive 2 of the LED chip fallen in side, LED chip side being fallen by insulation crystal-bonding adhesive 2 is bonded on die bond substrate 1.Meanwhile, the insulation crystal-bonding adhesive of surrounding side bottom coating 15-30 micron thickness of LED chip is fallen in side.Then at 90 DEG C of-120 DEG C of temperature, solidification in 60 minutes-90 minutes is toasted.Die bond substrate 1 electrically disconnecting by arranging insulation partition 4, forming positive and negative polarities.
(2) as shown in Figure 3, spot printing conductive silver glue 3 on the insulation crystal-bonding adhesive of the side, two ends (lateral surface of substrate layer and p-type layer) being parallel to each conductive layer direction of LED chip after hardening, by LED chip by the lateral surface of substrate layer and p-type layer respectively with die bond substrate 1 electrical communication.And then at 90 DEG C of-120 DEG C of temperature, toast solidification in 60 minutes-90 minutes.
(3) as shown in Figure 4, outside whole LED chip, coated casting glue 6, all envelopes LED chip, insulation crystal-bonding adhesive and conductive silver glue, protects, and obtains the LED exempting from wire-bonding package.Casting glue 6 external form can be arc, also can be square, according to embody rule occasion demand with the use of.
Claims (6)
1. exempt from routing LED encapsulation structure for one kind, comprise LED chip and die bond substrate, it is characterized in that, LED chip side is placed on die bond substrate, bonding by insulation crystal-bonding adhesive between the two, die bond electrical property of substrate disconnects by arranging insulation partition by die bond substrate, form positive and negative polarities, the LED chip surrounding side that side is fallen also scribbles insulation crystal-bonding adhesive, and on the side, two ends being parallel to each conductive layer direction of LED chip coated with conductive elargol, conductive silver glue covers insulation crystal-bonding adhesive, the conductive silver glue of side, two ends is connected with positive and negative polarities respectively, LED chip is communicated with die bond electrical property of substrate.
2. exempt from a preparation method for routing LED encapsulation structure described in claim 1, it is characterized in that, comprise the following steps:
(1) put treating to put upside down in the LED chip side of die bond, the whole bottom surface coating insulation crystal-bonding adhesive of the LED chip fallen in side, make LED chip be bonded on die bond substrate by insulation crystal-bonding adhesive, die bond substrate electrically disconnecting by arranging insulation partition, forming positive and negative polarities; Fall the surrounding side bottom coating insulation crystal-bonding adhesive of LED chip in side simultaneously; Then baking-curing;
(2) LED chip is fallen in the side after solidification, coated with conductive elargol on the side, two ends being parallel to each conductive layer direction of LED chip, conductive silver glue covers insulation crystal-bonding adhesive, the conductive silver glue of side, two ends is connected with positive and negative polarities respectively, LED chip is communicated with die bond electrical property of substrate, then baking-curing;
(3) coated casting glue outside LED chip, protects, and obtains the LED exempting from wire-bonding package.
3. the preparation method exempting from routing LED encapsulation structure according to claim 2, is characterized in that, in described step (1), LED chip side overturns 90 ° of realizations after being placed through bonder suction nozzle grab chips.
4. the preparation method exempting from routing LED encapsulation structure according to claim 2, is characterized in that, in described step (1), the insulation crystal-bonding adhesive height of LED chip surrounding side coating is 15-30 micron.
5. the preparation method exempting from routing LED encapsulation structure according to claim 2, is characterized in that, the baking-curing in described step (1) and (2) toasts 60 minutes-90 minutes at 90 DEG C of-120 DEG C of temperature.
6. the preparation method exempting from routing LED encapsulation structure according to claim 2, is characterized in that, in described step (3), casting glue external form is arc or square.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510494749.0A CN105140374A (en) | 2015-08-13 | 2015-08-13 | Routing-free LED packaging structure and preparation method therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510494749.0A CN105140374A (en) | 2015-08-13 | 2015-08-13 | Routing-free LED packaging structure and preparation method therefor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105140374A true CN105140374A (en) | 2015-12-09 |
Family
ID=54725656
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510494749.0A Pending CN105140374A (en) | 2015-08-13 | 2015-08-13 | Routing-free LED packaging structure and preparation method therefor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105140374A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107895756A (en) * | 2017-10-17 | 2018-04-10 | 丽智电子(昆山)有限公司 | A kind of LED device |
| CN108075029A (en) * | 2017-12-27 | 2018-05-25 | 孙培清 | A kind of energy-saving illumination device |
| CN111370550A (en) * | 2018-12-25 | 2020-07-03 | 山东浪潮华光光电子股份有限公司 | Packaging method of red light LED chip |
| JP2020141062A (en) * | 2019-02-28 | 2020-09-03 | 日亜化学工業株式会社 | Manufacturing method of light-emitting device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5749284A (en) * | 1980-09-09 | 1982-03-23 | Matsushita Electric Ind Co Ltd | Manufacture of light-emitting display device |
| CN1189702A (en) * | 1996-12-27 | 1998-08-05 | 夏普公司 | Light emitting display element, method for connecting same to electric wiring substrate and method of manufacturing same |
| JP2004311480A (en) * | 2003-04-02 | 2004-11-04 | Matsushita Electric Works Ltd | Semiconductor light emitting element |
-
2015
- 2015-08-13 CN CN201510494749.0A patent/CN105140374A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5749284A (en) * | 1980-09-09 | 1982-03-23 | Matsushita Electric Ind Co Ltd | Manufacture of light-emitting display device |
| CN1189702A (en) * | 1996-12-27 | 1998-08-05 | 夏普公司 | Light emitting display element, method for connecting same to electric wiring substrate and method of manufacturing same |
| JP2004311480A (en) * | 2003-04-02 | 2004-11-04 | Matsushita Electric Works Ltd | Semiconductor light emitting element |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107895756A (en) * | 2017-10-17 | 2018-04-10 | 丽智电子(昆山)有限公司 | A kind of LED device |
| CN108075029A (en) * | 2017-12-27 | 2018-05-25 | 孙培清 | A kind of energy-saving illumination device |
| CN111370550A (en) * | 2018-12-25 | 2020-07-03 | 山东浪潮华光光电子股份有限公司 | Packaging method of red light LED chip |
| JP2020141062A (en) * | 2019-02-28 | 2020-09-03 | 日亜化学工業株式会社 | Manufacturing method of light-emitting device |
| JP7158647B2 (en) | 2019-02-28 | 2022-10-24 | 日亜化学工業株式会社 | Method for manufacturing light emitting device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8772062B2 (en) | Method for manufacturing light emitting diode package having LED die fixed by anisotropic conductive paste | |
| US20120025241A1 (en) | Surface mounted led packaging structure and method based on a silicon substrate | |
| CN102280433B (en) | Encapsulation structure and encapsulation method for wafer-level die sizes | |
| CN101350321A (en) | Method for manufacturing LED directly mounted on a support upside-down | |
| CN105140374A (en) | Routing-free LED packaging structure and preparation method therefor | |
| CN102931322A (en) | High-power COB-packaged LED structure and wafer-level manufacturing process thereof | |
| US8970053B2 (en) | Semiconductor package having light-emitting-diode solder-bonded on first and second conductive pads separated by at least 75 UM | |
| CN103187408A (en) | Light-emitting diode packaging structure | |
| CN104409615A (en) | Flip LED chip and manufacturing method thereof, and flip LED chip packaging body and manufacturing method thereof | |
| CN207052626U (en) | A kind of flip LED light source | |
| CN104037302B (en) | LED (light-emitting diode) package assembly | |
| CN104979441B (en) | A kind of LED chip and preparation method thereof and LED display | |
| CN203787456U (en) | Flip chip packaging structure | |
| CN100416875C (en) | Structure of package using coupling and its forming method | |
| CN103956420A (en) | LED crystal covering structure coated with fluorescent powder and manufacturing method of LED crystal covering structure coated with fluorescent powder | |
| CN103346234A (en) | LED packaging structure and packaging method thereof | |
| CN206364006U (en) | A kind of semiconductor package | |
| CN109473519A (en) | Flip LED structure and its manufacturing method | |
| CN102104037B (en) | Luminous device with integrated circuit and manufacturing method thereof | |
| CN105990298A (en) | Chip packaging structure and preparation method thereof | |
| CN204596777U (en) | Based on LED light source and the LED silk of face-down bonding | |
| CN103078043A (en) | Packaging structure and process of COB (Chip On board) LED (Light Emitting Diode) | |
| CN103296153A (en) | Encapsulating method for LED chips | |
| CN201904337U (en) | Luminescent device with integrated circuit | |
| CN203351646U (en) | LED packaging structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20151209 |
|
| RJ01 | Rejection of invention patent application after publication |