CN104934401A - 电力用半导体装置 - Google Patents

电力用半导体装置 Download PDF

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Publication number
CN104934401A
CN104934401A CN201510126143.1A CN201510126143A CN104934401A CN 104934401 A CN104934401 A CN 104934401A CN 201510126143 A CN201510126143 A CN 201510126143A CN 104934401 A CN104934401 A CN 104934401A
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CN
China
Prior art keywords
power semiconductor
zygonema
semiconductor device
auxiliary bond
major key
Prior art date
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Pending
Application number
CN201510126143.1A
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English (en)
Inventor
东久保耕一
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Publication of CN104934401A publication Critical patent/CN104934401A/zh
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Abstract

提供了一种电力用半导体装置，其能够提高电力用半导体元件的电极层和配线部之间的电路径的机械稳定性，并能够通过将电路径分散开而缓和电流集中。电力用半导体元件(10)具有由导体制作而成的电极层(11)。第1配线部(21)由导体制作而成，与电力用半导体元件(10)分离。至少1条主键合线(30)具有位于电极层(11)上的一端和位于第1配线部(21)上的另一端。至少1条副键合线(51)支撑主键合线(30)，并在电极层(11)以及第1配线部(21)中的某一方上具有两端。

Description

电力用半导体装置
技术领域
本发明涉及一种电力用半导体装置，特别是涉及一种具有键合线的电力用半导体装置。
背景技术
为了在半导体模块内部中进行配线，经常使用键合线。键合线由铜、银或金等金属构成，例如具有100～500μm左右的线径(直径)。
配线后的键合线的线环高度，可能影响半导体装置的高度尺寸。因此，从半导体装置的大小的角度来讲，大多优选线环高度较低。另一方面，在使用高度较低的线环的情况下，有可能与周围的不同电位的部位发生非优选的过度接近或接触。因此，正在研究应对该问题的方法。
根据日本特开2003－31605号公报(专利文献1)，在对半导体芯片实施导线键合而制造半导体模块时，为了避免线环和处于线环附近的部件之间的接触，确保优选的线环高度，而先行形成撑起线环的另外的线环(也称为枕木线)。由此，能够避免线环和处于线环附近的部件之间的接触，确保优选的线环高度。
专利文献1：日本特开2003－31605号公报
根据上述公报所述的技术，通过枕木线提高键合线的机械稳定性。但是，键合线所需要的性能不仅仅是机械稳定性。
特别是在半导体装置为电力用半导体装置(功率模块)的情况下，在用于供由电力用半导体装置控制的电流(主电流)流动的键合线中，有较大的电流流过。在这样处理较大的电流的情况下，电流的局部集中可能成为问题。因此，在功率模块中，为了主电流，大多情况下并不是仅使用1条键合线，而是使用并列地配置的多条键合线。例如，大多情况下并不是将1条，而是将数条键合线与功率MOSFET(Metal Oxide Semiconductor Field Effect Transistor)的源极电极焊盘接合。但是，如上述那样并列配置的键合线的数量以及其配置存在限度，因此，需要一种能够代替此方法或能够与此方法并用的方法。
发明内容
本发明就是为了解决上述课题而提出的，其目的在于提供一种电力用半导体装置，其能够提高电力用半导体元件的电极层和配线部之间的电路径的机械稳定性，并能够通过将电路径分散开而缓和电流集中。
本发明的电力用半导体装置具有电力用半导体元件、第1配线部、至少1条主键合线以及至少1条副键合线。电力用半导体元件具有由导体制作而成的电极层。第1配线部由导体制作而成，与电力用半导体元件分离。至少1条主键合线具有位于电极层上的一端和位于第1配线部上的另一端。至少1条副键合线支撑主键合线，并在电极层以及第1配线部中的某一方上具有两端。
发明的效果
根据本发明的电力用半导体装置，将电力用半导体元件的电极层和配线部电连接的主键合线由副键合线支撑。由此，提高电力用半导体元件的电极层和配线部之间的电路径的机械稳定性。因此，能够抑制作为电力用半导体元件以及配线部之间的电路径的主键合线与周围的不同电位的部位发生非优选的接近。
另外，电力用半导体元件的电极层和配线部之间的电路径不仅由主键合线构成，还由副键合线构成。由此，将电路径分散开。因此，能够缓和本电力用半导体装置中的电流集中。
通过上述方式，能够提高电力用半导体元件的电极层和配线部之间的电路径的机械稳定性，并能够通过将电路径分散开而缓和电流集中。
附图说明
图1是概略地表示本发明的实施方式1中的电力用半导体装置的结构的局部俯视图(A)、以及沿图1(A)的ⅠB－ⅠB线的概略局部剖面图(B)。
图2是概略地表示本发明的实施方式2中的电力用半导体装置的结构的局部俯视图(A)、以及沿图2(A)的ⅡB－ⅡB线的概略局部剖面图(B)。
图3是概略地表示本发明的实施方式3中的电力用半导体装置的结构的局部俯视图(A)、以及沿图3(A)的ⅢB－ⅢB线的概略局部剖面图(B)。
图4是概略地表示本发明的实施方式4中的电力用半导体装置的结构的局部俯视图(A)、以及沿图4(A)的ⅣB－ⅣB线的概略局部剖面图(B)。
图5是概略地表示本发明的实施方式5中的电力用半导体装置的结构的局部俯视图(A)、沿图5(A)的ⅤB－ⅤB线的概略局部剖面图(B)、以及沿图5(A)的ⅤC－ⅤC线的概略局部剖面图(C)。
标号的说明
L1直线部(第1直线部)，L2直线部(第2直线部)，BP键合点，10电力用半导体元件，11电极焊盘(电极层)，20、20M配线图案，21配线部(第1配线部)，22配线部(第2配线部)，29安装部，30主键合线，51、51B、52、52R副键合线，30a～30d主导线，52a～52c副导线，84封装部，91～95功率模块(电力用半导体装置)。
具体实施方式
下面，基于附图对本发明的实施方式进行说明。此外，在以下附图中，对于相同或相当的部分标注相同的参考编号，并省略其说明。
(实施方式1)
图1(A)是概略地表示本实施方式的功率模块91(电力用半导体装置)的结构的局部俯视图。图1(B)是沿图1(A)的ⅠB－ⅠB线的概略局部剖面图。此外，为了使图容易观察，对于封装部84仅示出其表面。
功率模块91具有电力用半导体元件10、配线图案20、多条主键合线30、副键合线51、焊料部81、绝缘基板82、基底层83以及封装部84。
配线图案20由金属等导体制作，具有配线部21(第1配线部)以及安装部29。在配线部21设置有具有直线部L2(第2直线部)的缘部。
在配线图案20的安装部29上，使用焊料部81而安装有电力用半导体元件10。配线部21与电力用半导体元件10分离。
电力用半导体元件10在其表面部12上具有由金属等导体制作而成的电极焊盘11(电极层)。在电极焊盘11设置有具有直线部L1(第1直线部)的缘部。直线部L1以及L2彼此相对。在本实施方式中，直线部L1以及L2彼此平行。
关于电力用半导体元件10，典型地，是在大于或等于150℃时能够进行动作的功率器件，例如，是MOSFET(Metal OxideSemiconductor Field Effect Transistor)等MISFET(Metal InsulatorSemiconductor Field Effect Transistor)、IGBT(Insulated Gate BipolarTransistor)、或二极管。电极焊盘11并不是如栅极焊盘那样的信号电流用焊盘，而是主电流用焊盘。在上述的电力用半导体元件的例子中，电极焊盘11是源极电极焊盘、漏极电极焊盘、发射极电极焊盘、集电极电极焊盘、阳极电极焊盘或阴极电极焊盘，典型地，是源极电极焊盘、发射极电极焊盘或阳极电极焊盘。
主键合线30具有主导线30a～30d。主导线30a～30d分别具有位于电极焊盘11上的一端(图中，右端)和位于配线部21上的另一端(图中左端)。
副键合线51在电极焊盘11上具有两端。副键合线51支撑主键合线30。副键合线51在俯视布局图(图1(A))中与主导线30a～30d分别交叉，在图中是正交。副键合线51在俯视布局图中沿直线部L1以及L2中的至少一个而延伸，在本实施方式中沿直线部L1以及L2这两者延伸。
封装部84的材料是绝缘体，能够使用树脂或凝胶。在封装部84是凝胶的情况下，也可以设置用于收容该封装部84的壳体。
根据本实施方式，将电力用半导体元件10的电极焊盘11和配线部21电连接的主键合线30由副键合线51支撑。由此，提高电极焊盘11和配线部21之间的电路径的机械稳定性。因此，能够抑制作为电极焊盘11和配线部21之间的电路径的主键合线30与周围的不同电位的部位发生非优选的接近。例如，能够抑制主键合线30向电力用半导体元件10的表面部12的缘部接近。
另外，电极焊盘11和配线部21之间的电路径，不仅由主键合线30构成，还由副键合线51构成。由此，将电路径分散开。因此，能够缓和功率模块91中的电流集中。特别是，如本实施方式所示，在副键合线51具有位于电极焊盘11上的两端的情况下，从配线部21至电极焊盘11的电路径在主键合线30以及副键合线51彼此接触的部位进行分支，不仅向主键合线30的另一端(图中，右端)延伸，也向副键合线的两端延伸。即，来自配线部21的电路径的连接部位在电极焊盘11上被进一步分散。由此，缓和电力用半导体元件10的电极焊盘11中的局部的电流集中。
通过上述方式，能够提高电力用半导体元件10的电极焊盘11和配线部21之间的电路径的机械稳定性，并能够通过对电路径进行分散而缓和电流集中。其结果，例如，功率模块91的制造过程中的成品率能够提高。另外，能够将功率模块91长寿命化。另外，能够实现由电流损失的降低而带来的节能效果。
另外，电力用半导体元件10典型地，是能够在大于或等于150℃时动作的功率器件，并在功率模块91中产生比较大的热膨胀收缩。由于存在主键合线30，该热膨胀收缩容易产生方向性。特别是，如图1(A)所示，如果并列地配置主导线30a～30d，则由于在功率模块91中存在主导线30a～30d，换句话说由于存在主导线30a～30d各自的延伸方向(图1(A)中的横向)的影响而产生的热膨胀收缩的方向性，更容易成为问题。根据本实施方式，由于存在向与主导线30a～30d不同的方向延伸的副键合线51，因此，能够缓和该方向性。由此，能够缓和功率模块91内的应力。
电力用半导体元件10也可以是碳化硅半导体元件以及砷化镓半导体元件中的某一种。与作为半导体材料最常见的硅(Si)相比，碳化硅(SiC)以及砷化镓(GaAs)具有较大的线膨胀系数。如果举例示出典型的值，则相对于Si为2.4×10-6/K而言，SiC为4.5×10-6/K，另外GaAs为6.86×10-6/K。因此，在使用碳化硅半导体元件或砷化镓半导体元件的情况下，特别需要缓和功率模块91内的应力。因此，通过应用本实施方式，能够得到特别大的优点。
另外，主键合线30并不是包含1条主导线，而是包含主导线30a～30d，其原因在于，主键合线30并不是如信号电流那样的小电流的路径，而是被电力用半导体元件10作为控制对象的主电流的电路径。在这样处理大电流的情况下，通过副键合线51实现的电流路径的分散的优点特别大。
副键合线51在俯视布局图(图1(A))中，与主导线30a～30d分别交叉。由此，1条副键合线51能够支撑多条主导线30a～30d。
主键合线30在俯视布局图(图1(A))中，大多设置为与直线部L1以及L2中的至少一方大致正交。因此，如本实施方式所示，在副键合线51在俯视布局图中沿直线部L1以及L2中的至少一方而延伸的情况下，能够使主键合线30和副键合线51大致正交。其结果，进一步提高电力用半导体元件10的电极焊盘11和配线部21之间的电路径的机械稳定性。
副键合线51的硬度可以比主键合线30的硬度小。在该情况下，副键合线51难以对作为电路径来说更重要的主键合线30造成损伤。
副键合线51的线径可以与主键合线30的线径不同。在该情况下，能够通过副键合线51的线径，对在功率模块91中所需要的主键合线30的延伸状态，特别是线环的弯曲状态进行调整。
主键合线30以及副键合线51也可以由相同材料制作且具有相同线径。在该情况下，形成主键合线30以及副键合线51的工序是类似的。因此，能够更容易地形成主键合线30以及副键合线51。
此外，在本实施方式中，使用具有配线图案20、绝缘基板82和基底层83的电路基板，但也可以使用代替该电路基板的结构。例如，也可以使用引线框，在该情况下，引线框的一部分对应于第1配线部。另外，直线部L1以及L2并不是必须设置的形状。另外，根据电流的大小，也可以代替多条主键合线30而使用1条主键合线30。
(实施方式2)
图2(A)是概略地表示本实施方式的功率模块92(电力用半导体装置)的结构的局部俯视图。图2(B)是沿图2(A)的ⅡB－ⅡB线的概略局部剖面图。此外，为了使图容易观察，对于封装部84仅示出其表面。
在功率模块92(电力用半导体装置)中，代替实施方式1中的副键合线51(图1(A)以及(B))，而具有至少一条副键合线52。副键合线52在配线部21上具有两端。副键合线52在俯视布局图(图2(A))中与主导线30a～30d分别交叉，在图中是正交。副键合线52在俯视布局图中沿直线部L1以及L2中的至少一方而延伸，在本实施方式中沿直线部L1以及L2这两者延伸。
此外，关于上述以外的结构，由于与上述的实施方式1的结构大致相同，因此，对于相同或对应的要素标注相同的标号，并不重复其说明。
根据本实施方式，与实施方式1相同，也能够提高电力用半导体元件10的电极焊盘11和配线部之间的电路径的机械稳定性，并能够通过对电路径进行分散而缓和电流集中。另外，能够缓和功率模块92内的应力。
另外，在本实施方式中，特别地，副键合线52并不是具有位于电极焊盘11上的两端，而是具有位于配线部21上的两端。因此，能够将副键合线52的两端以与电极焊盘11的大小不相关的方式配置。这点在电极焊盘11的大小较小的情况下是特别有利的。
副键合线52在俯视布局图(图2(A))中与主导线30a～30d分别交叉。由此，1条副键合线52能够支撑多条主导线。
如本实施方式所示，在副键合线52在俯视布局图中沿直线部L1以及L2中的至少一方而延伸的情况下，能够使主键合线30和副键合线52大致正交。其结果，能够进一步提高电力用半导体元件10的电极焊盘11和配线部21之间的电路径的机械稳定性。
关于副键合线52的线径以及材料，通过与实施方式1相同的选择，能够得到大致相同的效果。
此外，在本实施方式的结构基础上，还可以设置实施方式1的副键合线51。
(实施方式3)
图3(A)是概略地表示本实施方式的功率模块93(电力用半导体装置)的结构的局部俯视图。图3(B)是沿图3(A)的ⅢB－ⅢB线的概略局部剖面图。此外，为了使图容易观察，对于封装部84仅示出其表面。
在功率模块93(电力用半导体装置)中代替配线图案20而具有配线图案20M。配线图案20M在配线图案20的结构基础上，具有配线部22(第2配线部)。配线部22设置在配线部21以及安装部29之间。在此，由于电极焊盘11位于安装部29上，因此换句话说，配线部22设置在配线部21以及电极焊盘11之间。配线部22与主键合线30分离，并被主键合线30跨越。
此外，关于上述以外的结构，由于与上述的实施方式2的结构大致相同，因此，对于相同或对应的要素标注相同的标号，并不重复其说明。
根据本实施方式，与实施方式2相同，也能够提高电力用半导体元件10的电极焊盘11和配线部21之间的电路径的机械稳定性，并能够通过对电路径进行分散而缓和电流集中。另外，能够缓和功率模块93内的应力。
另外，关于本实施方式，特别地，能够抑制作为电力用半导体元件10以及配线部21之间的电路径的主键合线30与配线部22之间发生非优选的接近。
(实施方式4)
图4(A)是概略地表示本实施方式的功率模块94(电力用半导体装置)的结构的局部俯视图。图4(B)是沿图4(A)的ⅣB－ⅣB线的概略局部剖面图。此外，为了使图容易观察，对于封装部84仅示出其表面。
功率模块94(电力用半导体装置)具有与实施方式1相同的副键合线51。此外，关于除此以外的结构，由于与上述的实施方式3的结构大致相同，因此，对于相同或对应的要素标注相同的标号，并不重复其说明。
根据本实施方式，通过设置副键合线51，能够更可靠地得到在实施方式3中说明过的效果。此外，副键合线52在不需要的情况下，也可以省略。
(实施方式5)
图5(A)是概略地表示本实施方式的功率模块95(电力用半导体装置)的结构的局部俯视图。图5(B)是沿图5(A)的ⅤB－ⅤB线的概略局部剖面图。图5(C)是沿图5(A)的ⅤC－ⅤC线的概略局部剖面图。此外，为了使图容易观察，对于封装部84仅示出其表面。
在功率模块95(电力用半导体装置)中代替副键合线52(图4(A)以及(B))，而具有至少1条副键合线52R。在本实施方式中，副键合线52R具有副导线52a～52c。副导线52a仅支撑主导线30a～30c中的主导线30a。副导线52b仅支撑主导线30a～30c中的主导线30b。
另外，在功率模块95中代替副键合线51(图4(A)以及(B))，而具有至少1条副键合线51B。副键合线51B在俯视布局图中，不仅在两端，在主导线30a以及30b之间和主导线30b以及30c之间也具有键合点BP。副键合线51B在俯视布局图中沿直线部L1以及L2中的至少一方而延伸，在本实施方式中沿直线部L1以及L2这两者延伸。
此外，关于上述以外的结构，由于与上述的实施方式4的结构大致相同，因此，对于相同或对应的要素标注相同的标号，并不重复其说明。
根据本实施方式，能够将包含于副键合线52R的副导线52a～52c分别设为比副键合线52(图4(A)以及(B))短。因此，能够提高副导线52a～52c的刚性。因此，进一步提高电力用半导体元件10的电极焊盘11和配线部21之间的电路径的机械稳定性。
另外，副键合线51B由于除了其两端以外，还具有键合点BP，因此具有更高的刚性。因此，进一步提高电力用半导体元件10的电极焊盘11和配线部21之间的电路径的机械稳定性。
另外，副键合线51B与副键合线52R相比，容易沿直线部L1以及L2中的至少一方而延伸。因此，容易使主键合线30和副键合线51B大致正交。其结果，进一步提高电力用半导体元件10的电极焊盘11和配线部21之间的电路径的机械稳定性。
关于副键合线51B以及52R的线径以及材料，通过与实施方式1相同的选择，能够得到大致相同的效果。
此外，如副键合线51B那样，除了其两端以外还具有键合点BP的导线也可以设置在配线部21上。另外，如副导线52a～52c那样的副键合线52R也可以设置在电极焊盘11上。
此外，本发明在其发明的范围内，能够自由地组合各实施方式，或者适当地对各实施方式进行变形、省略。

Claims (11)

1.一种电力用半导体装置，其具有：
电力用半导体元件，其具有由导体制作而成的电极层，
第1配线部，其由导体制作而成，与所述电力用半导体元件分离，
至少1条主键合线，其具有位于所述电极层上的一端和位于所述第1配线部上的另一端，
至少1条副键合线，其支撑所述主键合线，在所述电极层以及所述第1配线部中的某一方上具有两端。
2.根据权利要求1所述的电力用半导体装置，其中，
所述至少1条主键合线包含第1以及第2主导线。
3.根据权利要求2所述的电力用半导体装置，其中，
所述至少1条副键合线在俯视布局图中与所述第1以及第2主导线交叉。
4.根据权利要求2所述的电力用半导体装置，其中，
所述至少1条副键合线包含仅支撑所述第1以及第2主导线中的一方的第1副导线和仅支撑另一方的第2副导线。
5.根据权利要求2所述的电力用半导体装置，其中，
所述至少1条副键合线包含在俯视布局图中在所述第1以及第2主导线之间具有键合点的键合线。
6.根据权利要求1至5中任一项所述的电力用半导体装置，其中，
在所述电力用半导体元件的所述电极层设置有具有第1直线部的缘部，在所述第1配线部设置有具有与所述第1直线部相对的第2直线部的缘部，所述副键合线在俯视布局图中，沿所述第1直线部以及所述第2直线部中的至少某一方而延伸。
7.根据权利要求1至5中任一项所述的电力用半导体装置，其中，
还具有第2配线部，该第2配线部设置在所述电力用半导体元件的所述电极层以及所述第1配线部之间，并被所述主键合线跨越。
8.根据权利要求1至5中任一项所述的电力用半导体装置，其中，
所述副键合线的硬度比所述主键合线的硬度小。
9.根据权利要求1至5中任一项所述的电力用半导体装置，其中，
所述副键合线的线径与所述主键合线的线径不同。
10.根据权利要求1至5中任一项所述的电力用半导体装置，其中，
所述主键合线以及所述副键合线由相同材料制作而成且具有相同线径。
11.根据权利要求1至5中任一项所述的电力用半导体装置，其中，
所述电力用半导体元件是碳化硅半导体元件以及砷化镓半导体元件中的某一种。
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Application publication date: 20150923