CN101431059A - 打线结构及方法 - Google Patents
打线结构及方法 Download PDFInfo
- Publication number
- CN101431059A CN101431059A CNA2007101692620A CN200710169262A CN101431059A CN 101431059 A CN101431059 A CN 101431059A CN A2007101692620 A CNA2007101692620 A CN A2007101692620A CN 200710169262 A CN200710169262 A CN 200710169262A CN 101431059 A CN101431059 A CN 101431059A
- Authority
- CN
- China
- Prior art keywords
- electronic component
- electrical contact
- bonding wire
- solder joint
- tip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
- H01L2224/48496—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball not being interposed between the wire connector and the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/78301—Capillary
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
- H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
- H01L2224/8518—Translational movements
- H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
一种打线结构及方法,将夹置有焊线的焊嘴先在第一电子元件的电性接点形成一金属凸块,再使该焊嘴于该电性接点上形成一球形焊点,并上移及下引该焊嘴至第二电子元件,以在第二电子元件的电性接点上形成缝接焊点,进而形成第一及第二电子元件的电性连接,并使该焊线位于第一电子元件电性接点上方转折处附近用来支撑且抵靠在该金属凸块上,达到压低线弧高度目的,并且可避免在后续运送过程或封装模压制造方法中因模流冲击发生焊线颈部断裂问题。
Description
技术领域
本发明涉及一种半导体制造方法技术,特指一种打线结构及方法。
背景技术
现有半导体封装件,通常使用打线技术而通过焊线(例如金线)将晶片电性连接至如导线架或基板的晶片承载件,再通过该导线架的导脚(lead)或基板的焊球(Free Air Ball,FAB)而电性连接至外部装置。相关技术内容还可参阅美国专利第5,156,323、5,967,401及6,031,281号等。
请阅图1,为显示传统的打线作业示意图,其以打线机将一焊线14的端部烧球成型为焊球,再将焊球以超声波热压方式在晶片12焊垫(pad)121上形成球形焊点(ball bond)141,接着,将打线机的焊嘴11先向上并向远离基板15焊结点151方向平移一距离(步骤A)(以下称为反向(reverse direction)移动路径),再上移一预定高度后(步骤B),下引焊嘴朝基板15的焊结点151移动(步骤C),以形成焊线14的线弧(WireLoop)143;迄直至该焊嘴11移至基板焊结点151处时,即下压该焊嘴11以使焊线14在该基板焊结点151上形成缝接焊点(stitch bond)142,完成焊线14与晶片12的焊垫121及基板15的焊结点151的焊接;其中为避免在球形焊点141上方,即该焊线14的颈部发生断裂问题,必须使该焊线弧高具有一定高度h,其中最小可以至150微米,如此,使得整体封装件高度无法有效降低,达到轻薄短小的需求。
由此,美国专利第6,933,223及5,111,989号案又揭示一种可降低打线线弧高度的方法,如图2所示,其主要仍是先以打线机的焊嘴21将一焊线24的端部烧球成型为焊球并热压在晶片22的焊垫221上,以形成球形焊点241,接着,即将焊嘴21上移一预定高度(步骤B’),再下引焊嘴21朝基板25的焊结点251移动(步骤C’),以使焊线24在该基板焊结点251上形成缝接焊点242,也就是较传统的打线作业省去自球形焊点241上移及平移的反向移动路径(即图1的步骤A),而使焊线24直接由球形焊点241上移及下引至基板25,以此达到降低线弧高度目的。
但是在前述制造方法中,虽省去焊线反向移动路径,达到降低线弧高度目的,然而,却又因为其将焊线直接紧拉连接晶片及基板,而未形成传统具吸震能力的明显弧线结构,因此在后续运送过程或在封装模压制造方法中因模流冲击发生焊线颈部断裂问题,而严重影响制造方法可靠度。
因此,如何提供一种打线结构及方法,可省去焊线反向移动路径,达到降低线弧高度目的,同时又可避免发生焊线颈部断裂问题,是此相关领域所迫切待解的课题。
发明内容
本发明的目的在于提供一种打线结构及方法,可省去焊线反向移动路径,达到降低线弧高度目的。
本发明的又一目的在于提供一种打线结构及方法,可避免发生焊线颈部断裂问题。
为达到前述目的,本发明揭示一种打线结构,包括:一金属凸块,形成于第一电子元件的电性接点上;以及一焊线,用来连接第一电子元件的电性接点及第二电子元件的电性接点,该焊线具有一个形成于第一电子元件电性接点上的球形焊点、一个形成于第二电子元件上的缝接焊点、以及连接该球形焊点及缝接焊点的线段,其中该位于第一电子元件电性接点上方的焊线转折处附近用来支撑且抵靠于该金属凸块上。
本发明还揭示一种打线方法,包括:将夹置有焊线的焊嘴在第一电子元件的电性接点上形成一金属凸块;以及使该焊嘴在该第一电子元件的电性接点形成一球形焊点,并上移及下引该焊嘴至第二电子元件,以于第二电子元件的电性接点上形成缝接焊点,进而形成电性连接第一及第二电子元件的焊线,并使该焊线位于第一电子元件的电性接点上方转折处附近用来支撑且抵靠于该金属凸块上。
该金属凸块的制法包括:将夹置有焊线的焊嘴在其焊线端部烧球成型为焊球,以将该焊球于第一电子元件的电性接点上形成球形焊点(ball bond);将焊嘴微上移,并使该焊嘴及电子元件相对平移一预定距离;下压该焊嘴至该焊球,并自该焊球切断焊线,以形成所需的金属凸块。
因此,本发明所揭示的打线结构及方法,通过夹置有焊线的焊嘴先在第一电子元件的电性接点形成一金属凸块,再使该焊嘴于该电性接点上形成一球形焊点,并上移及下引该焊嘴至第二电子元件,以在第二电子元件的电性接点上形成缝接焊点,进而形成电性连接第一及第二电子元件的焊线,并使该焊线位于第一电子元件的电性接点上方转折处附近用来支撑且抵靠于该金属凸块上,如此通过本发明的技术手段即可省去焊线反向移动路径,达到降低线弧高度目的,同时通过该金属凸块顶抵且支撑于焊线位于第一电子元件的电性接点上方的转折处附近线段,即可避免在后续运送过程或在封装模压制造方法中因模流冲击发生焊线颈部断裂问题。
附图说明
图1为现有的打线方法示意图;
图2为现有的美国专利第6,933,223及5,111,989号所揭示的打线方法示意图;以及
图3A及3B为本发明的打线结构及方法的示意图。
主要元件符号说明
11 焊嘴
12 晶片
121 焊垫
14 焊线
141 球形焊点
142 缝接焊点
143 线弧
15 基板
151 焊结点
21 焊嘴
22 晶片
221 焊垫
24 焊线
241 球形焊点
242 缝接焊点
25 基板
251 焊结点
h 线弧高度
A,B,C,B’,C’a,b,c 步骤
31 焊嘴
32 第一电子元件
321 电性接点
34 焊线
341 球形焊点
342 缝接焊点
35 第二电子元件
351 电性接点
36 金属凸块
具体实施方式
以下通过特定的具体实施例说明本发明的实施方式,本领域技术人员可由本说明书所揭示的内容轻易地了解本发明的其他优点与功效。
请参阅图3A及3B,为显示本发明的打线结构及方法的剖面示意图,该打线结构为通过打线机而连接电子元件的电性接点,在本实施例中用以连接半导体晶片及晶片承载件。
如图3A所示,提供第一电子元件32及第二电子元件35,该第一电子元件32例如为半导体晶片,且其上形成有如焊垫的电性接点321,该第二电子元件35例如为基板,且其上形成有如焊指(finger)的电性接点351。另外该第二电子元件35也可以是导线架等晶片承载件,且其上形成有如导脚(lead)的电性接点。
利用打线机,以将夹置有焊线34的焊嘴31在该第一电子元件32的电性接点接321上相对接近该第二电子元件电性接点351的一侧形成一金属凸块36。
该金属凸块36的制法包括将该夹置有焊线34的焊嘴31在其焊线端部烧球成型为焊球(Free Air Ball,FAB),再将焊球热压在第一电子元件32的电性接点321上形成球形焊点,接着将焊嘴31微上移(如图3A的步骤a),并使该焊嘴31及第一电子元件32相对平移一预定距离,例如使该焊嘴31相对朝该第二电子元件35电性接点351方向平移一段预定距离(步骤b),下压该焊嘴31至该球形焊点(步骤c),并切断该焊线,以此在该球形焊点在接近第二电子元件35电性接点351的一侧形成有倾斜面,以构成该金属凸块36。
如图3B所示,接着使该焊嘴31在该第一电子元件32的电性接点321相对远离该第二电子元件35电性接点351的另一侧上形成一球形焊点341,并上移及下引该焊嘴31至第二电子元件35电性接点351,以在第二电子元件35的电性接点351上形成缝接焊点342,进而构成第一及第二电子元件32,35的电性连接,其中该焊线34位于第一电子元件32的电性接点321上方的转折处附近部分用来支撑且抵靠于该金属凸块36上。如此即可同时省去自球形焊点341上移及平移的反向移动路径以降低线弧高度,且通过该金属凸块36顶抵于焊线34位于第一电子元件32的电性接点321上方部分,避免在后续制造方法中发生焊线颈部断裂问题。
通过前述的方法,本发明又揭示一种打线结构,包括:一金属凸块36,形成于第一电子元件32的电性接点321上;以及一焊线34,用来连接第一电子元件32的电性接点321及第二电子元件35的电性接点351,该焊线34具有一形成于第一电子元件电性接点321上的球形焊点341、一形成于第二电子元件电性接点351上的缝接焊点342、以及连接该球形焊点341及缝接焊点342的线段,其中该位于第一电子元件电性接点321上方的线段转折处附近部分用来支撑且抵靠于该金属凸块36上。
因此,本发明所揭示的打线结构及方法,通过夹置有焊线的焊嘴先在第一电子元件的电性接点形成一金属凸块,再使该焊嘴于该电性接点上形成一球形焊点,并上移及下引该焊嘴至第二电子元件,以于第二电子元件的电性接点上形成缝接焊点,进而形成电性连接第一及第二电子元件的焊线,并使该焊线位于第一电子元件的电性接点上方的转折处附近部分用来支撑且抵靠于该金属凸块上,如此通过本发明的技术手段即可省去焊线反向移动路径,达到降低线弧高度目的,同时通过该金属凸块顶抵于焊线位于第一电子元件的电性接点上方的线段,即可避免在后续运送过程或在封装模压制造方法中因模流冲击发生焊线颈部断裂问题。
上述实施例仅为例示性说明本发明的原理及其功效,而非用于限制本发明。任何本领域技术人员均可在不违背本发明的精神及范畴下,对上述实施例进行修饰与变化。因此,本发明的权利保护范围,应如后述的申请专利范围所列。
Claims (10)
1、一种打线结构,包括:
一金属凸块,所述金属凸块形成于第一电子元件的电性接点上;以及
一焊线,所述焊线用来连接第一电子元件的电性接点及第二电子元件的电性接点,所述焊线具有一个形成于第一电子元件电性接点上的焊球焊点、一个接置于第二电子元件电性接点上的缝接焊点、以及连接所述焊球焊点及缝接焊点的线段,其中所述线段转折处附近用来支撑且抵靠于所述金属凸块上。
2、根据权利要求1所述的打线结构,其中,所述第一电子元件为半导体晶片,所述第二电子元件为晶片承载件。
3、根据权利要求1所述的打线结构,其中,所述第一电子元件为半导体晶片,并且在所述第一电子元件上形成具有焊垫的电性接点,所述第二电子元件为基板,并且在所述第二电子元件上形成具有焊指的电性接点。
4、根据权利要求1所述的打线结构,其中,所述第一电子元件为半导体晶片,并且在所述第一电子元件上形成具有焊垫的电性接点,所述第二电子元件为导线架,并且在所述第二电子元件上形成具有导脚的电性接点。
5、根据权利要求1所述的打线结构,其中,所述金属凸块在接近第二电子元件电性接点的一侧形成有倾斜面。
6、一种打线方法,包括:
将夹置有焊线的焊嘴于第一电子元件的电性接点上形成一金属凸块;以及
使所述焊嘴在所述第一电子元件的电性接点形成一球形焊点,并上移及下引所述焊嘴至第二电子元件,以在第二电子元件的电性接点上形成缝接焊点,进而形成电性连接第一及第二电子元件的焊线,并使所述焊线位于第一电子元件的电性接点上方的转折处附近用来支撑且抵靠于所述金属凸块上。
7、根据权利要求6所述的打线方法,其中,所述第一电子元件为半导体晶片,所述第二电子元件为晶片承载件。
8、根据权利要求6所述的打线方法,其中,所述金属凸块的制法包括:
将所述夹置有焊线的焊嘴于其焊线端部烧球成型为焊球,再将焊球于第一电子元件的电性接点上形成球形焊点;
将焊嘴微上移,并使所述焊嘴及第一电子元件相对平移一预定距离;以及
下压所述焊嘴至所述球形焊点,并切断所述焊线,以形成金属凸块。
9、根据权利要求8所述的打线方法,其中,所述焊嘴朝着所述第二电子元件电性接点方向平移一段预定距离。
10、根据权利要求8所述的打线方法,其中,所述金属凸块在接近第二电子元件电性接点的一侧形成有倾斜面。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNA2007101692620A CN101431059A (zh) | 2007-11-07 | 2007-11-07 | 打线结构及方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNA2007101692620A CN101431059A (zh) | 2007-11-07 | 2007-11-07 | 打线结构及方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN101431059A true CN101431059A (zh) | 2009-05-13 |
Family
ID=40646337
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNA2007101692620A Pending CN101431059A (zh) | 2007-11-07 | 2007-11-07 | 打线结构及方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101431059A (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104934401A (zh) * | 2014-03-20 | 2015-09-23 | 三菱电机株式会社 | 电力用半导体装置 |
CN109872982A (zh) * | 2019-03-08 | 2019-06-11 | 东莞记忆存储科技有限公司 | 半导体多层晶粒堆叠模块及其焊接方法 |
-
2007
- 2007-11-07 CN CNA2007101692620A patent/CN101431059A/zh active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104934401A (zh) * | 2014-03-20 | 2015-09-23 | 三菱电机株式会社 | 电力用半导体装置 |
CN109872982A (zh) * | 2019-03-08 | 2019-06-11 | 东莞记忆存储科技有限公司 | 半导体多层晶粒堆叠模块及其焊接方法 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6774494B2 (en) | Semiconductor device and manufacturing method thereof | |
US6946380B2 (en) | Method for forming bump, semiconductor element having bumps and method of manufacturing the same, semiconductor device and method of manufacturing the same, circuit board, and electronic equipment | |
US7314818B2 (en) | Semiconductor device and method of manufacturing the same, circuit board, and electronic equipment | |
US6163463A (en) | Integrated circuit chip to substrate interconnection | |
CN101378051B (zh) | 半导体器件及其制造方法 | |
US7067413B2 (en) | Wire bonding method, semiconductor chip, and semiconductor package | |
JP3573133B2 (ja) | 半導体装置及びその製造方法、回路基板並びに電子機器 | |
US20010045668A1 (en) | Plug structure | |
JP5008832B2 (ja) | 半導体装置及び半導体装置の製造方法 | |
JP2005039192A (ja) | 半導体装置及びワイヤボンディング方法 | |
CN102187444A (zh) | 导电凸部、引线环及导电凸部、引线环的形成方法 | |
CN101431059A (zh) | 打线结构及方法 | |
CN101604667B (zh) | 具有特殊结构的跨接导线的半导体布置结构及其制造方法 | |
KR100833187B1 (ko) | 반도체 패키지의 와이어 본딩방법 | |
TWI326914B (en) | Multi-chip stack structure and fabrication method thereof | |
KR20220003077A (ko) | Cof 패키징 방법 | |
CN100424864C (zh) | 提高封装可靠性的导线架及其封装结构 | |
CN105405778A (zh) | 打线装置及排除不良焊线的方法 | |
CN213878074U (zh) | 一种引线键合工艺用基板 | |
JP3923379B2 (ja) | 半導体装置 | |
JP5048990B2 (ja) | 半導体装置及びその製造方法 | |
JPH098046A (ja) | 半導体チップの突起電極形成方法 | |
CN112652549A (zh) | 垂直打线设备及打线方法 | |
TWI567839B (zh) | 打線構造及銲線形成方法 | |
JPH0590320A (ja) | ボール式ワイヤーボンデイング方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Open date: 20090513 |