CN104777692A - 阵列基板及制作方法、触控显示面板 - Google Patents

阵列基板及制作方法、触控显示面板 Download PDF

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CN104777692A
CN104777692A CN201510232368.5A CN201510232368A CN104777692A CN 104777692 A CN104777692 A CN 104777692A CN 201510232368 A CN201510232368 A CN 201510232368A CN 104777692 A CN104777692 A CN 104777692A
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touch
layer
insulation course
array base
via hole
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CN104777692B (zh
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彭涛
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Tianma Microelectronics Co Ltd
Xiamen Tianma Microelectronics Co Ltd
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Tianma Microelectronics Co Ltd
Xiamen Tianma Microelectronics Co Ltd
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Priority to US14/818,292 priority patent/US9811191B2/en
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    • GPHYSICS
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    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
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    • G02F1/134309Electrodes characterised by their geometrical arrangement
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    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/1362Active matrix addressed cells
    • G02F1/136227Through-hole connection of the pixel electrode to the active element through an insulation layer
    • HELECTRICITY
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • HELECTRICITY
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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Abstract

本发明公开了一种阵列基板及制造方法、触控显示面板,其中阵列基板包括:基板;呈矩阵排列的多个薄膜晶体管,每个所述薄膜晶体管包括栅极、源极和漏极;第一绝缘层,位于所述薄膜晶体管之上;触控走线层,位于所述第一绝缘层之上,所述触控走线层包括多条触控走线;平坦化层,覆盖在所述触控走线层之上。本发明实施例将平坦化层覆盖在所述触控走线层之上,使触控走线之上的平坦性更好,改善经过摩擦工序后产生漏光的问题。

Description

阵列基板及制作方法、触控显示面板
技术领域
本发明实施例涉及液晶显示器技术领域,尤其涉及一种阵列基板及制作方法、触控显示面板。
背景技术
液晶显示屏,英文通称为LCD(Liquid Crystal Display),是属于平面显示器的一种。随着科技的发展,LCD目前科技信息产品也朝着轻、薄、短、小的目标发展,无论是直角显示、低耗电量、体积小、还是零辐射等优点,都能让使用者享受最佳的视觉环境。
具有触控功能的显示器是基于功能丰富化的技术产生的,比较常见的触控技术有In-cell触控技术和On-cell触控技术。其中,In-cell触控技术是指将触摸面板功能嵌入到液晶像素电路中的方法,On-cell触控技术是指将触摸功能的部分结构嵌入到彩色滤光片基板和偏光板之间的方法。由于In-cell触控技术能够使显示器更轻薄,因此更被关注。
在现有技术中,如图1所示,具有触控功能的阵列基板,依次在基板111上采用构图工艺制备多晶硅层112;涂覆栅绝缘层113;形成第一金属层,并采用构图工艺形成TFT的栅极114和扫描线;形成层间绝缘层115覆盖第一金属层的图案;形成第二金属层,并采用构图工艺形成TFT的源级116、漏极117和数据线;平坦化层118;在平坦化层118上形成第三金属层(M3),采用构图工艺形成触控走线119;形成第一绝缘层120;在第一绝缘层120上形成触控电极121,触控电极121可复用为公共电极块;再形成第二绝缘层122;在第二绝缘层122、第一绝缘层120和平坦化层118中刻蚀形成第一过孔123,且在第二绝缘层122和第一绝缘层120中刻蚀形成第二过孔124;在第二绝缘层122上形成像素电极117,且同像素电极117通过第一过孔123连通薄膜晶体管的漏极125,采用像素电极的材料同步形成跨桥结构,通过第二过孔124将触控电极121与触控走线119进行电连接。
但是,上述制作形成的阵列基板,由于触控走线形成在平坦化层上方,这就使得位于所述触控走线之上的膜层表面不平坦,这样将对后续摩擦工序的效果产生很大的影响,其两侧容易出现漏光问题。
发明内容
本发明实施例提供一种阵列基板及制造方法、触控显示面板,通过将平坦化层覆盖在所述触控走线层之上,使触控走线之上的平坦性更好,改善了经过摩擦工序后产生漏光的问题。
第一方面,本发明实施例提供了一种阵列基板,包括:
基板;
呈矩阵排列的多个薄膜晶体管,每个所述薄膜晶体管包括栅极、源极和漏极;
第一绝缘层,位于所述薄膜晶体管之上;
触控走线层,位于所述第一绝缘层之上,所述触控走线层包括多条触控走线;
平坦化层,覆盖在所述触控走线层之上。
第二方面,本发明实施例还提供一种触控显示面板,包括本发明实施第一方面所述的阵列基板;还包括与所述阵列基板相对设置的彩膜基板,所述阵列基板和所述彩膜基板之间设置有液晶层。
第三方面,本发明实施例还提供一种阵列基板的制作方法,包括:
S1、在基板上形成第一金属层,在所述第一金属层上采用构图工艺形成栅极与扫描线的图案,所述扫描线沿第一方向延伸;
S2、在所述第一金属层上形成第三绝缘层;
S3、在所述第三绝缘层上形成第二金属层,在所述第二金属层上采用构图工艺形成源极、漏极和数据线的图案,所述数据线沿第二方向延伸,且所述第一方向和所述第二方向交叉;
S4、在所述第二金属层上形成第一绝缘层;
S5、在所述第一绝缘层上形成触控走线层,所述触控走线层包括多条沿着第二方向延伸的触控走线;
S6、在所述触控走线层上形成平坦化层。
本发明实施例将平坦化层覆盖在所述触控走线层之上,使触控走线之上的平坦性更好,改善摩擦漏光问题。
附图说明
图1为现有技术提供的阵列基板的剖视结构示意图;
图2为本发明实施例一提供的阵列基板的剖视结构示意图;
图3为本发明实施例二提供的阵列基板的剖视结构示意图;
图4A为本发明实施例三提供的阵列基板的剖视结构示意图;
图4B为本发明实施例三提供的阵列基板中第一开槽位置示意图;
图4C为本发明实施例三提供的阵列基板中第一开槽位置示意图;
图4D为本发明实施例三提供的阵列基板中像素电极结构示意图
图5为本发明实施例四提供的触控显示面板结构示意图;
图6为本发明实施例五提供的一种阵列基板的制作方法的流程图。
具体实施方式
下面结合附图和实施例对本发明作进一步的详细说明。可以理解的是,此处所描述的具体实施例仅仅用于解释本发明,而非对本发明的限定。另外还需要说明的是,为了便于描述,附图中仅示出了与本发明相关的部分而非全部结构。
实施例一
图2为本发明实施例一提供的阵列基板的剖视结构示意图,如图2所示,本发明实施例提供的阵列基板包括:
基板201;呈矩阵排列的多个薄膜晶体管22,每个所述薄膜晶体管22包括栅极202、源极203和漏极204;第一绝缘层205,位于所述薄膜晶体管22之上;触控走线层,位于所述第一绝缘层205之上,所述触控走线层包括多条触控走线206;平坦化层207,覆盖在所述触控走线层之上。
本实施例的技术方案,将触控走线206直接形成在平坦化层207的下方,避免了因触控走线206之上的膜层表面不平坦而导致触控走线两侧经过摩擦工序后产生漏光的问题。
上述实施例的技术方案中,其他结构的层次关系不限,下面提供一典型的实现方案,如图2所示,该阵列基板还包括公共电极层,位于所述平坦化层之上,所述公共电极层包括多个公共电极块208,每个所述公共电极块208连接一条或多条所述触控走线206,所述公共电极块208复用做触控电极块;第二绝缘层209,位于所述公共电极层之上;像素电极层,位于所述第二绝缘层209之上,包括多个像素电极210。
公共电极块208复用为触控电极块,其可以通过多种方式与触控走线206相连,优选可以是,所述平坦化层207包括第一过孔211,所述公共电极块208直接通过所述第一过孔211与所述触控走线206连接,如图2所示。
在该阵列基板上,还包括多条沿第一方向延伸的扫描线,所述扫描线与所述薄膜晶体管的栅极202位于同一层;多条数据线,与所述薄膜晶体管的源极203、漏极204位于同一层,所述多条数据线沿第二方向延伸,且所述第一方向和第二方向交叉,所述触控走线206的延伸方向与所述数据线的延伸方向相同。
本实施例的阵列基板可通过如下过程进行制备:
A、在基板201上采用构图工艺形成多晶硅层212(Poly)的图案,多晶硅层212即有源层,可选用的材料为非晶硅或低温多晶硅;
B、在形成上述图案的基板201上形成栅绝缘层213;
C、在栅绝缘层213上形成第一金属层,采用构图工艺刻蚀形成薄膜晶体管22的栅极202和扫描线;
D、在栅极202上方形成一层间绝缘层214,层间绝缘层214的材质可以为氮化硅和氧化硅等;
E、在层间绝缘层214上方形成第二金属层,采用构图工艺刻蚀形成薄膜晶体管的源极203、漏极204和数据线;
F、在源极203、漏极204和数据线上方形成第一绝缘层205,形成的第一绝缘层205可采用的材料为氧化硅或氮化硅;
G、在所述第一绝缘层205上方形成触控走线材料层,采用构图工艺刻蚀形成多条触控走线206;
H、在触控走线206上方形成平坦化层207,即将有机膜液态固化在触控走线206上方,使触控走线206平坦化,形成的平坦化层207的厚度一般在0.5~6微米(μm)之间,优选为2.2微米。所述平坦化层207同时具有绝缘作用,但平坦化层207并不相当于现有技术中的绝缘层,平坦化层207采用的材料与绝缘层是有本质区别的,例如平坦化层207采用的材料为有机膜,绝缘层采用的材料一般是氮化硅和氧化硅等。另外,平坦化层207采用的工艺制程与绝缘层采用的工艺制程也是有本质区别的。平坦化层207一般将有机膜液态固化在被平坦的膜层之上,再通过光刻制程形成需要的图案。绝缘层一般采用化学气相沉积(CVD,Chemical Vapor Deposition)成膜,同时需要结合光刻制程以及刻蚀制程,才能形成最终的图案。
I、在平坦化层207中对应于触控走线206的位置刻蚀形成第一过孔211;
G、在平坦化层207上再形成公共电极层,例如可采用的材料为氧化铟锡ITO,采用构图工艺刻蚀形成多块公共电极的图案。公共电极层位于所述平坦化层207之上,所述公共电极层包括多个公共电极块208,每个所述公共电极块208连接一条或多条所述触控走线206,所述公共电极块208复用做触控感测电极。具体的,每个公共电极块208可通过第一过孔211直接与触控走线206相连。
K、在公共电极层上形成第二绝缘层209,第二绝缘层209所采用的材料为氧化硅或氮化硅;
L、在第二绝缘层209、平坦化层207和第一绝缘层205中,对应漏极204的位置刻蚀形成过孔;
M、在第二绝缘层209上形成像素电极材料层,采用构图工艺刻蚀形成像素电极210的图案,像素电极210通过过孔与漏极204相连。其中,所述像素电极层为透明电极层。所采用的材料可与公共电极层所采用的材料相同,例如氧化铟锡ITO。所述像素电极209至少包括两条条状电极,且条状电极的延伸方向与所述触控走线206的延伸方向相同。
本实施例将平坦化层覆盖在所述触控走线层之上,使触控走线之上的平坦性更好,改善了经过摩擦工序后产生漏光的问题。
实施例二
图3为本发明实施例二提供的阵列基板的剖视结构示意图,本实施例与实施例一的差别在于,所述平坦化层207包括第一过孔215,所述公共电极块208通过所述第一过孔215与所述触控走线206连接。且具体是,所述第二绝缘层209包括第二过孔216和第三过孔217,所述第二过孔216与所述第一过孔215相对设置,且所述公共电极块208通过所述第一过孔215、第二过孔216和第三过孔217与所述触控走线206连接。
在制作过程中,可以省去上述的步骤I,在步骤L中,同步刻蚀形成第三过孔217,以及贯穿的第一过孔215和第二过孔216。
在步骤M中形成像素电极材料层时,同步刻蚀形成跨桥结构,通过第一过孔215、第二过孔216和第三过孔217,将公共电极块208与触控走线206连接。
本实施例将平坦化层覆盖在所述触控走线层之上,使触控走线之上的平坦性更好,改善了经过摩擦工序后产生漏光的问题。本实施例可以进一步节约一步过孔刻蚀的工艺制程。
实施例三
图4A为本发明实施例三提供的阵列基板的剖视结构示意图,本实施例以实施例一为基础,区别在于,如图4B所示,所述平坦化层207包括第一开槽218,所述第一开槽218的长度在所述第一方向上从一薄膜晶体管的漏极204延伸到相邻的薄膜晶体管的漏极204。
并且,所述第一开槽218贯穿所述平坦化层207及第一绝缘层205;所述公共电极层沿所述第二方向延伸到所述第一开槽218内与所述触控走线206连接;在第一开槽218内,仅触控走线206上方覆盖有公共电极层。
在制作时,如图4B所示,可将相邻的两个薄膜晶体管22构成一个薄膜晶体管组,所述薄膜晶体管组的两个漏极可在同一水平线上,对所述薄膜晶体管组中的两个漏极204上方对应的平坦化层207进行刻蚀,同时刻蚀第一绝缘层205,形成第一开槽218如图4B虚线方框所示。或者,如图4C所示,所述薄膜晶体管组的两个漏极在不同水平线上,对所述薄膜晶体管组中的两个漏极204上方对应的平坦化层207进行刻蚀,同时刻蚀第一绝缘层205,此时形成第一开槽218如图4C虚线方框所示。所述第一开槽218同时暴露出两个漏极204和触控走线206,在平坦化层207上方形成公共电极层,所述公共电极层沿所述第二方向延伸到所述第一开槽218内,从而与暴露的触控走线206电连接,在第一开槽218内,采用刻蚀构图工艺仅在暴露的触控走线206形成公共电极块208。进一步的,在公共电极块208上方形成第二绝缘层209,所述第二绝缘层209同时覆盖在所述第一开槽218的底部;刻蚀所述第二绝缘层209,形成贯穿所述第二绝缘层209的第四过孔219,且所述第四过孔219位于所述第一开槽218区域内的漏极204的正上方,在所述第二绝缘层209的上方形成像素电极层,所述像素电极层沿所述第一方向即水平方向延伸到所述第四过孔219内与所述漏极204连接,从而完成像素电极209与漏极204的电连接。
本实施例将平坦化层覆盖在所述触控走线层之上,使触控走线之上的平坦性更好,改善摩擦漏光问题。
本发明各实施例所提供的阵列基板,优选适用在高分辨率的液晶显示面板中,则如图4D所示,每个所述像素电极209包括至少两根条状电极220,所述条状电极沿第二方向延伸。
注意,以上附图仅为示意图,本发明对扫描线与数据线的形状及延伸方向不做具体限定,所述扫描线与数据线的形状可以为直线、折线或者其他形状。所述薄膜晶体管22以及所述薄膜晶体管22的漏极204的排布方式也不做具体限定,例如可在同一水平线上,也可在不同水平线上,只要所述第一开槽218从一薄膜晶体管22的漏极204延伸到相邻的薄膜晶体管22的漏极204即可。
实施例四
如图5所示,本发明实施例还提供一种触控显示面板,除了包括上述实施例所述的阵列基板31之外,还包括与所述阵列基板31相对设置的彩膜基板32,所述阵列基板31和所述彩膜基板32之间设置有液晶层33。
实施例五
图6为本发明实施例五提供的一种阵列基板的制作方法的流程图,该方法包括:
S1、在基板上形成第一金属层,在所述第一金属层上采用构图工艺形成栅极与扫描线的图案,所述扫描线沿第一方向延伸;
S2、在所述第一金属层上形成第三绝缘层,即栅绝缘层;
S3、在所述第三绝缘层上形成第二金属层,在所述第二金属层上采用构图工艺形成源极、漏极和数据线的图案,所述数据线沿第二方向延伸,且所述第一方向和所述第二方向交叉;
S4、在所述第二金属层上形成第一绝缘层;
S5、在所述第一绝缘层上形成触控走线层,所述触控走线层包括多条沿着第二方向延伸的触控电极线;
S6、在所述触控走线层上形成平坦化层。
上述技术方案所形成的阵列基板可参见前述实施例的附图所示结构。
在所述触控走线层上形成平坦化层之后,优选还包括:
S7、在所述平坦化层上形成第一开槽,所述第一开槽的长度在所述第一方向上从一个漏极延伸到相邻的漏极;所述第一开槽贯穿所述平坦化层及第一绝缘层;
S8、在所述平坦化层上形成公共电极层,采用构图工艺形成多个公共电极块,所述公共电极层沿所述第二方向延伸到所述第一开槽内与所述触控走线连接,在所述第一开槽内,仅触控走线上方覆盖有公共电极层;
S9、在所述公共电极层上形成第二绝缘层,所述第二绝缘层同时覆盖所述第一开槽的底部;
S10、在所述第二绝缘层上形成第四过孔,所述第四过孔位于所述第一开槽区域内的漏极的正上方,所述第四过孔贯穿所述第二绝缘层;
S11、在所述第二绝缘层上形成像素电极层,所述像素电极层沿第一方向延伸到所述第四过孔内与漏极连接。
本实施例将平坦化层覆盖在所述触控走线层之上,使触控走线之上的平坦性更好,改善摩擦漏光问题。
注意,上述仅为本发明的较佳实施例及所运用技术原理。本领域技术人员会理解,本发明不限于这里所述的特定实施例,对本领域技术人员来说能够进行各种明显的变化、重新调整和替代而不会脱离本发明的保护范围。因此,虽然通过以上实施例对本发明进行了较为详细的说明,但是本发明不仅仅限于以上实施例,在不脱离本发明构思的情况下,还可以包括更多其他等效实施例,而本发明的范围由所附的权利要求范围决定。

Claims (19)

1.一种阵列基板,其特征在于,包括:
基板;
呈矩阵排列的多个薄膜晶体管,每个所述薄膜晶体管包括栅极、源极和漏极;
第一绝缘层,位于所述薄膜晶体管之上;
触控走线层,位于所述第一绝缘层之上,所述触控走线层包括多条触控走线;
平坦化层,覆盖在所述触控走线层之上。
2.根据权利要求1所述的阵列基板,其特征在于,还包括:
公共电极层,位于所述平坦化层之上,所述公共电极层包括多个公共电极块,每个所述公共电极块连接一条或多条所述触控走线,所述公共电极块复用做触控感测电极;
第二绝缘层,位于所述公共电极层之上;
像素电极层,位于所述第二绝缘层之上,包括多个像素电极。
3.根据权利要求2所述的阵列基板,其特征在于,所述平坦化层包括第一过孔,所述公共电极块通过所述第一过孔与所述触控走线连接。
4.根据权利要求2所述的阵列基板,其特征在于,所述平坦化层包括第一过孔,所述公共电极块直接通过所述第一过孔与所述触控走线连接。
5.根据权利要求3所述的阵列基板,其特征在于,所述第二绝缘层包括第二过孔和第三过孔,所述第二过孔与所述第一过孔相对设置,且所述公共电极块通过所述第一过孔、第二过孔和第三过孔与所述触控走线连接。
6.根据权利要求2所述的阵列基板,其特征在于,还包括:
多条沿第一方向延伸的扫描线,所述扫描线与所述薄膜晶体管的栅极位于同一层;
多条数据线,与所述薄膜晶体管的源极、漏极位于同一层,所述多条数据线沿第二方向延伸,且所述第一方向和第二方向交叉,所述触控走线的延伸方向与所述数据线的延伸方向相同。
7.根据权利要求6所述的阵列基板,其特征在于,所述平坦化层包括第一开槽,所述第一开槽的长度在所述第一方向上从一薄膜晶体管的漏极延伸到相邻的薄膜晶体管的漏极。
8.根据权利要求7所述的阵列基板,其特征在于,所述第一开槽贯穿所述平坦化层及第一绝缘层;
所述公共电极层沿所述第二方向延伸到所述第一开槽内与所述触控走线连接;
在第一开槽内,仅触控走线上方覆盖有公共电极层。
9.根据权利要求8所述的阵列基板,其特征在于,
所述第二绝缘层同时覆盖在所述第一开槽的底部;
所述第二绝缘层还包括第四过孔,所述第四过孔贯穿所述第二绝缘层,所述第四过孔位于所述第一开槽区域内的漏极的正上方;
所述像素电极层沿所述第一方向延伸到所述第四过孔内与所述漏极连接。
10.根据权利要求9所述的阵列基板,其特征在于:
每个所述像素电极包括至少两根条状电极,所述条状电极沿第二方向延伸。
11.根据权利要求7所述的阵列基板,其特征在于:
相邻的两个薄膜晶体管构成一个薄膜晶体管组,所述薄膜晶体管组中的两个漏极对应于同一个第一开槽。
12.根据权利要求1~11任一项所述的阵列基板,其特征在于,所述平坦化层的材质为有机膜层。
13.根据权利要求1~11任一项所述的阵列基板,其特征在于,所述平坦化层的厚度为0.5μm~6μm。
14.根据权利要求1~11任一项所述的阵列基板,其特征在于,制成所述第一绝缘层的材料为氧化硅或氮化硅。
15.根据权利要求1~11任一项所述的阵列基板,其特征在于,制成所述第二绝缘层的材料为氧化硅或氮化硅。
16.根据权利要求1-11任一项所述的阵列基板,其特征在于,所述薄膜晶体管还包括有源层,所述有源层材料为非晶硅或低温多晶硅。
17.一种触控显示面板,其特征在于,包括权利要求1-16任一项所述的阵列基板;还包括与所述阵列基板相对设置的彩膜基板,所述阵列基板和所述彩膜基板之间设置有液晶层。
18.一种阵列基板的制作方法,其特征在于,包括:
S1、在基板上形成第一金属层,在所述第一金属层上采用构图工艺形成栅极与扫描线的图案,所述扫描线沿第一方向延伸;
S2、在所述第一金属层上形成第三绝缘层;
S3、在所述第三绝缘层上形成第二金属层,在所述第二金属层上采用构图工艺形成源极、漏极和数据线的图案,所述数据线沿第二方向延伸,且所述第一方向和所述第二方向交叉;
S4、在所述第二金属层上形成第一绝缘层;
S5、在所述第一绝缘层上形成触控走线层,所述触控走线层包括多条沿着第二方向延伸的触控走线;
S6、在所述触控走线层上形成平坦化层。
19.根据权利要求18所述的阵列基板的制作方法,其特征在于,在所述触控走线层上形成平坦化层之后还包括:
S7、在所述平坦化层上形成第一开槽,所述第一开槽的长度在所述第一方向上从一个漏极延伸到相邻的漏极;所述第一开槽贯穿所述平坦化层及第一绝缘层;
S8、在所述平坦化层上形成公共电极层,采用构图工艺形成多个公共电极块,所述公共电极层沿所述第二方向延伸到所述第一开槽内与所述触控走线连接,在所述第一开槽内,仅触控走线上方覆盖有公共电极层;
S9、在所述公共电极层上形成第二绝缘层,所述第二绝缘层同时覆盖所述第一开槽的底部;
S10、在所述第二绝缘层上形成第四过孔,所述第四过孔位于所述第一开槽区域内的漏极的正上方,所述第四过孔贯穿所述第二绝缘层;
S11、在所述第二绝缘层上形成像素电极层,所述像素电极层沿第一方向延伸到所述第四过孔内与漏极连接。
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