CN104737295A - Cmos架构的隧穿场效应晶体管(tfet)以及制造n型和p型tfet的方法 - Google Patents
Cmos架构的隧穿场效应晶体管(tfet)以及制造n型和p型tfet的方法 Download PDFInfo
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- CN104737295A CN104737295A CN201380054199.XA CN201380054199A CN104737295A CN 104737295 A CN104737295 A CN 104737295A CN 201380054199 A CN201380054199 A CN 201380054199A CN 104737295 A CN104737295 A CN 104737295A
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- tfet
- gesn
- relaxation
- channel region
- wire
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- 230000005669 field effect Effects 0.000 title claims abstract description 45
- 230000005641 tunneling Effects 0.000 title claims abstract description 21
- 238000013459 approach Methods 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 claims abstract description 94
- 229910005898 GeSn Inorganic materials 0.000 claims abstract description 91
- 239000000463 material Substances 0.000 claims description 69
- 239000002070 nanowire Substances 0.000 claims description 43
- 229910052732 germanium Inorganic materials 0.000 claims description 34
- 239000013078 crystal Substances 0.000 claims description 15
- 230000006835 compression Effects 0.000 claims description 8
- 238000007906 compression Methods 0.000 claims description 8
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 4
- 238000000034 method Methods 0.000 description 38
- 238000004519 manufacturing process Methods 0.000 description 27
- 230000007704 transition Effects 0.000 description 21
- 229910052710 silicon Inorganic materials 0.000 description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 15
- 238000004891 communication Methods 0.000 description 15
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 14
- 239000010703 silicon Substances 0.000 description 14
- 239000002019 doping agent Substances 0.000 description 13
- 239000004065 semiconductor Substances 0.000 description 12
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- 230000000694 effects Effects 0.000 description 9
- 230000008569 process Effects 0.000 description 8
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 7
- 229910045601 alloy Inorganic materials 0.000 description 7
- 239000000956 alloy Substances 0.000 description 7
- 239000002127 nanobelt Substances 0.000 description 7
- 238000004088 simulation Methods 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- IWTIUUVUEKAHRM-UHFFFAOYSA-N germanium tin Chemical compound [Ge].[Sn] IWTIUUVUEKAHRM-UHFFFAOYSA-N 0.000 description 4
- 229910052718 tin Inorganic materials 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 3
- 239000002800 charge carrier Substances 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 230000002301 combined effect Effects 0.000 description 3
- 229910052735 hafnium Inorganic materials 0.000 description 3
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 230000000712 assembly Effects 0.000 description 2
- 238000000429 assembly Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 2
- 230000002860 competitive effect Effects 0.000 description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 2
- 230000000670 limiting effect Effects 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 230000036961 partial effect Effects 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 238000004698 pseudo-potential method Methods 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910002058 ternary alloy Inorganic materials 0.000 description 2
- 229910000951 Aluminide Inorganic materials 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 235000008730 Ficus carica Nutrition 0.000 description 1
- 244000025361 Ficus carica Species 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910005540 GaP Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- -1 InGaAsP Chemical compound 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- BRGOCSWOKBOIOJ-UHFFFAOYSA-N N.[O-2].[Hf+4] Chemical compound N.[O-2].[Hf+4] BRGOCSWOKBOIOJ-UHFFFAOYSA-N 0.000 description 1
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- 239000005864 Sulphur Substances 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 1
- UQERHEJYDKMZJQ-UHFFFAOYSA-N [O-2].[O-2].[O-2].[O-2].O.[Sc+3].[Ta+5] Chemical compound [O-2].[O-2].[O-2].[O-2].O.[Sc+3].[Ta+5] UQERHEJYDKMZJQ-UHFFFAOYSA-N 0.000 description 1
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 229910052454 barium strontium titanate Inorganic materials 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- BLMUAVFFONATJG-UHFFFAOYSA-L dipotassium;4-[4-(4-sulfonatophenyl)hexan-3-yl]benzenesulfonate Chemical compound [K+].[K+].C=1C=C(S([O-])(=O)=O)C=CC=1C(CC)C(CC)C1=CC=C(S([O-])(=O)=O)C=C1 BLMUAVFFONATJG-UHFFFAOYSA-L 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 230000005670 electromagnetic radiation Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- 230000002706 hydrostatic effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 150000001247 metal acetylides Chemical class 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 230000002829 reductive effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 229910052711 selenium Inorganic materials 0.000 description 1
- 239000011669 selenium Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 229910052712 strontium Inorganic materials 0.000 description 1
- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 description 1
- WGPCGCOKHWGKJJ-UHFFFAOYSA-N sulfanylidenezinc Chemical compound [Zn]=S WGPCGCOKHWGKJJ-UHFFFAOYSA-N 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
- 229910052714 tellurium Inorganic materials 0.000 description 1
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 description 1
- 230000036964 tight binding Effects 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052984 zinc sulfide Inorganic materials 0.000 description 1
- RPEUFVJJAJYJSS-UHFFFAOYSA-N zinc;oxido(dioxo)niobium Chemical compound [Zn+2].[O-][Nb](=O)=O.[O-][Nb](=O)=O RPEUFVJJAJYJSS-UHFFFAOYSA-N 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66977—Quantum effect devices, e.g. using quantum reflection, diffraction or interference effects, i.e. Bragg- or Aharonov-Bohm effects
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/7311—Tunnel transistors
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- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
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- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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- H01L29/0669—Nanowires or nanotubes
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- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
- H01L29/0669—Nanowires or nanotubes
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- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1054—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
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- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
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Abstract
描述了CMOS架构的隧穿场效应晶体管(TFET)以及制造N型和P型TEFT的方法。例如,隧穿场效应晶体管(TFET)包括同质结有源区,所述同质结有源区设置在衬底上方。所述同质结有源区包括在其中具有无掺杂的沟道区的弛豫的Ge或GeSn本体。所述同质结有源区还包括掺杂的源极区和漏极区,所述掺杂的源极区和漏极区设置在所述沟道区的任一侧上的弛豫的Ge或GeSn本体中。所述TFET还包括栅极叠置体,所述栅极叠置体设置在所述源极区与所述漏极区之间的所述沟道区上。所述栅极叠置体包括栅极电介质部分和栅极电极部分。
Description
技术领域
本发明的实施例属于半导体器件领域,并且具体而言,属于CMOS架构的隧穿场效应晶体管(TFET)和制造N型和P型TEFT的方法的领域。
背景技术
过去几十年中,集成电路中特征的的按比例缩放已经是日益增长的半导体产业的驱动力。按比例缩放到越来越小的特征使得半导体芯片的有限基板面(real estate)上增加功能单元的密度。例如,缩小晶体管尺寸容许在芯片上并入增加数量的存储器件,导致制造具有增加容量的产品。然而,对更多容量的驱动不是没有问题。优化每一个器件的性能的必要性变得越来越显著。
在集成电路器件的制造中,随着器件尺寸继续按比例缩小,诸如三栅极晶体管之类的多栅极晶体管已经变得更加普遍。在传统工艺中,通常在体硅衬底或绝缘体上硅衬底上制造三栅极晶体管。在一些情况下,由于体硅衬底的较低成本,并且因为体硅衬底实现了不太复杂的三栅极制造工艺,所以体硅衬底是优选的。然而,在体硅衬底上,三栅极晶体管的制造工艺在将金属栅极电极的底部与在晶体管本体底部的源极和漏极延伸尖端(即,“鳍”)对准时常常遇到问题。当在体衬底上形成三栅极晶体管时,出于最佳栅极控制并且为了减小短沟道效应,需要适当的对准。例如,如果源极和漏极延伸尖端比金属栅极电极更深,则会发生穿通。替换地,如果金属栅极电极比源极和漏极延伸尖端更深,则结果会是不受欢迎的栅极电容寄生现象。
已经尝试了许多不同技术来减小晶体管的结漏。然而,在结漏抑制领域中仍需要显著的改进。
附图说明
图1示出了(a)根据本发明的实施例的具有无应变的Ge或GeSn窄本体的同质结TFET器件的一部分,和(c)根据本发明的实施例的具有无应变的窄源极/沟道结的异质结TFET器件的一部分。在(b)中,示出了对应于(a)的弛豫的5nm Ge双栅极器件的主带边沿(leading band edge)。在(d)中示出了(c)的结构的带排列的前边沿。
图2A示出了根据本发明的实施例的平面双轴拉伸应变的Ge或GeSn同质结TFET器件的一部分的成角度的视图。
图2B示出了根据本发明的实施例的基于悬浮纳米线或纳米带Ge或GeSn同质结的TFET器件的一部分的成角度的并且局部横截的视图。
图2C示出了根据本发明的实施例的基于三栅极或鳍式场效应晶体管Ge同质结的TFET器件的一部分的成角度的视图。
图3A示出了根据本发明的实施例的具有拉伸应变的Ge区的垂直TFET器件的一部分的成角度的视图。
图3B示出了根据本发明的实施例的具有拉伸应变的Ge区的另一个垂直TFET器件的一部分的成角度的视图。
图3C示出了根据本发明的实施例的具有拉伸应变的Ge区的再另一个垂直TFET器件的一部分的成角度的视图。
图4示出了根据本发明的实施例的具有拉伸应变的Ge1-ySny区的垂直TFET器件的一部分的成角度的视图。
图5是根据本发明的实施例的在大约300K温度的体弛豫的Ge的能带图500。
图6是根据本发明的实施例的四个L谷的鳍式场效应晶体管器件的沿不同限制取向的电子质量的表。
图7是根据本发明的实施例的N型和P型无应变Ge器件的仿真的漏极电流(ID)随栅极电压(VG)变化的函数关系的绘图。
图8是根据本发明的实施例的仿真的能量(meV)随双轴应力(MPa)体Ge器件变化的函数关系的绘图。
图9A是根据本发明的实施例的N型和P型应变和无应变Ge器件的仿真的漏极电流(ID)随栅极电压(VG)变化的函数关系的绘图。
图9B是根据本发明的实施例的P型应变Ge器件或III-V族材料器件中的仿真的漏极电流(ID)随栅极电压(VG)变化的函数关系的绘图。
图10A是根据本发明的实施例的示出了使用Jaros带偏移理论计算的GeSn中的直接带隙和间接带隙与Sn含量的关系的绘图1000A。
图10B是根据本发明的实施例的描绘了Ge1-x-ySixSny三元合金的过渡的绘图1000B。
图11A是根据本发明的实施例的描绘了对于不同线尺寸的在图3A中所示出的结构的应力仿真的绘图。
图11B是根据本发明的实施例的描绘了在图3B中所示出的结构的应力仿真的绘图。
图11C是根据本发明的实施例的描绘了在图3C中所示出的结构的应力仿真的绘图。
图12示出了根据本发明的一种实施方式的计算设备。
具体实施方式
描述了CMOS架构的隧穿场效应晶体管(TFET)和制造N型和P型TEFT的方法。在以下描述中,阐述了多个具体细节,诸如具体的集成度和材料域,以便提供对本发明的实施例的透彻理解。对于本领域技术人员将显而易见的是,本发明的实施例可以在没有这些具体细节的情况下得以实施。在其它情形中,诸如集成电路设计版图之类的众所周知的特征未详细描述,以便不会没有必要地模糊本发明的实施例。此外,应当理解的是,图中所示出的各个实施例是示例性表示,而不必按比例绘制。
本文所描述的一个或多个实施例针对使用互补N型和P型TFET器件的间接带隙到直接带隙的过渡的方法和由其得到的器件。在更具体的实施例中,由IV族材料制造TFET器件。器件可以应用于逻辑架构中和低功率器件架构中。一个或多个实施例针对通过在IV族材料中使用间接到直接的带隙的过渡来实现高性能N型和P型TFET器件。本文描述了用以设计制造这种器件的方法和结构。在一个实施例中,相对于具有大约60mV/decade的热限制的相应的金属氧化物半导体场效应晶体管(MOSFET),TFET用于实现了更陡峭的亚阈值斜率(SS)。通常,本文所描述的实施例可以适合于用于具有低功率应用的逻辑器件的高性能晶体管或按比例缩放的晶体管。
为了提供背景环境,由于存在直接带隙和各种异质结构带排列,基于III-V族材料的TFET应提供高驱动电流和低SS。对于III-V族材料异质结构袋状N型TFET,已经实现了小于60mV/decade的SS。借助对等效氧化物厚度(EOT)、本体按比例缩放和阻挡层设计的进一步器件优化,在例如大约0.3V的VCC的低指标VCC方面,预计III-V族材料N型TFET优于III-V族材料MOSFET。然而,III-V族材料中的导带状态的低密度会对在基于III-V族材料的P型TFET中实现低SS和高导通电流(ION)呈现基本的限制。
此外,以或者由技术上重要的诸如硅(Si)、锗(Ge)或硅锗(SiGe)之类的IV族材料制造的TFET中的ION电流会受到较大带隙(例如,Si中为1.12eV)和/或低间接带隙隧穿电流的限制。在Si和Ge中,价带顶在gamma点,而最低导带在Si中为delta点以及在Ge中为L点。在源极/沟道结的导带与价带之间的隧穿由光子辅助的两步骤工艺来实现。所述过程通常具有低概率,其对于基于间接带隙材料的TFET会导致低ION。例如,在最佳执行的Si/SiGe异质结构TFET中,实验性实现的ION在1V栅极过驱动下大约为40nA/微米,其比在0.3V栅极过驱动下的III-V族材料器件的上述ION低大约25倍。还没有实现基于Si、Ge或SiGe的TFET的相应的高ION。因此,本文所描述的一个或多个实施例针对在相同材料系统中制造具有低SS和高ION的高性能N型和P型TFET的方法。
在实施例中,IV族材料及其合金的带结构的带设计用于实现间接带隙到直接带隙的过渡,以用于在相同材料中实现N型和P型TFET器件。IV族材料不会遭受到低传导态密度(conduction density of state)。此外,借助设计的直接带隙,可以在相同材料中制造的N型和P型TFET中实现高ION和低SS。在具体实施例中,描述了无应变的和应变的基于Ge或者基于GeSn的N型和P型TFET。
在第一方面中,本文所描述的一个或多个实施例针对实现用于TFET中的间接-直接带隙的过渡的方法。例如,在一个实施例中,晶圆取向和导带非抛物性效应用于在薄本体鳍式场效应晶体管(finfet)或纳米线Ge或锗锡(GeSn)TFET的限制下增大导带gamma谷质量。这种器件提供了作为最低导带边沿的导带gamma谷能量,以实现直接带隙。在另一个实施例中,Ge、GeSn或硅锗锡(SiGeSn)中的拉伸应变用于实现直接带隙。在另一个实施例中,弛豫的GeSn或SiGeSn中的Ge与Sn的合金用于实现直接带隙。以下关联图5-11来描述以上方法的具体实施例。
在第二方面中,本文所描述的一个或多个实施例针对利用直接带隙的过渡的TFET器件的结构。例如,在一个实施例中,器件基于使用了鳍式场效应晶体管或纳米线/纳米带器件几何形状的无应变Ge或GeSn窄本体同质结TFET或无应变Ge或GeSn窄源极/沟道结异质结构TFET。所述限制导致鳍式场效应晶体管中或宽矩形纳米带或正方形纳米线中的在或低于大约5nm本体厚度的间接到直接的带隙的过渡。这些器件被制造为在器件表面具有(100)、(010)或(001)取向。直接带隙材料设置为遍及整个器件或者在器件的源极/沟道结中。在异质结构器件的漏极/本体中,晶格匹配的直接宽带隙材料用于最小化器件的截止状态电流(IOFF)。在另一个实施例中,尽管在此情况下具有窄本体以便实现直接带隙的要求可以放宽,但是鳍式场效应晶体管或纳米线基于具有Sn含量x>6%的无应变Ge1-xSnx同质结TFET。在图1中示出了紧接上述的器件的示例,随后是对其的描述。
总体上,图1示出了(a)例如在或小于大约5nm尺寸鳍式场效应晶体管或正方形纳米线/纳米带同质结的具有无应变Ge或GeSn窄本体的TFET器件的一部分100A,和(c)例如在或小于大约5nm尺寸的具有无应变窄源极/沟道结的TFET器件的一部分100C的成角度的视图。直接带隙材料遍及(a)中的器件,或者在(c)中的源极/沟道结中。在图1的(b)中,示出了弛豫的5nm Ge双栅极器件的主带边沿。为了以最大程度的最小本体尺寸实现直接带隙,在相应的鳍式场效应晶体管中的限制方向是<100>(或<010>或<001>),在基于线/带的器件中的表面取向是(100)(或(010)或(001))。在(c)中的异质结构中,即,部分100C,晶格匹配的直接宽带隙材料用于最小化器件的漏极/本体中的IOFF。在示范性实施例中,对于(c)中的异质结构的示例性选择是Ge窄源极/沟道结以及本体中和漏极中的晶格匹配的弛豫的III-V族材料GaAs或Ga0.5In0.5P。在(d)中示出了(c)中的结构的带排列的主边沿。
更具体而言,再次参考图1,TFET器件的部分100A包括具有厚度104的无掺杂的和无应变的Ge或GeSn窄本体102。源极(Na/Nd)106和漏极(Nd/Na)108区是形成于相同的Ge或GeSn材料中的掺杂区。部分100A可以用于制造基于窄本体同质结Ge或GeSn N型或P型TFET同质结的器件。在(b)中,提供了针对具有5nm本体尺寸的器件的带能量(eV)随沿结构100A的距离x变化的函数关系。TFET器件的部分100C包括具有厚度154的无掺杂的和无应变的Ge或GeSn窄本体第一部分152。还包括了晶格匹配的窄本体第二部分153,并且晶格匹配的窄本体第二部分153可以由如上述的晶格匹配的III-V族材料制造。源极(Na/Nd)156区形成为具有厚度157的152的Ge或GeSn材料的掺杂区,而漏极(Nd/Na)158形成为晶格匹配的III-V族材料的掺杂区。部分100C可以用于制造基于Ge或GeSn N型或P型TFET异质结的器件的窄源极/沟道结。在(d)中,提供了针对具有5nm本体尺寸的器件的带能量(eV)随沿结构100C的距离x变化的函数关系。
在利用直接带隙的过渡的TFET器件的结构的另一个示例中,在实施例中,TFET器件基于平面双轴拉伸应变的Ge同质结结构,其中,Ge应变从在具有较大晶格常数的弛豫的衬底上假晶地(pseudomorphically)生长的Ge膜获得。在具体实施例中,对于衬底的可能的选择包括但不限于Ge1-xSnx和InxGa1-xAs。例如,在InxGa1-xAs弛豫的的缓冲层上的双轴拉伸Ge或GeSn的生长可以提供适合的方法。然而,在实施例中,大约12.5%的Sn或者大约30%的铟(In)用于在基于大约5nm本体尺寸Ge的TFET中制造直接带隙材料。在另一个实施例中,具有小于大约6%的Sn的平面双轴拉伸应变的Ge1-ySny用在同质结TFET器件中,其中,Ge1-ySny应变从在具有较大晶格常数的弛豫的衬底上假晶地生长的Ge1-ySny膜获得。在具体的这种实施例中,对于衬底的可能性包括但不限于Ge1-xSnx和InxGa1-xAs。在图2A中示出了紧接上述的器件的示例,随后是对其的描述。
总体上,图2A示出了根据本发明的实施例的平面双轴拉伸应变的Ge或GeSn同质结TFET器件的一部分的成角度的视图。在一个实施例中,针对器件的应变来源于在具有较大晶格常数的弛豫的衬底上假晶地生长的层。衬底的可能性包括但不限于具有比相应的有源层更大的晶格常数的Ge1-xSnx和InxGa1-xAs。更具体而言,再次参考图2A,TFET器件的部分200A包括设置在衬底202A上的有源层204A。衬底202A是弛豫的缓冲层,所述弛豫的缓冲层具有比有源层204A的晶格常数更大的晶格常数。具有厚度207A的无掺杂的本体206A设置在掺杂的源极(Na/Nd)区208A与掺杂的漏极(Nd/Na)区210A之间。栅极电极212A和栅极电介质214A叠置体形成于无掺杂的本体206A上方。在实施例中,结构200A用于制造具有双轴拉伸应力的平面Ge或GeSn N型和P型TFET。
在利用直接带隙的过渡的TFET器件的结构的另一个示例中,在实施例中,TFET器件基于悬浮的纳米线或纳米带Ge同质结。在具体实施例中,TFET器件是在平面双轴拉伸应变的Ge膜的沟道区中底切的,其中,Ge应变从在具有较大晶格常数的弛豫的衬底上假晶地生长的Ge膜获得。衬底的可能性包括但不限于Ge1-xSnx或InxGa1-xAs。在具体实施例中,大约12.5%的Sn和30%的In的浓度用于为大约5nm本体尺寸Ge TFET产生直接带隙材料。
总体上,图2B示出了根据本发明的实施例的基于悬浮纳米线或纳米带Ge同质结的TFET器件的一部分200B的成角度的并且局部横截的视图。在一个实施例中,通过在平面双轴拉伸应变的Ge膜的沟道区中进行底切来制造器件。Ge应变可以从在具有较大晶格常数的弛豫的衬底上假晶地生长的Ge膜获得。衬底的可能性包括但不限于Ge1-xSnx或InxGa1-xAs。在实施例中,由于限制与应力的组合效应,这种结构实现了直接带隙。更具体而言,再次参考图2B,TFET器件的部分200B包括设置在衬底202B上的有源层204B。衬底202B是具有比有源层204B的晶格常数更大的晶格常数的弛豫的的宽缓冲。在区250B中对有源层204B进行底切,以便提供设置在掺杂的源极(Na/Nd)区208B与掺杂的漏极(Nd/Na)区210B之间的具有厚度207B的无掺杂的本体206B。形成栅极电极212B和栅极电介质214B叠置以便围绕无掺杂的本体206B缠绕。在实施例中,结构200B用于制造具有双轴拉伸应力的纳米线或纳米带Ge或GeSn N型和P型TFET。
在利用直接带隙的过渡的TFET器件的结构的另一个示例中,在实施例中,TFET器件基于三栅极或鳍式场效应晶体管Ge同质结。在一个实施例中,通过在平面双轴拉伸应变的Ge膜的沟道区中将层区域底切为鳍片来制造器件。在具体实施例中,Ge应变从在具有较大晶格常数的弛豫的衬底上假晶地生长的Ge膜获得。衬底的可能性包括但不限于Ge1-xSnx或InxGa1-xAs。由于限制与单轴拉伸应力的组合效应,这种结构可以实现直接带隙。在一个实施例中,单轴拉伸应力和传输方向沿着<100>、<010>或<001>的主晶体取向中的一个。
总体上,图2C示出了根据本发明的实施例的基于三栅极或鳍式场效应晶体管Ge同质结的TFET器件的一部分200C的成角度的视图。在一个实施例中,通过在平面双轴拉伸应变的Ge膜的沟道区中将层区域底切为鳍片来制造器件。Ge应变可以来源于在具有较大晶格常数的弛豫的衬底上假晶地生长的Ge膜。在实施例中,对于衬底的可能选择包括但不限于Ge1-xSnx或InxGa1-xAs。更具体而言,再次参考图2C,TFET器件的部分200C包括设置在衬底202C上的拉伸应变的有源层204C。衬底202C是具有比有源层204C的晶格常数更大的晶格常数的弛豫的的宽缓冲。将有源层204C图案化为具有鳍片几何形状,以便提供具有设置在掺杂的源极(Na/Nd)区208C与掺杂的漏极(Nd/Na)区210C之间的厚度207C的无掺杂的本体206C。在无掺杂的本体206C的顶部和暴露的侧部上形成栅极电极212C和栅极电介质214C叠置体。在实施例中,结构200C用于制造具有单轴拉伸应力的基于三栅极或鳍式场效应晶体管Ge或GeSn的N型或P型TFET。在具体实施例中,器件具有沿着<100>、<010>或<001>的晶体取向的传输方向。
在利用直接带隙的过渡的TFET器件的结构的另一个示例中,在实施例中,TFET器件基于具有用作源极或源极/漏极结的双轴拉伸应变的Ge区的垂直薄本体。在一个这种实施例中,出于尺寸的考虑,Ge区具有大约在2-4纳米范围中的垂直尺寸。存在实现用于制造具有Ge的直接间隙源极区的高拉伸应变的若干可能的方法,以下关联图3A-3C来描述其示例。尽管不必描绘,但是用于制造应变的Ge源极材料的其它选择包括但不限于将Ge嵌入到弛豫的GeSn或拉伸应变的SiGe结构内部。
在第一示例中,图3A示出了根据本发明的实施例的具有拉伸应变的Ge区的垂直TFET器件的一部分300A的成角度的视图。参考图3A,在形成于衬底301A上方的虚衬底302A上方形成TFET器件。包括了锗源极区304A并且锗源极区304A具有拉伸应变。在锗源极区304A上方的是沟道区306A和漏极区308A。在一个实施例中,沟道区306A和漏极区308A由诸如GeSn之类的相同材料形成,如在图3A中所描绘的。在实施例中,虚衬底302A包括弛豫的层,诸如但不限于弛豫的InGaAs或弛豫的GeSn。可以选择相应的铟或锡百分比,以便调整Ge层304A中的应变。例如,如果将Ge层304A沉积为均厚膜,则大约14%的Sn百分比或大约30%的In百分比可以用于在Ge层304A中提供大约2.5GPa的双轴应力。然而,应当理解的是,由于通过形成垂直导线而导致的弛豫,会需要较高的失配以便在最终器件中实现高应变的Ge。在实施例中,通过使用正方形布局,如在图3A中所描绘的,可以使得应力更为双轴化。尽管未示出,但是应当理解的是,包括栅极电介质层和栅极电极层的栅极叠置体形成为至少部分地(如果不是完整地)围绕沟道区306A。
在第二示例中,图3B示出了根据本发明的实施例的具有拉伸应变的Ge区的另一个垂直TFET器件的一部分300B的成角度的视图。参考图3B,在形成于虚衬底301B上方的应变层302B上方形成TFET器件。包括了锗源极区304B并且锗源极区304B具有拉伸应变。在锗源极区304B上方的是沟道区306B和漏极区308B。在一个实施例中,应变层302B、沟道区306B和漏极区308B由诸如应变的GeSn之类的相同材料形成,如在图3B中所描绘的。在实施例中,虚衬底301B是弛豫的Ge虚衬底。在实施例中,将GeSn层302B形成为压缩应变层。将Ge层304B沉积为无应变层,并且然后利用压缩应变的GeSn306B/308B来覆盖Ge层304B。在实施例中,一旦将这种材料叠置体图案化为导线,GeSn的弹性驰豫拉伸Ge(层304B),使得其为拉伸的。尽管未示出,但是应当理解的是,包括栅极电介质层和栅极电极层的栅极叠置体形成为至少部分地(如果不是完整地)围绕沟道区306B。
在第三示例中,图3C示出了根据本发明的实施例的具有拉伸应变的Ge区的另一个垂直TFET器件的一部分300C的成角度的视图。参考图3C,在虚衬底302C上方形成TFET器件。包括了锗源极区304C并且锗源极区304C具有拉伸应变。在锗源极区304C上方的是沟道区306C和漏极区308C。在一个实施例中,沟道区306C和漏极区308C由诸如应变的GeSn之类的相同材料形成,如在图3C中所描绘的。在实施例中,虚衬底302C是例如具有大约14%的Sn的弛豫的GeSn虚衬底。Ge层304C是拉伸应变的Ge,而GeSn区306C/308C是压缩应变的并且具有大约28%的Sn组分。应当理解的是,可以使用具有类似晶格常数的其它材料来代替GeSn虚衬底302C。在将结构300C形成为导线时,在实施例中,压缩GeSn 306C/308C帮助在分界面保持Ge层304C中的拉伸应变。尽管未示出,但是应当理解的是,包括栅极电介质层和栅极电极层的栅极叠置体形成为至少部分地(如果不是完整地)围绕沟道区306C。
在利用直接带隙的过渡的TFET器件的结构的另一个示例中,在实施例中,TFET器件基于具有用作源极或源极/沟道结的双轴拉伸应变的Ge1-ySny区的垂直薄本体。在一个这种实施例中,出于尺寸的考虑,Ge1-ySny区具有大约在2-4纳米范围内的垂直尺寸。存在实现用于制造具有Ge1-ySny的直接间隙源极区的高拉伸应变的若干可能的方法,以下相关联图4来描述其示例。
图4示出了根据本发明实施例的具有拉伸应变的Ge1-ySny区的垂直TFET器件的一部分400的成角度的视图。参考图4,在形成于衬底401A上方的虚衬底402上方形成TFET器件。包括了锗锡(GeSn)源极区404并且锗锡(GeSn)源极区404具有拉伸应变。在GeSn源极区404上方的是沟道区406和漏极区408。在一个实施例中,沟道区406和漏极区408由诸如GeSn之类的相同材料形成,如在图4中所描绘的。在实施例中,虚衬底402包括弛豫的层,诸如但不限于弛豫的InGaAs或弛豫的GeSn。可以选择相应的铟或锡百分比,以便调整GeSn层404中的应变。由于通过形成垂直导线而导致的弛豫,会需要较高的失配以便在最终器件中实现高应变的GeSn。在实施例中,通过使用正方形布局,如在图4中所描绘的,可以使得应力更为双轴化。尽管未示出,但是应当理解的是,包括栅极电介质层和栅极电极层的栅极叠置体形成为至少部分地(如果不是完整地)围绕沟道区406A。
那么,在一个方面中,用以实现用于制造P型和/或N型TFET的间接到直接的带隙的过渡的方法包括使用晶圆取向和导带非抛物性效应以便在薄本体鳍式场效应晶体管或纳米线Ge或GeSn TFET的限制下增大导带gamma谷质量。这种方法提供了作为最低导带边沿的导带gamma谷能量,以实现直接带隙。
例如,在闪锌矿材料中,在gamma点处的导带边沿是抛物线性的,但是远离带边沿,其就展现出基于等式(1)的非抛物性:
mΓ=mΓ0(1+αε) (1)。
具有较小带隙的材料展现出较大的非抛物性。非抛物性常数α取决于材料中的带隙和有效质量,如在等式(2)所示出的:
例如,对于锗(Ge),gamma点有效质量m*是0.04m0,直接带隙是0.8eV,以及非抛物性常数α是1.15eV-1。对于L谷边沿,非抛物性常数在0.3eV-1处显著较小。在驰豫的Ge体带结构中,gamma谷高于L谷0.14eV,如在图5中所示出的。对于这种间接带隙材料带结构,弹道电流小到难以察觉,并且所容许的隧穿工艺是光子辅助的,其具有低概率,并且导致驰豫的厚本体Ge TFET中的低ON电流。
图5是根据本发明的实施例的在大约300K温度下的体弛豫的Ge的能带图500。参考图500,带隙是间接的,因为能量导带中的最低的是在L点,以及价带顶在gamma点。在源极/沟道结的带到带隧穿工艺是光子辅助的两步工艺,所述光子辅助的两步工艺具有导致基于间接带隙材料的TFET中的低ION的低概率。
在量子限制结构中,能量ε对应于由于限制而引起的带边沿能量的偏移。借助窄结构中的较强限制,带能量增大,并且因此,gamma谷质量随着较小的结构尺寸而增大。L谷质量随着较强的限制而较小地增大,以及gamma谷成为在窄结构尺寸下的最低导带边沿。为了以最大程度的最小结构尺寸实现直接带隙,在实施例中,使用了对于限制的最佳晶圆取向。例如,在具体实施例中,在体Ge中,存在具有沿<111>、<11-1>、<-111>和<1-11>方向(以及沿相应的反向)的重的纵质量(longitudinal mass)m1=1.56m0的8个L谷和沿垂直方向的轻的横质量(transverse mass)mt=0.082m0。鳍式场效应晶体管中的<100>限制方向或导线中的(100)限制平面可以为所有L谷提供最轻质量,并且因此,在限制下最大地升高了相应能量。在限制下相应能量的这种升高可以容许以最大程度的最小结构尺寸来实现间接到直接的过渡。
在示范性的实施例中,图6是四个L谷的鳍式场效应晶体管器件的沿不同限制取向的电子质量的表600。参考表6,提供了针对L谷的沿<001>、<111>和<1-10>限制方向的体Ge中的导带质量(以电子质量为单位)。gamma谷是各向同性的,其在体Ge中具有0.04的质量。
借助窄本体TFET器件中增大的限制,相应的gamma质量可以由于非抛物性效应而增大,并且在大约5纳米本体下,可以成为导致Ge中的直接带隙的最低导带。在这种情况下,直接弹道隧穿电流可以在N型和P型Ge无应变(100)TFET中提供有竞争力的高ION和低SS,如在图7中所仿真的。
图7是根据本发明的实施例的N型和P型Ge器件的仿真的漏极电流(ID)随栅极电压(VG)变化的函数关系的绘图700。参考图7,将在窄的5nm本体双栅极的弛豫的(100)Ge同质结N型或P型TFET中的仿真的弹道电流绘制为栅极过驱动的函数。对于所述仿真,Lgate=40nm,EOT=1nm,源极/漏极延伸是20nm,源极/漏极掺杂是5e19cm-3。弛豫的Ge由于导致有竞争力的1A的ON电流和nTFET中12mV/dec或pTFET中15mV/dec的最小SS的窄本体限制而成为直接带隙材料。所述仿真涉及NEGF量子传输法和在OMEN仿真器中实现的sp3s*d5_SO紧束缚带结构模型。应当理解的是,根据本发明的实施例,可以通过使用具有源极或源极/沟道结中的窄本体直接带隙材料的异质结构设计来获得ION的进一步的增大。
在另一方面中,用以实现用于制造P型和/或N型TFET的间接到直接的带隙的过渡的方法包括使用Ge、GeSn或SiGeSn中的拉伸应变来实现直接带隙。
例如,Ge、GeSn或SiGeSn中沿主晶体取向<100>、<010>、<001>的拉伸双轴应力或拉伸单轴应力或者这些拉伸应力的组合可以用于实现直接带隙。在实施例中,所施加的机械应力打破了晶体对称性,分裂了能带简并。在形变势理论中,借助所施加的应力的带边沿偏移与具有作为比例系数的形变势的应变成线性比例。例如,在具体实施例中,在体Ge中所施加的拉伸双轴应变下,gamma谷成为在2GPa应力上的最低带边沿,如在图8中所示出的。相应的带隙也借助应力而变窄。
图8是根据本发明的实施例的仿真的能量(meV)随双轴应力(MPa)体Ge器件变化的函数关系的绘图800。参考绘图800,示出了在导带gamma谷边沿与其它谷的最近导带边沿之间的带隙变窄和相应的能量差异随体Ge中所施加的双轴应力变化的函数关系。所使用的校准模型应用Bir和Pikus的形变势理论。在具体实施例中,拉伸双轴应力Ge在大约2GPa以上成为直接的,并且可以用于增强N型和P型TFET的性能。
上述方法涉及使用拉伸应力来在Ge、GeSn或SiGeSn中实现直接带隙材料以便设计IV族材料中的高ION和低SS。例如,在实施例中,在窄的5nm本体同质结Ge-N型和/或P型TFET中施加2.5GPa拉伸双轴应力的情况下,在VG=VCC时的ION的增大在N型和P型Ge TFET中都大于大约5x,如在图9A中所仿真的。在一个这种实施例中,需要大约两倍的单轴拉伸应力的量来在Ge中实现直接带隙。然而,会需要较少的流体静力的拉伸应力来在Ge中实现直接带隙。相比于在仿真的5nm本体III-V族材料P型TFET中,具有由于限制与应力的组合效应引起的直接带隙的Ge P型TFET显示了大约3x的较低SS的优点。
图9A是根据本发明的实施例的N型和P型Ge器件的仿真的漏极电流(ID)随栅极电压(VG)变化的函数关系的绘图900A。参考绘图900A,在窄(100)5nm本体双栅极的弛豫的和在2.5GPa拉伸双轴应变Ge同质结N型或P型的TFET中观察到随栅极过驱动变化的仿真弹道漏极电流。对于所述仿真,Lgate=40nm,EOT=1nm,源极/漏极延伸是20nm,源极/漏极掺杂是5e19cm-3。应变的Ge是直接带隙材料,所述直接带隙材料导致在VG=VCC时的弛豫的材料上大于大约5x的ON电流增益,同时保持在N型TFET中19mV/dec和P型TFET中15mV/dec的低的最小SS。在实施例中,可以通过使用具有源极中的窄本体应变的直接带隙材料的异质结构设计来获得ION进一步的增大。
图9B是根据本发明的实施例的P型应变Ge器件或III-V族材料器件中的仿真的漏极电流(ID)随栅极电压(VG)变化的函数关系的绘图900B。参考绘图900B,针对Ge同质结P型TFET和针对在源极具有4nm InAs袋的异质结In0.53Ga0.47As P型TFET,在2.5GPa拉伸双轴应变情况下,示出了针对窄(100)5nm本体双栅极的仿真的弹道漏极电流随栅极过驱动变化的函数关系。对于所述仿真,Lgate=40nm,EOT=1nm,源极/漏极延伸是20nm,源极/漏极掺杂是5e19cm-3。如在图9B中所示出的并且根据本发明的实施例,与基于III-V族材料的P型TFET相比,基于Ge的P型TFET显示了SS的大约3x降低。
在用以在TFET中实现直接带隙的上述方法中,使用了鳍式场效应晶体管或纳米线中的拉伸应力。拉伸应力效应可以与窄本体限制效应相组合,以便最大化TFET性能。这种方法可以在平面双轴应变的Ge、GeSn、SiGeSn假晶膜或者在窄本体Ge同质结TFET或窄本体Ge源极-GeSn异质结构中实现。在一个这种实施例中,可以使用由于在Sn含量小于大约6%的GeSn中所施加的拉伸应力引起的间接带隙到直接带隙的过渡。
在另一个方面,用以实现用于制造P型和/或N型TFET的间接到直接的带隙过渡的方法包括在弛豫的GeSn或SiGeSn中使用Ge与Sn的合金来实现直接带隙。
例如,应当理解的是,Ge是间接带隙材料,而Sn是金属。在将Ge与Sn制成合金的过程中,对于Sn浓度在大约6%-10%以上,得到的GeSn经过了间接带隙到直接带隙的过渡。根据本发明的实施例,在图10A中示出了使用Jaros能带偏移理论计算的GeSn中的直接和间接带隙与Sn含量的关系。在图10B中示出了对于Ge1-x-ySixSny三元合金的过渡。参考图10A和图10B,在L、gamma和X导带谷处的Ge1-zSnz的带隙与z的Sn组分的关系示出了Sn的高于6%的间接到直接的带隙的过渡。可以通过经验伪势法(empirical pseudopotential method)来计算弛豫的Ge1-x-ySixSny合金的最低(直接或间接)带隙。对于这种方法,合金GeSn或SiGeSn用于在TFET中提供直接带隙。合金效应可以与窄本体限制效应和拉伸应力效应组合,以便最大化TFET性能。所述方法可以在窄本体同质结TFET中的弛豫的GeSn、SiGeSn膜或窄本体GeSn/SiGeSn源极-GeSn/Ge/SiGe异质结构中实现。
在另一个方面,提供了用以在所施加的应力的情况下利用直接带隙过渡的TFET器件中实现应力的方法。例如,图11A是根据本发明的实施例的描绘了对于不同线尺寸的在图3A中所示出的结构的应力仿真的绘图1100A。参考绘图1100A,对于沉积的Ge膜与虚衬底具有2%失配应变的情况,绘制了应力的平面分量中的两个。对于较小尺寸,需要大于2%的线失配来在线中实现大于大约2.5GPa的应力。
在另一个示例中,图11B是根据本发明的实施例的描绘了在图3B中所示出的结构的应力仿真的绘图1100B。参考绘图1100B,压缩应变的GeSn层使得Ge拉伸,因为其弹性地弛豫导致拉伸的Ge。在此情况下,在虚衬底上生长时,GeSn最初具有2%压缩应变。仅对于Ge层示出了平面应力(以dynes/cm2为单位)中的两个。应当理解的是,可以通过增大与虚衬底的失配来实现较高的应力。一个选择可以使用弛豫的SiGe虚衬底来替代Ge。对于最小线尺寸会需要这种方法。
在另一个示例中,图11C是根据本发明的实施例的描绘了在图3C中所示出的结构的应力仿真的绘图1100C。参考绘图1100C,此方法在源极/沟道分界面处导致大于大约2.5GPa的大的拉伸应力。这可以容许在GeSn层中使用较低的Sn浓度。
在上述实施例中,不管形成于虚衬底层上还是体衬底上,用于TFET器件制造的下层衬底都可以由可以经受制造工艺的半导体材料组成。在实施例中,衬底是体衬底,诸如在半导体工业中常用的P型硅衬底。在实施例中,衬底由以诸如但不限于磷、砷、硼或其组合的电荷载流子掺杂的晶体硅、硅/锗或锗层组成。在一个实施例中,衬底中硅原子的浓度大于97%,或者替换地,掺杂剂原子的浓度小于1%。在另一个实施例中,衬底由在截然不同的晶体衬底的顶部生长的外延层组成,例如,在硼掺杂的体硅单晶衬底顶部生长的硅外延层。
衬底可以反而包括设置在体晶体衬底与外延层之间的绝缘层,例如绝缘体上硅衬底。在实施例中,绝缘层由诸如但不限于二氧化硅、氮化硅、氮氧化硅或高k电介质层的材料组成。衬底可以替换地由III-V族材料组成。在实施例中,衬底由诸如但不限于氮化镓、磷化镓、砷化镓、磷化铟、锑化铟、砷化铟镓、砷化铝镓、磷化铟镓或其组合的III-V族材料组成。在另一个实施例中,衬底由III-V族材料和诸如但不限于碳、硅、锗、氧、硫、硒或碲的电荷-载流子掺杂剂杂质原子组成。
在以上实施例中,TFET器件包括可以以电荷载流子杂质原子掺杂的源极漏极区。在实施例中,IV族材料源极和/或漏极区包括诸如但不限于磷或砷的N型掺杂剂。在另一个实施例中,IV族材料源极和/或漏极区包括诸如但不限于硼的P型掺杂剂。
在以上实施例中,尽管没有一直示出,但是应当理解的是,TFET将还包括栅极叠置体。栅极叠置体包括栅极电介质层和栅极电极层。在实施例中,栅极电极叠置体的栅极电极由金属栅极组成,以及栅极电介质层由高K材料组成。例如,在一个实施例中,栅极电介质层由诸如但不限于氧化铪、氮氧化铪、硅酸铪、氧化镧、氧化锆、硅酸锆、氧化钽、钛酸锶钡、钛酸钡、钛酸锶、氧化钇、氧化铝、铅钪钽氧化物、铌酸锌铅或其组合的材料组成。进一步地,栅极电介质层中的一部分可以包括由相应沟道区的顶部几层形成的自然氧化物的层。在实施例中,栅极电介质层由顶部高k部分和由半导体材料的氧化物组成的下部部分组成。在一个实施例中,栅极电介质层由氧化铪的顶部部分和二氧化硅或氮氧化硅的底部部分组成。
在实施例中,栅极电极由诸如但不限于金属氮化物、金属碳化物、金属硅化物、金属铝化物、铪、锆、钛、钽、铝、钌、钯、铂、钴、镍、或导电金属氧化物的金属层组成。在具体实施例中,栅极电极由在金属功函数设定层上方形成的非功函数设定填充材料组成。在实施例中,栅极电极由P型或N型材料组成。栅极电极叠置体还可以包括电介质间隔体。
上述的TFET半导体器件覆盖平面和非平面器件,包括环绕式栅极器件。从而,更普遍地,半导体器件可以是包含栅极、沟道区和一对源极/漏极区的半导体器件。在实施例中,半导体器件是诸如但不限于MOS-FET的一个半导体器件。在一个实施例中,半导体器件是平面或三维MOS-FET,并且是孤立的器件或者是多个嵌套的器件中的一个器件。如对于典型的集成电路将意识到的,可以在单一衬底上制造N沟道和P沟道晶体管以便构成CMOS集成电路。此外,可以制造额外的互连布线,以便将这种器件集成到集成电路中。
总体上,本文所述的一个或多个实施例针对CMOS架构的隧穿场效应晶体管(TFET)和制造N型和P型TEFT的方法。可以通过诸如但不限于化学气相沉积(CVD)或分子束外延(MBE)或其它类似工艺的技术来形成用于这种器件的IV族有源层。
图12示出了根据本发明的一个实施方式的计算设备1200。计算设备1200容纳板1202。板1202可以包括若干组件,包括但不限于处理器1204和至少一个通信芯片1206。处理器1204物理地并且电气地耦合到板1202。在一些实施方式中,至少一个通信芯片1206也物理地并且电气地耦合到板1202。在进一步的实施方式中,通信芯片1206是处理器1204的部分。
取决于其应用,计算设备1200可以包括可以或可以不物理地并且电气地耦合到板1202的其它组件。这些其它组件包括但不限于易失性存储器(例如,DRAM)、非易失性存储器(例如ROM)、闪存、图形处理器、数字信号处理器、加密处理器、芯片组、天线、显示器、触摸屏显示器、触摸屏控制器、电池、音频编码解码器、视频编码解码器、功率放大器、全球定位系统(GPS)设备、指南针、加速度计、陀螺仪、扬声器、相机和大容量储存设备(诸如,硬盘驱动器、光盘(CD)、数字多功能盘(DVD)等等)。
通信芯片1206实现了用于往来于计算设备1200传送数据的无线通信。术语“无线”及其派生词可以用于描述可以通过使用通过非固态介质的调制电磁辐射来传输数据的电路、设备、系统、方法、技术、通信信道等。尽管在一些实施例中相关联的设备可以不包含任何线路,但是该术语并非暗示其不包含任何线路。通信芯片1206可以实现若干无线标准或协议中的任何一种,包括但不限于Wi-Fi(IEEE 802.11族)、WiMAX(IEEE 802.16族)、IEEE 802.20、长期演进(LTE)、Ev-DO、HSPA+、HSDPA+、HSUPA+、EDGE、GSM、GPRS、CDMA、TDMA、DECT、蓝牙、其派生物、以及被指定为3G、4G、5G及更高代的任何其它无线协议。计算设备1200可以包括多个通信芯片1206。例如,第一通信芯片1206可以专用于诸如Wi-Fi和蓝牙之类的近距离无线通信,而第二通信芯片1206可以专用于远距离无线通信,诸如GPS、EDGE、GPRS、CDMA、WiMAX、LTE、Ev-DO等。
计算设备1200的处理器1204包括封装在处理器1204内的集成电路管芯。在本发明的一些实施方式中,处理器的集成电路管芯包括一个或多个管芯,诸如根据本发明的实施方式构成的隧穿场效应晶体管(TFET)。术语“处理器”可以指任何设备或设备的部分,所述任何设备或设备的部分处理来自寄存器和/或存储器的电子数据,以便将该电子数据变换为可以存储在寄存器和/或存储器中的其它电子数据。
通信芯片1206还包括封装在通信芯片1206内的集成电路管芯。根据本发明的另一个实施方式,通信芯片的集成电路管芯包括一个或多个器件,例如根据本发明的实施方式构成的隧穿场效应晶体管(TFET)。
在进一步的实施方式中,容纳在计算设备1200中的另一个组件可以包含集成电路管芯,所述集成电路管芯包括一个或多个器件,诸如根据本发明的实施方式构成的隧穿场效应晶体管(TFET)。
在不同的实施方式中,计算设备1200可以是膝上型电脑、上网本、笔记本电脑、超级本、智能电话、平板电脑、个人数字助理(PDA)、超移动PC、移动电话、台式电脑、服务器、打印机、扫描器、监视器、机顶盒、娱乐控制单元、数码相机、便携式音乐播放器、或数码摄像机。在进一步的实施方式中,计算设备1200可以是处理数据的任何其它电子设备。
从而,本发明的实施例包括用于CMOS架构的隧穿场效应晶体管(TFET)和制造N型和P型TEFT的方法。
在实施例中,隧穿场效应晶体管(TFET)包括设置在衬底上方的同质结有源区。同质结有源区包括在其中具有无掺杂的沟道区的弛豫的Ge或GeSn本体。同质结有源区还包括掺杂的源极区和漏极区,所述掺杂的源极区和漏极区设置在沟道区的任一侧上的弛豫的Ge或GeSn本体中。TFET还包括栅极叠置体,所述栅极叠置体设置在源极区与漏极区之间的沟道区上。栅极叠置体包括栅极电介质部分和栅极电极部分。
在一个实施例中,弛豫的Ge或GeSn本体是直接带隙本体,并且具有大约5纳米或小于5纳米的厚度。
在一个实施例中,TFET是基于鳍式场效应晶体管、三栅极或正方形纳米线的器件。
在一个实施例中,掺杂的源极区和漏极区包括N型掺杂剂,并且TFET是N型器件。
在一个实施例中,掺杂的源极区和漏极区包括P型掺杂剂,并且TFET是P型器件。
在实施例中,隧穿场效应晶体管(TFET)包括设置在衬底上方的异质结有源区。异质结有源区包括弛豫的本体,所述弛豫的本体具有Ge或GeSn部分和晶格匹配的III-V族材料部分,并且在Ge或GeSn部分和晶格匹配的III-V族材料部分中具有无掺杂的沟道区。掺杂的源极区设置在沟道区的第一侧上的弛豫的本体的Ge或GeSn部分中。掺杂的漏极区设置在沟道区的第二侧上的弛豫的本体的III-V族材料部分中。TFET还包括栅极叠置体,所述栅极叠置体设置在源极区与漏极区之间的沟道区上。栅极叠置体包括栅极电介质部分和栅极电极部分。
在一个实施例中,弛豫的本体的Ge或GeSn部分是Ge部分,并且晶格匹配的III-V族材料部分是GaAs或Ga0.5In0.5P部分。
在一个实施例中,弛豫的本体是直接带隙本体,并且具有大约5纳米或小于5纳米的厚度。
在一个实施例中,TFET是基于鳍式场效应晶体管、三栅极或正方形纳米线的器件。
在一个实施例中,掺杂的源极区和漏极区包括N型掺杂剂,并且TFET是N型器件。
在一个实施例中,掺杂的源极区和漏极区包括P型掺杂剂,并且TFET是P型器件。
在实施例中,隧穿场效应晶体管(TFET)包括设置在弛豫的衬底上方的同质结有源区。同质结有源区包括在其中具有无掺杂的沟道区的双轴拉伸应变的Ge或Ge1-ySny本体。掺杂的源极区和漏极区设置在沟道区的任一侧上的双轴拉伸应变的Ge或Ge1-ySny本体中。TFET还包括设置在源极区与漏极区之间的沟道区上方的栅极叠置体。栅极叠置体包括栅极电介质部分和栅极电极部分。
在一个实施例中,弛豫的衬底是Ge1-xSnx(x>y)或InxGa1-xAs衬底。
在一个实施例中,双轴拉伸应变的Ge或Ge1-ySny本体是直接带隙本体,并且具有大约5纳米或小于5纳米的厚度。
在一个实施例中,TFET是基于平面、鳍式场效应晶体管、三栅极或正方形纳米线的器件。
在一个实施例中,TFET是鳍式场效应晶体管或三栅极器件,其中应变的Ge或Ge1-ySny本体具有沿<100>、<010>或<001>的晶体取向的单轴拉伸应力。
在一个实施例中,掺杂的源极区和漏极区包括N型掺杂剂,并且TFET是N型器件。
在一个实施例中,掺杂的源极区和漏极区包括P型掺杂剂,并且TFET是P型器件。
在实施例中,隧穿场效应晶体管(TFET)包括设置在衬底上方的异质结有源区。异质结有源区包括垂直纳米线,所述垂直纳米线具有下部Ge部分和上部GeSn部分,并且仅在GeSn部分中具有无掺杂的沟道区。掺杂的源极区设置在沟道区下方的垂直纳米线的Ge部分中。掺杂的漏极区设置在沟道区上方的垂直纳米线的GeSn部分中。TFET还包括栅极叠置体,所述栅极叠置体围绕在源极区与漏极区之间的沟道区设置。栅极叠置体包括栅极电介质部分和栅极电极部分。
在一个实施例中,垂直纳米线的下部Ge部分设置在衬底的虚衬底部分上,并且虚衬底是弛豫的InGaAs或弛豫的GeSn虚衬底。
在一个实施例中,垂直纳米线的下部Ge部分设置在压缩应变的GeSn层上。
在一个实施例中,垂直纳米线的下部Ge部分设置在设置于衬底的虚衬底部分上的较大Ge区上,并且虚衬底是弛豫的GeSn虚衬底。
在一个实施例中,GeSn虚衬底由大约14%的Sn组成,并且垂直纳米线的上部GeSn部分是压缩应变的并且由大约28%的Sn组成。
在一个实施例中,下部Ge部分具有拉伸应变。
在一个实施例中,以从上到下的角度来看,垂直纳米线具有大约正方形的几何形状,并且拉伸应变是双轴拉伸应变。
在一个实施例中,下部Ge部分具有大约2-4纳米范围中的垂直尺寸。
在一个实施例中,掺杂的源极区和漏极区包括N型掺杂剂,并且TFET是N型器件。
在一个实施例中,掺杂的源极区和漏极区包括P型掺杂剂,并且TFET是P型器件。
在实施例中,隧穿场效应晶体管(TFET)包括设置在衬底上方的异质结有源区。异质结有源区包括垂直纳米线,所述垂直纳米线具有下部拉伸应变的Ge1-ySny部分和上部Ge1-xSnx部分,并且仅在Ge1-xSnx部分中具有无掺杂的沟道区,其中,x>y。掺杂的源极区设置在沟道区下方的垂直纳米线的Ge1-ySny部分中。掺杂的漏极区设置在沟道区上方的垂直纳米线的Ge1-xSnx部分中。栅极叠置体围绕源极区与漏极区之间的沟道区设置。栅极叠置体包括栅极电介质部分和栅极电极部分。
在一个实施例中,垂直纳米线的下部拉伸应变的Ge1-ySny部分设置在衬底的虚衬底部分上,并且虚衬底是弛豫的InGaAs或弛豫的GeSn虚衬底。
Claims (20)
1.一种隧穿场效应晶体管(TFET),包括:
同质结有源区,所述同质结有源区设置在衬底上方,所述同质结有源区包括:
在其中具有无掺杂的沟道区的弛豫的Ge或GeSn本体;以及
掺杂的源极区和漏极区,所述掺杂的源极区和漏极区设置在所述沟道区的任一侧上的所述弛豫的Ge或GeSn本体中;以及
栅极叠置体,所述栅极叠置体设置在源极区与漏极区之间的所述沟道区上,所述栅极叠置体包括栅极电介质部分和栅极电极部分。
2.根据权利要求1所述的TFET,其中,所述弛豫的Ge或GeSn本体是直接带隙本体,并且具有大约5纳米或小于5纳米的厚度,并且其中,所述TFET是基于鳍式场效应晶体管、三栅极或正方形纳米线的器件。
3.一种隧穿场效应晶体管(TFET),包括:
异质结有源区,所述异质结有源区设置在衬底上方,所述异质结有源区包括:
弛豫的本体,所述弛豫的本体包括Ge或GeSn部分和晶格匹配的III-V族材料部分,并且在所述Ge或GeSn部分和所述晶格匹配的III-V族材料部分中具有无掺杂的沟道区;
掺杂的源极区,所述掺杂的源极区设置在所述沟道区的第一侧上的所述弛豫的本体的所述Ge或GeSn部分中;以及
掺杂的漏极区,所述掺杂的漏极区设置在所述沟道区的第二侧上的所述弛豫的本体的所述III-V族材料部分中;以及
栅极叠置体,所述栅极叠置体设置在所述源极区与所述漏极区之间的所述沟道区上,所述栅极叠置体包括栅极电介质部分和栅极电极部分。
4.根据权利要求3所述的TFET,其中,所述弛豫的本体的所述Ge或GeSn部分是Ge部分,并且所述晶格匹配的III-V族材料部分是GaAs或Ga0.5In0.5P部分。
5.根据权利要求3所述的TFET,其中,所述弛豫的本体是直接带隙本体,并且具有大约5纳米或小于5纳米的厚度,并且其中,所述TFET是基于鳍式场效应晶体管、三栅极或正方形纳米线的器件。
6.一种隧穿场效应晶体管(TFET),包括:
同质结有源区,所述同质结有源区设置在弛豫的衬底上方,所述同质结有源区包括:
在其中具有无掺杂的沟道区的双轴拉伸应变的Ge或Ge1-ySny本体;以及
掺杂的源极区和漏极区,所述掺杂的源极区和漏极区设置在所述沟道区的任一侧上的所述双轴拉伸应变的Ge或Ge1-ySny本体中;以及
栅极叠置体,所述栅极叠置体设置在所述源极区与所述漏极区之间的所述沟道区上,所述栅极叠置体包括栅极电介质部分和栅极电极部分。
7.根据权利要求6所述的TFET,其中,所述弛豫的衬底是Ge1-xSnx(x>y)或InxGa1-xAs衬底。
8.根据权利要求6所述的TFET,其中,所述双轴拉伸应变的Ge或Ge1-ySny本体是直接带隙本体,并且具有大约5纳米或小于5纳米的厚度。
9.根据权利要求6所述的TFET,其中,所述TFET是基于平面、鳍式场效应晶体管、三栅极或正方形纳米线的器件。
10.根据权利要求6所述的TFET,其中,所述TFET是鳍式场效应晶体管或三栅极器件,以及应变的Ge或Ge1-ySny本体具有沿<100>、<010>或<001>的晶体取向的单轴拉伸应力。
11.一种隧穿场效应晶体管(TFET),包括:
异质结有源区,所述异质结有源区设置在衬底上方,所述异质结有源区包括:
垂直纳米线,所述垂直纳米线包括下部Ge部分和上部GeSn部分,并且仅在所述GeSn部分中具有无掺杂的沟道区;
掺杂的源极区,所述掺杂的源极区设置在所述沟道区下方的所述垂直纳米线的所述Ge部分中;以及
掺杂的漏极区,所述掺杂的漏极区设置在所述沟道区上方的所述垂直纳米线的所述GeSn部分中;以及
栅极叠置体,所述栅极叠置体围绕所述源极区与所述漏极区之间的沟道区设置,所述栅极叠置体包括栅极电介质部分和栅极电极部分。
12.根据权利要求11所述的TFET,其中,所述垂直纳米线的所述下部Ge部分设置在所述衬底的虚衬底部分上,并且其中,所述虚衬底是弛豫的InGaAs虚衬底或弛豫的GeSn虚衬底。
13.根据权利要求11所述的TFET,其中,所述垂直纳米线的所述下部Ge部分设置在压缩应变GeSn层上。
14.根据权利要求11所述的TFET,其中,所述垂直纳米线的所述下部Ge部分设置在较大Ge区上,所述较大Ge区设置在所述衬底的虚衬底部分上,并且其中,所述虚衬底是弛豫的GeSn虚衬底。
15.根据权利要求14所述的TFET,其中,所述GeSn虚衬底包括大约14%的Sn,并且其中,所述垂直纳米线的所述上部GeSn部分是压缩应变的,并且包括大约28%的Sn。
16.根据权利要求11所述的TFET,其中,所述下部Ge部分具有拉伸应变。
17.根据权利要求16所述的TFET,其中,从自顶向下的角度来看,所述垂直纳米线具有大约正方形的几何形状,并且其中,所述拉伸应变是双轴拉伸应变。
18.根据权利要求11所述的TFET,其中,所述下部Ge部分具有大约2-4纳米范围中的垂直尺寸。
19.一种隧穿场效应晶体管(TFET),包括:
异质结有源区,所述异质结有源区设置在衬底上方,所述异质结有源区包括:
垂直纳米线,所述垂直纳米线包括下部拉伸应变的Ge1-ySny部分和上部Ge1-xSnx部分,并且仅在所述Ge1-xSnx部分中具有无掺杂的沟道区,其中,x>y;
掺杂的源极区,所述掺杂的源极区设置在所述沟道区下方的所述垂直纳米线的所述Ge1-ySny部分中;和
掺杂的漏极区,所述掺杂的漏极区设置在所述沟道区上方的所述垂直纳米线的所述Ge1-xSnx部分中;以及
栅极叠置体,所述栅极叠置体围绕所述源极区与所述漏极区之间的所述沟道区而设置,所述栅极叠置体包括栅极电介质部分和栅极电极部分。
20.根据权利要求19所述的TFET,其中,所述垂直纳米线的所述下部拉伸应变的Ge1-ySny部分设置在所述衬底的虚衬底部分上,并且其中,所述虚衬底是弛豫的InGaAs虚衬底或弛豫的GeSn虚衬底。
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Country Status (6)
Country | Link |
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US (4) | US8890120B2 (zh) |
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Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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US8890120B2 (en) * | 2012-11-16 | 2014-11-18 | Intel Corporation | Tunneling field effect transistors (TFETs) for CMOS approaches to fabricating N-type and P-type TFETs |
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US9484423B2 (en) | 2013-11-01 | 2016-11-01 | Samsung Electronics Co., Ltd. | Crystalline multiple-nanosheet III-V channel FETs |
US9570609B2 (en) | 2013-11-01 | 2017-02-14 | Samsung Electronics Co., Ltd. | Crystalline multiple-nanosheet strained channel FETs and methods of fabricating the same |
KR102201606B1 (ko) * | 2013-12-27 | 2021-01-12 | 인텔 코포레이션 | Cmos에 대한 2-축 인장 변형된 ge 채널 |
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US20160373108A1 (en) * | 2014-03-27 | 2016-12-22 | Intel Corporation | Multiplexor logic functions implemented with circuits having tunneling field effect transistors (tfets) |
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US9647098B2 (en) | 2014-07-21 | 2017-05-09 | Samsung Electronics Co., Ltd. | Thermionically-overdriven tunnel FETs and methods of fabricating the same |
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US11335793B2 (en) | 2018-02-28 | 2022-05-17 | Intel Corporation | Vertical tunneling field-effect transistors |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008123491A1 (ja) * | 2007-03-30 | 2008-10-16 | Nec Corporation | 電離衝突によるキャリア増倍を用いた半導体素子及びその作製方法 |
US20090026553A1 (en) * | 2007-07-25 | 2009-01-29 | Krishna Kumar Bhuwalka | Tunnel Field-Effect Transistor with Narrow Band-Gap Channel and Strong Gate Coupling |
US20110049476A1 (en) * | 2009-08-31 | 2011-03-03 | International Business Machines Corporation | Impact ionization field-effect transistor |
WO2012085715A1 (en) * | 2010-12-22 | 2012-06-28 | International Business Machines Corporation | Nanowire field -effect device with multiple gates |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4866488A (en) * | 1985-03-29 | 1989-09-12 | Texas Instruments Incorporated | Ballistic transport filter and device |
JP4528660B2 (ja) * | 2005-03-31 | 2010-08-18 | 株式会社東芝 | スピン注入fet |
US20060292776A1 (en) | 2005-06-27 | 2006-12-28 | Been-Yih Jin | Strained field effect transistors |
US7921590B2 (en) * | 2006-02-23 | 2011-04-12 | Strum, Ruger & Company, Inc. | Composite firearm barrel reinforcement |
JP4960007B2 (ja) * | 2006-04-26 | 2012-06-27 | 株式会社東芝 | 半導体装置及び半導体装置の製造方法 |
EP1900681B1 (en) | 2006-09-15 | 2017-03-15 | Imec | Tunnel Field-Effect Transistors based on silicon nanowires |
US8362561B2 (en) * | 2006-12-15 | 2013-01-29 | Nxp B.V. | Transistor device and method of manufacturing such a transistor device |
JP2008252086A (ja) * | 2007-03-12 | 2008-10-16 | Interuniv Micro Electronica Centrum Vzw | ゲートトンネル障壁を持つトンネル電界効果トランジスタ |
US20090206375A1 (en) * | 2008-02-19 | 2009-08-20 | Saha Samar K | Reduced Leakage Current Field-Effect Transistor Having Asymmetric Doping And Fabrication Method Therefor |
US8222657B2 (en) | 2009-02-23 | 2012-07-17 | The Penn State Research Foundation | Light emitting apparatus |
US8288803B2 (en) | 2009-08-31 | 2012-10-16 | International Business Machines Corporation | Tunnel field effect devices |
US8368127B2 (en) * | 2009-10-08 | 2013-02-05 | Globalfoundries Singapore Pte., Ltd. | Method of fabricating a silicon tunneling field effect transistor (TFET) with high drive current |
US8318568B2 (en) * | 2010-04-14 | 2012-11-27 | International Business Machines Corporation | Tunnel field effect transistor |
US8258031B2 (en) * | 2010-06-15 | 2012-09-04 | International Business Machines Corporation | Fabrication of a vertical heterojunction tunnel-FET |
US9397166B2 (en) * | 2011-12-20 | 2016-07-19 | Intel Corporation | Strained channel region transistors employing source and drain stressors and systems including the same |
US9136363B2 (en) * | 2011-12-30 | 2015-09-15 | Seoul National University R&Db Foundation | Compound tunneling field effect transistor integrated on silicon substrate and method for fabricating the same |
US8890120B2 (en) * | 2012-11-16 | 2014-11-18 | Intel Corporation | Tunneling field effect transistors (TFETs) for CMOS approaches to fabricating N-type and P-type TFETs |
-
2012
- 2012-11-16 US US13/678,867 patent/US8890120B2/en not_active Expired - Fee Related
-
2013
- 2013-06-12 WO PCT/US2013/045504 patent/WO2014077903A1/en active Application Filing
- 2013-06-12 CN CN201380054199.XA patent/CN104737295B/zh active Active
- 2013-06-12 EP EP13854345.9A patent/EP2920815B1/en active Active
- 2013-06-12 KR KR1020157009450A patent/KR101729870B1/ko active IP Right Grant
- 2013-06-12 CN CN201710216991.0A patent/CN107359197B/zh active Active
- 2013-06-12 KR KR1020177010395A patent/KR101991597B1/ko active IP Right Grant
- 2013-11-11 TW TW102140878A patent/TWI532180B/zh active
- 2013-11-11 TW TW104135227A patent/TWI587518B/zh active
- 2013-11-11 TW TW106108748A patent/TWI620329B/zh active
-
2014
- 2014-10-22 US US14/521,200 patent/US9412872B2/en active Active
-
2016
- 2016-07-13 US US15/209,552 patent/US9583602B2/en active Active
-
2017
- 2017-01-19 US US15/410,548 patent/US9911835B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008123491A1 (ja) * | 2007-03-30 | 2008-10-16 | Nec Corporation | 電離衝突によるキャリア増倍を用いた半導体素子及びその作製方法 |
US20090026553A1 (en) * | 2007-07-25 | 2009-01-29 | Krishna Kumar Bhuwalka | Tunnel Field-Effect Transistor with Narrow Band-Gap Channel and Strong Gate Coupling |
US20110049476A1 (en) * | 2009-08-31 | 2011-03-03 | International Business Machines Corporation | Impact ionization field-effect transistor |
WO2012085715A1 (en) * | 2010-12-22 | 2012-06-28 | International Business Machines Corporation | Nanowire field -effect device with multiple gates |
Non-Patent Citations (2)
Title |
---|
ADRIAN M. IONESCU ET AL: "Tunnel field-effect transistors as evergy-efficient electronic switches", 《NATURE》 * |
PENG HUEI LIM ET AL: "Enhanced direct bandgap emission in germanium by micromechanical strain engineering", 《OPTICS EXPRESS》 * |
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CN105070755A (zh) * | 2015-08-11 | 2015-11-18 | 西安电子科技大学 | 基于SiGeSn-GeSn材料的II型异质结隧穿场效应晶体管 |
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CN106601738B (zh) * | 2015-10-15 | 2018-08-24 | 上海新昇半导体科技有限公司 | 互补场效应晶体管及其制备方法 |
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CN107492549A (zh) * | 2016-06-12 | 2017-12-19 | 中芯国际集成电路制造(上海)有限公司 | 晶体管及形成方法 |
CN107658336A (zh) * | 2017-08-11 | 2018-02-02 | 西安科锐盛创新科技有限公司 | N型隧穿场效应晶体管 |
CN107658338A (zh) * | 2017-08-11 | 2018-02-02 | 西安科锐盛创新科技有限公司 | P型tfet器件 |
CN107658336B (zh) * | 2017-08-11 | 2021-04-30 | 西安科锐盛创新科技有限公司 | N型隧穿场效应晶体管 |
Also Published As
Publication number | Publication date |
---|---|
US8890120B2 (en) | 2014-11-18 |
US9911835B2 (en) | 2018-03-06 |
KR20150052317A (ko) | 2015-05-13 |
US20150041847A1 (en) | 2015-02-12 |
KR101729870B1 (ko) | 2017-04-24 |
TW201605051A (zh) | 2016-02-01 |
TW201742253A (zh) | 2017-12-01 |
TWI620329B (zh) | 2018-04-01 |
TWI587518B (zh) | 2017-06-11 |
CN107359197A (zh) | 2017-11-17 |
US20160322480A1 (en) | 2016-11-03 |
EP2920815B1 (en) | 2022-06-01 |
US20170133493A1 (en) | 2017-05-11 |
CN107359197B (zh) | 2021-05-28 |
EP2920815A1 (en) | 2015-09-23 |
EP2920815A4 (en) | 2016-10-12 |
TW201436221A (zh) | 2014-09-16 |
US9583602B2 (en) | 2017-02-28 |
KR20170045377A (ko) | 2017-04-26 |
KR101991597B1 (ko) | 2019-06-20 |
US9412872B2 (en) | 2016-08-09 |
US20140138744A1 (en) | 2014-05-22 |
CN104737295B (zh) | 2017-12-26 |
WO2014077903A1 (en) | 2014-05-22 |
TWI532180B (zh) | 2016-05-01 |
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