CN104737288B - 用于堆叠式多芯片集成电路的静电保护 - Google Patents

用于堆叠式多芯片集成电路的静电保护 Download PDF

Info

Publication number
CN104737288B
CN104737288B CN201380052136.0A CN201380052136A CN104737288B CN 104737288 B CN104737288 B CN 104737288B CN 201380052136 A CN201380052136 A CN 201380052136A CN 104737288 B CN104737288 B CN 104737288B
Authority
CN
China
Prior art keywords
fuse
node
integrated circuit
die
chip module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201380052136.0A
Other languages
English (en)
Chinese (zh)
Other versions
CN104737288A (zh
Inventor
B·M·亨德森
C-G·谭
G·A·尤维戈哈拉
R·贾里泽纳里
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN104737288A publication Critical patent/CN104737288A/zh
Application granted granted Critical
Publication of CN104737288B publication Critical patent/CN104737288B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73257—Bump and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06527—Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06565—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices having the same size and there being no auxiliary carrier between the devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CN201380052136.0A 2012-10-05 2013-10-03 用于堆叠式多芯片集成电路的静电保护 Active CN104737288B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/646,109 US9184130B2 (en) 2012-10-05 2012-10-05 Electrostatic protection for stacked multi-chip integrated circuits
US13/646,109 2012-10-05
PCT/US2013/063297 WO2014055777A1 (en) 2012-10-05 2013-10-03 Electrostatic protection for stacked multi-chip integrated circuits

Publications (2)

Publication Number Publication Date
CN104737288A CN104737288A (zh) 2015-06-24
CN104737288B true CN104737288B (zh) 2017-09-26

Family

ID=49448293

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201380052136.0A Active CN104737288B (zh) 2012-10-05 2013-10-03 用于堆叠式多芯片集成电路的静电保护

Country Status (6)

Country Link
US (1) US9184130B2 (enExample)
EP (1) EP2904638B1 (enExample)
JP (1) JP5972473B2 (enExample)
KR (1) KR101671367B1 (enExample)
CN (1) CN104737288B (enExample)
WO (1) WO2014055777A1 (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9184130B2 (en) * 2012-10-05 2015-11-10 Qualcomm Incorporated Electrostatic protection for stacked multi-chip integrated circuits
JP5543567B2 (ja) * 2012-10-22 2014-07-09 誠 雫石 半導体素子の製造方法
KR102341750B1 (ko) 2015-06-30 2021-12-23 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
KR102482023B1 (ko) * 2016-01-28 2022-12-28 삼성전자주식회사 적층 메모리 칩 전기적 단락 검출 장치 및 방법
US10147688B2 (en) 2016-02-25 2018-12-04 Allegro Microsystems, Llc Integrated circuit device with overvoltage discharge protection
CN107622999B (zh) * 2016-07-15 2020-06-02 中芯国际集成电路制造(上海)有限公司 静电放电保护电路
US10145904B2 (en) * 2016-08-24 2018-12-04 Allegro Microsystems, Llc Multi-die integrated circuit device with overvoltage protection
US9941224B2 (en) 2016-08-24 2018-04-10 Allegro Microsystems, Llc Multi-die integrated circuit device with capacitive overvoltage protection
CN107799502B (zh) * 2016-09-05 2020-03-10 中芯国际集成电路制造(上海)有限公司 保护电路和集成电路
US10325906B2 (en) * 2016-09-23 2019-06-18 Taiwan Semiconductor Manufacturing Company, Ltd. ESD testing structure, method of using same and method of forming same
JP2018133503A (ja) 2017-02-16 2018-08-23 東芝メモリ株式会社 半導体記憶装置
US10552564B1 (en) * 2018-06-19 2020-02-04 Cadence Design Systems, Inc. Determining worst potential failure instances using full chip ESD analysis
DE102021101251A1 (de) 2020-03-31 2021-09-30 Taiwan Semiconductor Manufacturing Co., Ltd. Schutz vor antenneneffekten und schutz vor elektrostatischen entladungen für dreidimensionale integrierte schaltkreise
US11437708B2 (en) * 2020-03-31 2022-09-06 Taiwan Semiconductor Manufacturing Company, Ltd. Antenna effect protection and electrostatic discharge protection for three-dimensional integrated circuit
FR3109666A1 (fr) * 2020-04-27 2021-10-29 3D Plus Procédé de fabrication d’un module électronique compatible hautes fréquences
CN112349655B (zh) * 2020-10-21 2021-10-19 长江存储科技有限责任公司 一种半导体器件及其安装结构、封装模具和制作方法
US11973057B2 (en) 2020-12-15 2024-04-30 Analog Devices, Inc. Through-silicon transmission lines and other structures enabled by same
FR3120160B1 (fr) * 2021-02-23 2023-11-03 Commissariat Energie Atomique Procédé de protection d’un étage supérieur de composants électroniques d’un circuit intégré contre l’effet d’antenne

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5913354A (ja) 1982-07-13 1984-01-24 Toshiba Corp 半導体装置
JPS59134863A (ja) * 1982-12-28 1984-08-02 Fujitsu Ltd 静電破壊防止回路
JPH02146762A (ja) * 1988-11-28 1990-06-05 Nec Corp 半導体集積回路装置
US5807791A (en) 1995-02-22 1998-09-15 International Business Machines Corporation Methods for fabricating multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes
US6141245A (en) * 1999-04-30 2000-10-31 International Business Machines Corporation Impedance control using fuses
US6327125B1 (en) 1999-12-22 2001-12-04 Philips Electronics North America Corporation Integrated circuit with removable ESD protection
US6556409B1 (en) * 2000-08-31 2003-04-29 Agere Systems Inc. Integrated circuit including ESD circuits for a multi-chip module and a method therefor
JP2003324151A (ja) 2002-04-26 2003-11-14 Toshiba Microelectronics Corp 半導体集積回路装置、実装基板装置、及び実装基板装置の配線切断方法
WO2006028231A1 (en) * 2004-09-10 2006-03-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
KR100948520B1 (ko) * 2006-08-30 2010-03-23 삼성전자주식회사 정전기 특성을 개선한 증폭기
US7772124B2 (en) * 2008-06-17 2010-08-10 International Business Machines Corporation Method of manufacturing a through-silicon-via on-chip passive MMW bandpass filter
US8698139B2 (en) * 2008-11-25 2014-04-15 Qualcomm Incorporated Die-to-die power consumption optimization
JP2010129958A (ja) * 2008-12-01 2010-06-10 Seiko Epson Corp 半導体装置及び半導体装置の製造方法
US9184130B2 (en) * 2012-10-05 2015-11-10 Qualcomm Incorporated Electrostatic protection for stacked multi-chip integrated circuits

Also Published As

Publication number Publication date
JP5972473B2 (ja) 2016-08-17
US20140098448A1 (en) 2014-04-10
WO2014055777A1 (en) 2014-04-10
EP2904638A1 (en) 2015-08-12
KR101671367B1 (ko) 2016-11-01
JP2015532534A (ja) 2015-11-09
EP2904638B1 (en) 2020-05-27
US9184130B2 (en) 2015-11-10
CN104737288A (zh) 2015-06-24
KR20150064117A (ko) 2015-06-10

Similar Documents

Publication Publication Date Title
CN104737288B (zh) 用于堆叠式多芯片集成电路的静电保护
US12222880B2 (en) Stacked semiconductor device assembly in computer system
US20140225246A1 (en) Dual substrate, power distribution and thermal solution for direct stacked integrated devices
US9412708B2 (en) Enhanced ESD protection of integrated circuit in 3DIC package
KR102411667B1 (ko) 동축 상호접속부를 포함하는 통합 디바이스
US10128215B1 (en) Package including a plurality of stacked semiconductor devices having area efficient ESD protection
US9853446B2 (en) Integrated circuit (IC) package comprising electrostatic discharge (ESD) protection
US9224702B2 (en) Three-dimension (3D) integrated circuit (IC) package
US7960823B2 (en) Semiconductor device with different sized ESD protection elements
US20060232292A1 (en) Semiconductor integrated circuit and method for testing connection state between semiconductor integrated circuits
US20140061881A1 (en) Integrated circuit
TW201818483A (zh) 半導體封裝與其製造方法
US20150115403A1 (en) Toroid inductor in an integrated device
US20250006726A1 (en) Serial interface providing electrostatic discharge protection
Shukla et al. Charged device model reliability of three-dimensional integrated circuits
US20250007278A1 (en) High-frequency interface circuit protection from electrostatic discharge events
US20250393221A1 (en) Systems and methods for providing power integrity to functional circuitry of a semiconductor device
Veendrick Packaging

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant