CN104704622B - 覆晶粘晶用芯片保持工具以及覆晶粘晶方法 - Google Patents
覆晶粘晶用芯片保持工具以及覆晶粘晶方法 Download PDFInfo
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Abstract
本发明为一种覆晶粘晶用芯片保持工具(10)以及覆晶粘晶方法,芯片保持工具的特征在于包括基底(11)以及芯片保持台(15),该芯片保持台(15)自基底(11)的表面(12)突出且在其前端面(16)保持半导体芯片,其中:芯片保持台(15)相对于基底(11)偏移,且上述芯片保持台(15)的偏移量比自上述基体部长度的1/2减去上述半导体芯片的粘晶间距的1/2所得的长度长。由此,利用简便的方法,以窄的粘晶间距来对半导体芯片进行覆晶粘晶。
Description
技术领域
本发明是有关于一种覆晶粘晶用芯片保持工具以及覆晶粘晶方法。
背景技术
关于将作为电子零件的半导体芯片安装于基板的方法,广泛采用覆晶粘晶,即,在半导体芯片的电路面上利用焊料等材料形成多个凸块(突起电极),将该凸块通过加热熔融而接合于形成在电路基板上的多个电极,藉此将半导体芯片直接接合于电路基板。
覆晶粘晶中使用如下方法:预先通过分配器在电路基板上涂布热硬化性的非导电膏(NCP),将经加热的半导体芯片推压至基板的电极而使凸块加热熔融从而将半导体芯片粘晶于基板上,与此同时,通过半导体芯片使非导电膏(NCP)加热硬化而将半导体芯片与电路基板之间进行树脂密封(例如,参照专利文献1)。
覆晶粘晶中使用的粘晶工具,例如如专利文献2的图1或图2所示,包含四方的平板状的基底、及吸附配置于基底的中心部的半导体芯片的薄的长方体的芯片保持台。芯片保持台的大小与粘晶的半导体芯片的大小大致相同。粘晶工具整体构成得薄,以能够高效地将加热器的热传递至由芯片保持台保持的半导体芯片,芯片保持台自基底突出的高度成为粘晶时不与邻接的半导体芯片接触的程度的高度(例如,参照专利文献2)。
现有技术文献
专利文献
专利文献1:日本专利特开2005-150446号公报
专利文献2:日本专利特开2002-16091号公报
发明内容
发明所要解决的问题
然而,近年来,正逐渐要求以窄的粘晶间距将多个半导体芯片45粘晶于基板40上。该情况下,芯片保持工具100可根据粘晶的半导体芯片45的大小而更换为芯片保持台105的尺寸小的芯片保持工具,而多数情况下就加热器20而言,使用的是相同大小的加热器,因而固定于芯片保持工具100的加热器20的基底101的大小与半导体芯片45的大小无关而为大致固定的大小。因此,如图4所示,在以比加热器20、或者基底101的长度C0窄的粘晶间距XP来粘晶半导体芯片45时,加热器20、或者芯片保持工具100的长度C0的一半的长度C1比半导体芯片45的粘晶间距XP的1/2长,从而在粘晶时表面102延伸至涂布于邻接的粘晶位置的未粘晶的非导电膏(NCP)42的上表面为止,并覆盖于其上。加热器20将半导体芯片45加热至300℃~350℃的温度,因此芯片保持台105的表面102也达到相当高的温度,如图4的向下的箭头所示,会将未粘晶的非导电膏(NCP)42的表面加热。若非导电膏(NCP)42被加热至70℃左右,则多数情况下会开始变质,从而如图4所示,若通过向芯片保持台105的周围露出的表面102,而加热至高温,则有时会在粘晶前开始变质,或者开始硬化。因此,在半导体芯片45的粘晶间距XP比加热器20、或者芯片保持工具100的长度C0窄,且加热器20的热自芯片保持工具100的表面102辐射至未粘晶的非导电膏(NCP)42的情况下,例如多采用如下方法,即,暂时在每隔一个的粘晶位置涂布非导电膏(NCP)42,在该位置粘晶半导体芯片45后,再次在未粘晶半导体芯片45的位置涂布非导电膏(NCP)42,且在该位置粘晶半导体芯片45,以此方式将粘晶间距设为XP的2倍并分两次进行粘晶,从而存在除粘晶耗费时间外、粘晶的步骤变得复杂的问题。
本发明的目的在于利用简便的方法以窄的粘晶间距来对半导体芯片进行覆晶粘晶。
解决问题的手段
本发明的芯片保持工具是覆晶粘晶用的芯片保持工具,其特征在于包括:基体部;以及芯片保持台,自基体部的表面突出,且在其前端面保持半导体芯片,其中,芯片保持台相对于基体部偏移,且芯片保持台的偏移量比自基体部长度的1/2减去半导体芯片的粘晶间距的1/2所得的长度长。
本发明的芯片保持工具中,较佳为芯片保持台的偏移量比芯片保持台的宽度的1/2短。
一种覆晶粘晶方法,在基板上粘晶多个半导体芯片,其特征在于包括:将芯片保持工具设定在覆晶粘晶装置的步骤,上述芯片保持工具包括基体部以及芯片保持台,上述芯片保持台相对于基体部偏移,且以在前端面保持半导体芯片的方式自基体部的表面突出,芯片保持台的偏移量比自基体部长度的1/2减去半导体芯片的粘晶间距的1/2所得的长度长;以及粘晶步骤,朝向芯片保持台的偏移侧交替地重复进行半导体芯片的粘晶与使芯片保持工具相对于基板的相对位置移动半导体芯片的粘晶间距的量,从而将多个半导体芯片粘晶于基板上。
发明的效果
本发明实现如下效果:能够利用简便的方法以窄的粘晶间距来对半导体芯片进行覆晶粘晶。
附图说明
图1A是本发明的实施形态的芯片保持工具的立视图。
图1B是本发明的实施形态的芯片保持工具的平面图。
图2是表示使用本发明的实施形态的芯片保持工具而进行的粘晶步骤的立视图。
图3是表示使用本发明的实施形态的芯片保持工具的粘晶步骤的平面图。
图4是表示使用现有技术的芯片保持工具而进行的粘晶步骤的立视图。
符号说明
10、100:芯片保持工具
11、101:基底
12、41、102:表面
13、103:加热器连接面
15、105:芯片保持台
16、106:前端面
17:吸附孔
20:加热器
22:下表面
30:粘晶头
40:基板
42:非导电膏
43、431-436:硬化树脂
45、451-456:半导体芯片
51-53、61-63:中心线
55、65:中心点
91、92:箭头
XP、YP:粘晶间距
ΔX、ΔY:偏移量
具体实施方式
以下,一边参照附图一边对本发明的实施形态进行说明。如图1A、图1B所示,本实施形态的芯片保持工具10包括:作为固定于加热器20的基体部的平板状的基底11,以及自基底11的表面12突出且在其前端面16保持半导体芯片的芯片保持台15。而且,在前端面16的中央设置着吸附固定半导体芯片的吸附孔17。图1A、图1B中表示芯片保持工具10吸附固定于被固定在粘晶头30的前端的加热器20的下表面22的状态,将覆晶粘晶装置的基板输送方向设为X方向,将在水平面内与X方向成直角的方向设为Y方向,将上下方向设为Z方向而进行说明。以下的各图中XYZ的方向也相同。
如图1A、图1B所示,基底11为厚度(Z方向)H1、宽度(X方向)D0、纵深(Y方向)E0的矩形平板,且与加热器20为大致相同的大小。加热器20侧的加热器连接面13利用真空吸附而固定于加热器20的下表面22(Z方向负(minus)侧的面)。芯片保持台15配置于基底11的与加热器连接面13为相反的一侧,吸附半导体芯片的前端面16(Z方向负侧的前端面)为自基底11的表面12以高度H2向Z方向负侧突出的、厚度(Z方向)H2、宽度(X方向)D2、纵深(Y方向)E2的长方体的基座,四方的芯片保持台15的XY方向的各边以与基底11的XY方向的各边平行的方式而配置。芯片保持台15的厚度H2为如下厚度,即,将半导体芯片粘晶时,不与邻接的半导体芯片或涂布于基板的非导电膏(NCP)42接触。而且,芯片保持工具10的整体厚度为H0。
如图1A、图1B所示,基底11的X方向的中心线51、Y方向的中心线52的交叉点即基底11的XY面内的中心点55,与加热器20、粘晶头30的在XY面内的中心点为同一点,如图1A所示,通过中心点55的Z方向中心线53在加热器20、粘晶头30、基底11中为共用。另一方面,芯片保持台15的X方向的中心线61、Y方向的中心线62处于分别自基底11的X方向的中心线51、Y方向的中心线52以距离ΔX、距离ΔY而向X方向负侧、Y方向正(plus)侧偏离所得的位置。而且,芯片保持台15的X方向的中心线61、Y方向的中心线62的交叉点即芯片保持台15的在XY面内的中心点65的位置,以及通过中心点65的Z方向中心轴63,也处于自基底11的X方向的中心线51、Y方向的中心线52的交叉点即基底11的在XY面内的中心点55以及中心线53分别以距离ΔX、距离ΔY而向X方向负侧、Y方向正侧偏离所得的位置。即,芯片保持台15相对于基底11且相对于XY方向而分别偏移ΔX、ΔY来配置。
因此,芯片保持台15的X方向的偏移侧长度D1(自Y方向中心线62或者Z方向中心线63算起的X方向负侧长度)比基底11的X方向长度D0的1/2短了X方向偏移量ΔX(D1=D0/2-ΔX)。同样地,芯片保持台15的Y方向的偏移侧长度E1(自X方向中心线61或者Z方向中心线63算起的Y方向正侧长度)也比基底11的Y方向长度E0的1/2短了Y方向偏移量ΔY(E1=E0/2-ΔY)。而且,如图2、图3所示,芯片保持台15的X方向偏移量ΔX、Y方向偏移量ΔY比如下的长度长,该长度是自基底11的X方向的长度D0、Y方向的长度E0的1/2减去半导体芯片45的X方向的粘晶间距XP、Y方向的粘晶间距YP的1/2所得(ΔX>D0/2-XP/2)、(ΔY>E0/2-YP/2)。因此,芯片保持台15的X方向的偏移侧长度D1、Y方向的偏移侧长度E1比半导体芯片45的X方向的粘晶间距XP、Y方向的粘晶间距YP的1/2短(D1<XP/2、E1<YP/2)。
因此,如图2、图3所示,粘晶时,芯片保持工具10的X方向、Y方向的各偏移侧的表面12不会延伸至邻接的未粘晶的非导电膏(NCP)42上,从而可抑制在粘晶时将邻接的未粘晶的非导电膏(NCP)42加热。
而且,中心线53为经由加热器20自粘晶头30向Z方向施加的垂直负载的中心线,芯片保持台15配置于如下位置,即,通过基底11的中心点的Z方向中心线53贯通芯片保持台15的前端面16的位置。即,芯片保持台15以Z方向负载施加至前端面16的面内的方式而配置,从而构成为不会因粘晶时施加至芯片保持台15的偏心负载而半导体芯片以芯片保持台15的前端面16的角部为中心发生旋转。因此,XY各方向的偏移量:ΔX、ΔY分别比芯片保持台15的X方向长度D2、Y方向长度E2的1/2小。
其次,一边参照图2、图3,一边对使用参照图1说明的芯片保持工具10将半导体芯片45粘晶于基板40的方法进行说明。
首先,将参照图1A、图1B说明的本实施形态的芯片保持工具10吸附固定于被固定在粘晶头30的加热器20的下表面22。此时,芯片保持工具10的四周的各边分别对准加热器20的四周的各边的方向,以芯片保持台15的XY方向的各偏移侧分别成为X方向负侧、Y方向负侧的方式而吸附固定于加热器20的下表面22。
其次,如图2、图3所示,通过未图示的分配器,在粘晶半导体芯片45的基板40的表面41的各位置上,涂布非导电膏(NCP)42。非导电膏(NCP)42如图3所示涂布为X形,该X形在粘晶半导体芯片45的位置的中心处交叉,且其长度为粘晶的半导体芯片45的对角长度。所涂布的非导电膏(NCP)42如图2所示,自基板40的表面41凸起。
在基板40上涂布非导电膏(NCP)42后,将基板40在未图示的预热(pre-heating)平台加热至70℃左右,之后吸附固定于未图示的粘晶平台。黏晶平台将基板40的温度保持为70℃左右。接着,使芯片保持台15的前端面16的吸附孔17为真空而将半导体芯片45吸附固定于前端面16,打开加热器20,将半导体芯片45加热至300℃~350℃。在加热半导体芯片45后,如图2所示,使粘晶头30下降,将吸附在芯片保持台15的前端面16的半导体芯片45挤压至非导电膏(NCP)42上。于是,经加热器20的加热而熔融的半导体芯片45的未图示的凸块的焊料熔融,并与基板40的电极接合。而且,若将半导体芯片45挤压至非导电膏42,则非导电膏(NCP)42覆盖半导体芯片45的基板40侧的整个面,其一部分以向半导体芯片45的四周少量露出的方式而推开。然后通过来自半导体芯片45的热而硬化,并如图2所示,成为填埋基板40与半导体芯片45的间隙的硬化树脂43。
半导体芯片45的粘晶如图3所示的中空箭头91、中空箭头92般,朝向芯片保持台15的XY的各偏移侧依次进行。以下,一边参照图3一边说明粘晶的步骤。如图3所示,首先,在基板40的最右上的角位置(X方向正侧、Y方向正侧的角)粘晶半导体芯片451。在半导体芯片451与基板40之间以及半导体芯片451的周围,非导电膏(NCP)42硬化,从而成为硬化树脂431。半导体芯片451的粘晶结束后,通过未图示的粘晶平台使基板40向Y方向正侧移动Y方向粘晶间距YP的量。于是,粘晶头30的位置相对于基板40而如图3的中空箭头92般,朝向Y方向负侧移动Y方向粘晶间距YP。然后,使粘晶头30下降并在下一粘晶位置粘晶半导体芯片452。然后,交替地重复进行半导体芯片的粘晶与未图示的粘晶平台的移动,从而将半导体芯片453、半导体芯片454依次黏晶。半导体芯片454的粘晶结束后,使未图示的粘晶平台向X方向正侧移动X方向粘晶间距XP,并且使粘晶平台向Y方向负侧移动4粘晶间距的量(4×YP)。即,使粘晶头30相对于基板40而如图3的中空箭头91般,向X方向负侧移动XP,并向Y方向正侧移动4粘晶间距的量(4×YP)。接着,使粘晶头30下降而粘晶图3所示的半导体芯片455。这样,如图3所示的中空箭头91、中空箭头92所示,使粘晶头30相对于基板40,一边向偏移侧(X方向负侧、Y方向正侧)移动一边依次粘晶半导体芯片45。
如图2、图3所示,芯片保持台15的X方向的偏移侧长度D1、Y方向的偏移侧长度E1比半导体芯片45的X方向粘晶间距XP、Y方向粘晶间距YP的1/2短。因此,粘晶时,芯片保持工具10的X方向、Y方向的各偏移侧的表面12不会延伸至邻接的未粘晶的非导电膏(NCP)42上,从而可抑制粘晶时将邻接的未粘晶的非导电膏(NCP)42加热。而且,如先前说明般,使粘晶头30相对于基板40,一边向偏移侧(X方向负侧、Y方向正侧)移动一边粘晶半导体芯片451~半导体芯片456,藉此可在涂布于未粘晶的位置的非导电膏(NCP)42上,以芯片保持工具10的表面12的偏移侧的区域不被覆盖的状态而依次粘晶邻接的半导体芯片451~半导体芯片456。因此,通过使用本实施形态的芯片保持工具10,即便在半导体芯片45进行黏晶的X方向的粘晶间距XP、Y方向的粘晶间距YP比加热器20的大小、或者芯片保持工具10的基底11的大小D0、E0窄的情况下,也可抑制涂布于未粘晶的位置的非导电膏(NCP)42的温度的上升,从而可在邻接的位置依次粘晶半导体芯片45并且可在短时间内将大量的半导体芯片45粘晶于基板40。另外,如图2、图3所示,芯片保持台15的X方向的反偏移侧长度D3、Y方向的反偏移侧长度E3比半导体芯片45进行黏晶的X方向的粘晶间距XP、Y方向的粘晶间距YP的1/2长,且基底11的表面12覆盖于邻接的已完成粘晶的半导体芯片451~半导体芯片455上,但该部分的非导电膏42已经热硬化而成为硬化树脂431~硬化树脂435,因此即便受到基底11的表面12加热也不会有问题。
以上说明的实施形态实现如下的效果:利用使芯片保持台15相对于基底11偏移这样的简便的方法,便可以窄的粘晶间距将半导体芯片45依次覆晶粘晶。
以上说明的实施形态中,将芯片保持工具10设为四边形、芯片保持台15也设为四边形状而进行了说明,但形状并不限于四边,可为圆形也可为椭圆形等其他形状。
本发明并不限于上述已说明的实施型态,而还包括不脱离权利要求所规定的本发明的技术范围乃至本质的全部的变更以及修正。
Claims (3)
1.一种用于覆晶粘晶的芯片保持工具,包括:
基体部;以及
芯片保持台,自所述基体部的表面突出,且在其前端面保持半导体芯片,其中:
所述芯片保持台相对于所述基体部偏移,
且所述芯片保持台的偏移量比自所述基体部长度的1/2减去所述半导体芯片的粘晶间距的1/2所得的长度长。
2.根据权利要求1所述的用于覆晶粘晶的芯片保持工具,其中
所述芯片保持台的偏移量比所述芯片保持台的宽度的1/2短。
3.一种覆晶粘晶方法,在基板上粘晶多个半导体芯片,所述覆晶粘晶方法包括:
将芯片保持工具设定在覆晶粘晶装置的步骤,所述芯片保持工具包括基体部以及芯片保持台,所述芯片保持台相对于所述基体部偏移,且以在前端面保持所述半导体芯片的方式自所述基体部的表面突出,所述芯片保持台的偏移量比自所述基体部长度的1/2减去所述半导体芯片的粘晶间距的1/2所得的长度长;以及
粘晶步骤,朝向所述芯片保持台的偏移侧交替地重复进行半导体芯片的粘晶与使所述芯片保持工具相对于所述基板的相对位置仅移动所述半导体芯片的粘晶间距的量,从而将多个所述半导体芯片粘晶于所述基板上。
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JP2002217242A (ja) * | 2001-01-23 | 2002-08-02 | Matsushita Electric Ind Co Ltd | 超音波接合方法とその装置 |
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JP2002217242A (ja) * | 2001-01-23 | 2002-08-02 | Matsushita Electric Ind Co Ltd | 超音波接合方法とその装置 |
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