CN104701161B - 一种沟槽型肖特基二极管的制备工艺方法 - Google Patents
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- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 3
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Abstract
本发明公开了一种沟槽型肖特基二极管的制备工艺方法,具体是利用两步干法刻蚀接触孔,将接触孔先刻蚀至硅表面,然后将硅和沟槽内的氧化硅一同刻蚀,其中最后一步接触孔刻蚀菜单对硅和氧化硅的选择比为1:1,并且刻蚀硅表面约1000埃以上,同时使沟槽侧壁内的氧化硅突出硅表面,最后利用金属形成肖特基接触。本发明旨在解决沟槽肖特基二极管产品漏电大的问题,且能提高产品面内均匀性,降低生产成本,提高产品良率,使其适合规模化量产。
Description
技术领域
本发明涉及半导体集成电路制造工艺,尤其涉及一种沟槽型肖特基二极管的制备工艺方法。
背景技术
肖特基二极管已被业界所熟知,并通过多种不同的版图设计与工艺制造。Baliga的第5,612,567号美国专利中典型示出的沟槽型版图也已被人们所知,沟槽型肖特基二极管由于追求正向导通电流能力的最大化,其台面面积被充分利用于肖特基的势垒接触,这就要求接触孔在刻蚀的时候把元胞区充分打开。目前常用的制备方法是采用干法刻蚀接触孔,然后直接沉积金属形成肖特基接触,但是实际工艺过程中会造成工艺窗口小,反向漏电流大,产品良率低等问题。
发明内容
本发明解决的技术问题是提供一种沟槽型肖特基二极管的制备工艺方法,其改善了传统沟槽型肖特基二极管的制造工艺方法,降低反向漏电流,提高产品良率,使其适合规模化量产。
为解决上述技术问题,本发明提供一种沟槽型肖特基二极管的制备工艺方法,主要包括如下步骤:
步骤1:参照标准沟槽型肖特基二极管制备工艺,在硅片上形成沟槽并用多晶硅进行填充,然后利用干法刻蚀将沟槽外的多晶硅进行回刻;
步骤2:沉积一层层间介质膜,开始形成接触孔;
步骤3:利用干法刻蚀工艺,将接触孔先刻蚀至硅表面,然后将硅和沟槽内的氧化硅一同刻蚀;
步骤4:刻蚀硅使沟槽内的氧化硅突出硅平面;
步骤5:然后沉积一层金属,从而形成肖特基接触;
步骤6:最后沉积金属铝并通过光刻,刻蚀工艺形成金属连接。
作为优选的技术方案,步骤2中,所述层间介质膜为氧化硅。
作为优选的技术方案,步骤3中,接触孔刻蚀分为两步,第一步利用氧化硅对硅刻蚀选择比高的刻蚀菜单将层间介质膜刻蚀,停在硅表面;第二步切换另一个刻蚀菜单,利用硅和氧化硅刻蚀选择比1:1的菜单进行刻蚀,将硅和沟槽内的氧化硅一同刻蚀,刻蚀深度大于1000埃。
作为优选的技术方案,步骤4中,利用硅对氧化硅高选择比的刻蚀菜单仅刻蚀硅,使沟槽内的氧化硅突出硅平面,突出高度在500埃以上。
作为优选的技术方案,步骤5中,所述沉积金属是钛,氮化钛或者两者的复合金属,所述金属的厚度为100-2000埃。
和现有技术相比,本发明具有以下有益效果:采用本发明方法制造的沟槽型肖特基二极管与采用传统工艺制造的沟槽型肖特基二极管相比,明显具有更低的反向漏电,及更好的面内均匀性。可见,本发明方法能解决沟槽型肖特基二极管产品漏电大的问题,降低反向漏电,提高产品面内均匀性,降低生产成本,提高产品良率,使其适合规模化量产。
附图说明
图1是本发明方法步骤1完成后的器件断面图;
图2是本发明方法步骤2完成后的器件断面图;
图3是本发明方法步骤3完成后的器件断面图;
图4是本发明方法步骤4完成后的器件断面图;
图5是本发明方法步骤5完成后的器件断面图;
图6是本发明方法步骤6完成后的器件断面图。
图中附图标记说明如下:
1为硅衬底,2为外延层,3为沟槽,4为沟槽内的氧化硅,5为沟槽内的多晶硅,6为金属,7为金属铝,8为层间介质膜。
具体实施方式
下面结合附图和实施例对本发明作进一步详细的说明。
如图1-图6所示,本发明沟槽型肖特基二极管的制备工艺方法,包括如下步骤:
1.如图1所示:参照标准沟槽型肖特基二极管制备工艺,在硅衬底1生长外延层2(该外延层2和硅衬底1有相同的掺杂类型),在外延层2上刻蚀形成沟槽3,在沟槽3内淀积一层氧化硅4,然后用多晶硅对沟槽3进行填充,然后利用干法刻蚀将沟槽3外的多晶硅进行回刻,保留沟槽内的多晶硅5。
2.如图2所示:利用CVD(化学气相沉积)工艺在硅表面沉积一层氧化物作为层间介质膜8,层间介质膜8通常为氧化硅等材质,开始形成接触孔。
3.如图3所示:利用干法刻蚀工艺,首先利用氧化硅对硅刻蚀选择比高的菜单刻蚀层间介质膜8,将接触孔先刻蚀至硅表面(利用氧化硅对硅刻蚀选择比高的菜单意味着氧化硅的刻蚀速率比硅快,是为了保证将硅上的氧化硅刻蚀完全,并减少硅的损失);然后改变刻蚀菜单,利用硅和氧化硅刻蚀选择比1:1的菜单进行刻蚀,将硅和沟槽内的氧化硅4一同刻蚀,刻蚀深度大于1000埃。
4.如图4所示:采用干法刻蚀工艺,利用硅对氧化硅的高选择比的刻蚀菜单仅刻蚀硅(采用硅对氧化硅的高选择比意味着硅的刻蚀速率比氧化硅快,为了使沟槽侧壁上形成的氧化层在刻蚀硅时没有损失,可以形成该氧化层凸出的结构),使沟槽内的氧化硅4突出硅平面,突出高度大约在500埃以上。
5.如图5所示:在硅表面沉积一层金属6,如钛,氮化钛或者两者的复合金属,金属6的厚度为100-2000埃,从而形成肖特基接触。
6.如图6所示:最后在金属6上沉积一层金属铝7并通过光刻,刻蚀等工艺形成金属连接。
采用本发明方法制造的沟槽型肖特基二极管与采用传统工艺制造的沟槽型肖特基二极管相比,明显具有更低的反向漏电,及更好的面内均匀性。本发明方法改善了器件有缘区边缘的形貌,有助于边缘形成更好的肖特基结,从而改善反向漏电。可见,本发明方法能解决沟槽型肖特基二极管产品漏电大的问题,并能提高产品面内均匀性,降低生产成本,使其适合规模化量产。
Claims (3)
1.一种沟槽型肖特基二极管的制备工艺方法,其特征在于,主要包括如下步骤:
步骤1:参照标准沟槽型肖特基二极管制备工艺,在硅片上形成沟槽并用多晶硅进行填充,然后利用干法刻蚀将沟槽外的多晶硅进行回刻;
步骤2:沉积一层层间介质膜,所述层间介质膜为氧化硅;
步骤3:利用干法刻蚀工艺刻蚀接触孔;接触孔刻蚀分为两步,第一步利用氧化硅对硅刻蚀选择比高的刻蚀菜单将层间介质膜刻蚀,停在硅表面;第二步切换另一个刻蚀菜单,利用硅和氧化硅刻蚀选择比1:1的菜单进行刻蚀,将硅和沟槽内的氧化硅一同刻蚀,刻蚀深度大于1000埃;
步骤4:刻蚀硅使沟槽内的氧化硅突出硅平面;
步骤5:然后沉积一层金属,从而形成肖特基接触;
步骤6:最后沉积金属铝并通过光刻,刻蚀工艺形成金属连接。
2.根据权利要求1所述沟槽型肖特基二极管的制备工艺方法,其特征在于:步骤4中,利用硅对氧化硅高选择比的刻蚀菜单仅刻蚀硅,使沟槽内的氧化硅突出硅平面,突出高度在500埃以上。
3.根据权利要求1所述沟槽型肖特基二极管的制备工艺方法,其特征在于:步骤5中,所述沉积金属是钛,氮化钛或者两者的复合金属,所述金属的厚度为100-2000埃。
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