CN104600077A - 用于液晶显示装置的阵列基板及其制造方法 - Google Patents

用于液晶显示装置的阵列基板及其制造方法 Download PDF

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CN104600077A
CN104600077A CN201410578380.7A CN201410578380A CN104600077A CN 104600077 A CN104600077 A CN 104600077A CN 201410578380 A CN201410578380 A CN 201410578380A CN 104600077 A CN104600077 A CN 104600077A
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drain
source electrode
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白正善
方政镐
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LG Display Co Ltd
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Abstract

本发明涉及用于液晶显示装置的阵列基板及其制造方法。用于液晶显示装置的阵列基板包括：基板；在基板上的半导体层；在半导体层上的栅电极；在半导体层上并且接触半导体层的源电极和漏电极；以及在栅电极上的氧化物层，氧化物层包括复数个金属原子，其中源电极和漏电极中的每个电极包括基本由所述复数个金属原子制成的金属图案。

Description

用于液晶显示装置的阵列基板及其制造方法
本申请要求于2013年10月31日提交的韩国专利申请第10-2013-0131396号的权益，通过引用将其如在本文中完全阐述那样并入本文用于所有目的。
技术领域
本公开涉及一种用于液晶显示装置(LCD)的阵列基板，并且更具体地，涉及一种用于包括共面型薄膜晶体管(TFT)的LCD的阵列基板，以及制造上述阵列基板的方法。
背景技术
随着信息社会的发展，对于各种形式的显示装置的需求增加。最近，各种平板显示装置，例如液晶显示装置(LCD)、等离子体显示面板(PDP)和有机发光二极管显示器(OLED)已经投入使用。
在这些平板显示装置中，LCD具有归因于低驱动电压的低功耗和便携性的优点，因此广泛用在各种领域中，例如笔记本电脑、监视器、航天器和飞行器。
特别地，通常使用有源矩阵LCD装置，其中，在以矩阵形式布置的各个像素中形成有作为开关元件的薄膜晶体管(TFT)。
根据栅电极的位置，TFT分为各种类型，例如，交错型、逆交错型和共面型。
共面型TFT具有优异的元件性能，原因是共面型TFT的有源层在蚀刻源电极和漏电极时未被损坏。
共面型TFT具有栅电极、源电极和漏电极位于有源层之上的结构。
图1是示出了根据相关技术的共面型TFT的横截面图。
参照图1，在基板10上形成有缓冲层11。在缓冲层11上形成有有源层24，并且有源层24包括沟道区24a、以及在所述沟道区24a的两侧处的源极区24b和漏极区24c，并且在有源层24上形成有第一绝缘层15a。
在第一绝缘层15a上形成有栅电极21，并且在栅电极21上形成有第二绝缘层15b，并且第二绝缘层15b包括使源极区24b和漏极区24c露出的接触孔。在第二绝缘层15b上形成有源电极22和漏电极23，并且源电极22和漏电极23分别接触源极区24b和漏极区24c。
如上所述的有源层24、栅电极21、以及源电极22和漏电极23形成了共面型TFT。
在源电极22和漏电极23上形成有第三绝缘层15c，并且第三绝缘层15c包括使漏电极23露出的接触孔。在第三绝缘层15c上形成有像素电极18，并且像素电极18接触漏电极23。
有源层24由ZnO基半导体材料制成，因此具有高迁移率并且满足恒流测试条件，因此可应用于大尺寸显示器。
ZnO根据氧的含量可以是具有导体性质、半导体性质或非导体性质的材料。因此，使用ZnO的有源层可应用于大尺寸显示器，例如LCD或OLED。
然而，形成第二绝缘层15b以防止ZnO基材料的有源层24露出，因此增加了若干掩模工艺。
因此，生产工艺的步骤增加，因此，生产成本增加并且生产率降低。
发明内容
因此，本发明涉及一种用于液晶显示装置(LCD)的阵列基板及其制造方法，其基本消除了由于相关技术的限制和缺点而引起的一个或更多个问题。
本发明的优点是提供了一种用于液晶显示装置(LCD)的阵列基板及其制造方法，该方法可以减少生产工艺的步骤并提高生产率。
本发明的附加特征和优点将在随后的说明中阐述，并且根据该说明将在一定程度上变得明显，或者可以通过实践本发明而获知。将通过书面的说明和权利要求以及附图中具体指出的结构来实现和获得本发明的这些优点和其他优点。
如在本文中所实施和所概括说明的，为实现这些优点和其他优点并且根据本发明的目的，用于液晶显示装置的阵列基板可以包括：基板；在基板上的半导体层；在半导体层上的栅电极；在半导体层上并且与半导体层接触的源电极和漏电极；以及在栅电极上的氧化物层，该氧化物层包括复数个金属原子，其中，源电极和漏电极中的每一个包括基本由所述复数个金属原子形成的金属图案。
在另一方面中，制造用于液晶显示装置的阵列基板的方法可以包括：在基板上形成半导体层；在半导体层上形成栅电极；在栅电极上依次形成第一金属层和第二金属层；对第一金属层和第二金属层进行图案化以分别形成第一金属图案和第二金属图案；蚀刻第二金属图案以使第一金属图案的一部分露出并且形成第一源极图案和第一漏极图案；以及氧化第一金属图案的被露出的部分以形成氧化物层、第二源极图案和第二漏极图案，其中，第一源极图案和第二源极图案形成源电极，并且第一漏极图案和第二漏极图案形成漏电极。
附图说明
包括在本申请中以提供对本发明的进一步理解并且并入和构成本说明书的一部分的附图示出了本发明的实施方案并且和说明一起用于解释本发明的原理。在附图中：
图1是示出了根据相关技术的共面型TFT的横截面图；
图2是示出了根据本发明一个实施方案的用于LCD的阵列基板的横截面图；
图3A至图3H是示出了根据本发明一个实施方案的用于制造LCD的阵列基板的方法的横截面图。
具体实施方式
现在将具体参照示例性实施方案，其实施例在附图中示出。在整个附图中可以使用相同的附图标记指代相同或相似的部分。
本发明的薄膜晶体管(TFT)可以是多晶型TFT、非晶型TFT或氧化物型TFT。出于说明的目的，在下面的实施方案中通过示例的方式描述氧化物TFT。
图2是示出了根据本发明一个实施方案的用于液晶显示装置(LCD)的阵列基板的横截面图。
参照图2，在用于LCD的阵列基板中，在基板110上形成有缓冲层111。或者，可以省略缓冲层111。
在缓冲层111上形成有作为半导体层的有源层124，并且有源层124包括沟道区124a和在两侧处的源极区124b和漏极区124c，并且在沟道区124a上形成有第一绝缘层115a，且第一绝缘层115a覆盖沟道区124a的一部分。
在第一绝缘层115a上形成有栅电极121。氧化物层126覆盖栅电极121，基本上对应于沟道区124a。
第二源极图案122b和第二漏极图案123b分别覆盖并接触源极区124b和漏极区124c。第一源极图案122a和第一漏极图案123a分别形成在第二源极图案122b和第二漏极图案123b上，并且分别具有与第二源极图案122b和第二漏极图案123b基本上相同的图案。第一源极图案122a和第二源极图案122b形成源电极122，并且第一漏极图案123a和第二漏极图案123b形成漏电极123。
如上所述的有源层124、栅电极121、源电极122和漏电极123形成了共面型TFT。
在具有源电极122和漏电极123的整个第二基板110上形成有第二绝缘层115b，并且第二绝缘层115b包括使漏电极123的一部分露出的接触孔。在第二绝缘层115b上形成有像素电极118，并且像素电极118经由第二绝缘层115b的接触孔接触漏电极123。
有源层124由ZnO基半导体材料(例如，IGZO)形成。ZnO根据氧的含量可以是具有导体性质、半导体性质或非导体性质的材料。因此，使用ZnO的有源层124可应用于大尺寸显示装置例如LCD或OLED。
在本实施方案中，通过调节溅射工艺期间反应气体中的氧浓度，可以调节有源层124中载流子的浓度，因此可以调节TFT的性质。
因为有源层124由ZnO基半导体材料制成，所以有源层124具有高迁移率并且满足恒流测试条件，因此可应用于大尺寸显示装置。
有源层124被源电极122、漏电极123和氧化物层126覆盖。
氧化物层126通过氧化用于形成第二源极图案122b和第二漏极图案123b并且位于与沟道区124a对应的区域处的材料来形成。因此，氧化物层126覆盖沟道区124a，并且源电极122和漏电极123分别覆盖源极区124b和漏极区124c。因此，去除了相关技术的第二绝缘层(图1的15b)。因而，可以减少若干掩模工艺，并且可以降低生产成本并可以提高生产率。
氧化物层126接触两侧处的第二源极图案122b和第二漏极图案123b。
氧化物层126可以延伸成使得氧化物层126覆盖源极区124b和漏极区124c的一部分。
图3A至图3H是示出了根据本发明的实施方案的用于制造LCD的阵列基板的方法的横截面图。
参照图3A，在缓冲层111上沉积ZnO基半导体材料以形成有源层124，然后在有源层124上依次形成第一绝缘层115a和栅电极121。
更具体地，在第一掩模工艺中对ZnO基半导体材料进行图案化以形成有源层124。
例如，可以在溅射法中使用Ga2O3、In2O3和ZnO的复合靶形成ZnO基半导体材料，以及可替代地，用CVD(化学气相沉积)法或ALD(原子层沉积)法形成ZnO基半导体材料。
第一绝缘层115a可以由无机绝缘材料例如SiNx或SiO2或者高介电常数氧化材料例如氧化铪或氧化铝形成。
第一绝缘材料115a可以用CVD法或PECVD(等离子体增强CVD)法形成。
栅电极121可以由具有低电阻且不透明的导电材料(例如，Al、Al合金、W、Cu、Ni、Cr、Mo、Ti、Pt或Ta)或透明导电材料(例如，ITO或IZO)形成。可替代地，栅电极121可以具有使用以上材料中至少两种材料的多层结构。
在整个基板110上沉积第一栅极绝缘材料和栅电极材料，并且在第二掩模工艺中对第一栅极绝缘材料和栅电极材料进行图案化以形成第一绝缘层115a和栅电极121。
可以使用干法蚀刻工艺来形成第一绝缘层115a和栅电极121。
接着，参照图3B，在具有栅电极121的基板110上依次形成第一金属层113和第二金属层114。
第一金属层113可以由与导体具有低接触电阻的金属形成以满足高迁移率和恒流测试条件，所述金属为例如，Al、Al合金、Cu、Ni、Cr、Ti、Pt、Ta、Ti合金、Mo或Mo合金。例如，与第二金属层114相比，第一金属层113可以具有更小的相对于源极区124b和漏极区124c的接触电阻。
因为第二金属层114可以不与源极区124b和漏极区124c直接接触，所以可以不考虑第二金属层114的接触电阻。因此，第二金属层114可以由与第一金属层113相比比电阻更小的金属，例如，Cu、Au或Mo形成。
第一金属层113可以具有约200埃或更小的厚度以满足高迁移率和恒流测试条件，并且优选地具有约100埃至约200埃。
在具有第一金属层113和第二金属层114的整个基板110上形成光致抗蚀剂层128。
接着，参照图3C，在第三掩模工艺中，执行使光致抗蚀剂层128的选择性曝光。
可以利用单光掩模(single photo mask)或半色调掩模(halftonemask)130来执行曝光。在本实施方案中，优选使用半色调掩模130以减少若干掩模工艺。
半色调掩模130包括透射部I、半透射部II和阻挡部III。
参照图3D，在利用半色调掩模130的曝光之后，执行光致抗蚀剂层128的显影工艺。因此，去除光致抗蚀剂层128的与透射部I对应的部分，部分去除光致抗蚀剂层128的与半透射部II对应的部分以成为第一光致抗蚀剂图案128a，并且保留光致抗蚀剂层128的与阻挡部III对应的部分而成为比第一光致抗蚀剂图案128a厚的第二光致抗蚀剂图案128b。第二光致抗蚀剂图案128b被定位在第一光致抗蚀剂图案128a的两侧中的每一侧处。换言之，第二光致抗蚀剂图案128b被定位成与源极区124b和漏极区124c对应。
利用第一光致抗蚀剂图案128a和第二光致抗蚀剂图案128b来对第一金属层113和第二金属层114进行图案化。
换言之，参照图3E，利用第一光致抗蚀剂图案128a和第二光致抗蚀剂图案128b蚀刻第一金属层113和第二金属层114以形成第一金属图案113a和第二金属图案114a。该蚀刻工艺可以是湿法蚀刻工艺。第一金属图案113a和第二金属图案114a连续地形成在有源层124之上。
接着，执行灰化工艺以去除第一光致抗蚀剂图案128a并且根据第一光致抗蚀剂图案128a的厚度部分地去除第二光致抗蚀剂图案128b。与源极区124b和漏极区124c对应的经灰化的第二光致抗蚀剂图案128b成为第三光致抗蚀剂图案128c和第四光致抗蚀剂图案128d。
接着，参照图3F，利用第三光致抗蚀剂图案128c和第四光致抗蚀剂图案128d蚀刻第二金属图案114a。该蚀刻工艺可以是干法蚀刻工艺。因此，形成了彼此间隔开的第一源极图案122a和第一漏极图案123a。
接着，氧化第一金属图案113a的在第三光致抗蚀剂图案128c和第四光致抗蚀剂图案128d之间露出的部分。例如，在氧气氛下进行氧等离子体处理或热处理预定的时间以氧化第一金属图案113a的露出部分。因此，第一金属图案113a的露出部分成为氧化物层126。
氧化物层126可以由铝氧化物、铝合金氧化物、铜氧化物、镍氧化物、铬氧化物、钛氧化物、铂氧化物、钽氧化物、钛合金氧化物、钼氧化物和钼合金氧化物中的至少之一制成。
氧化物层126是非导体并且用作绝缘体。因此，将第一金属图案113a改变为第二源极图案122b、第二漏极图案123b以及第二源极图案122b与第二漏极图案123b之间的氧化物层126。
在形成氧化物层126之后，使用灰化工艺来剥离第三光致抗蚀剂图案128c和第四光致抗蚀剂图案128d。
因此，形成了包括第一源极图案122a和第二源极图案122b的源电极122以及包括第一漏极图案123a和第二漏极图案123b的漏电极123。
接着，参照图3G，在具有源电极122和漏电极123的整个基板110上形成第二绝缘层115b。接着，在第四掩模工艺中对第二绝缘层115b进行图案化以形成使漏电极123的一部分露出的接触孔。
接着，参照图3H，在整个第二绝缘层115b上形成第三导电层，并且在第五掩模工艺中对第三导电层进行图案化以形成穿过第二绝缘层115b的接触孔接触漏电极123的像素电极118。
通过上述工艺，制造了根据实施方案的LCD的阵列基板。
在阵列基板中，有源层124由ZnO基材料制成，因而TFT具有高迁移率并且满足恒流测试条件。LCD可应用于大尺寸显示装置。
此外，在制造工艺期间，第一金属图案113a用于形成源电极122和漏电极123并且覆盖有源层124，并且第一金属图案113a的与沟道区124a对应的部分被氧化并且覆盖沟道区124a。因此，去除了根据相关技术的第二绝缘层(图1的15b)，因而可以减少若干掩模工艺，由此降低了生产成本并且提高了生产率。
对于本领域技术人员将明显的是，在不脱离本发明的精神或范围的情况下可以对本发明作出各种修改和改变。因此，意指的是，假如本发明的修改和变化落入所附权利要求及其等同物内容的范围内的，则本发明涵盖上述本发明的修改和变化。

Claims (19)

1.一种用于液晶显示装置的阵列基板，包括：
基板；
在所述基板上的半导体层；
在所述半导体层上的栅电极；
在所述半导体层上并且接触所述半导体层的源电极和漏电极；以及
在所述栅电极上的氧化物层，所述氧化物层包括复数个金属原子，
其中，所述源电极和所述漏电极中的每一个包括基本由所述复数个金属原子制成的金属图案。
2.根据权利要求1所述的阵列基板，其中，所述源电极包括第一源极图案和在所述第一源极图案之下的第二源极图案，以及所述漏电极包括第一漏极图案和在所述第一漏极图案之下的第二漏极图案，并且
其中，所述氧化物层位于与所述第二源极图案和所述第二漏极图案相同的层上。
3.根据权利要求2所述的阵列基板，其中，所述第一源极图案和所述第一漏极图案具有比所述第二源极图案和所述第二漏极图案小的比电阻，并且具有比所述第二源极图案和所述第二漏极图案大的与导体的接触电阻。
4.根据权利要求2所述的阵列基板，其中，所述第一源极图案和所述第一漏极图案由Cu、Au和Mo中之一制成，以及所述第二源极图案和所述第二漏极图案由Al、Al合金、Cu、Ni、Cr、Ti、Pt、Ta、Ti合金、Mo和Mo合金中之一制成。
5.根据权利要求1所述的阵列基板，其中，所述氧化物层由铝氧化物、铝合金氧化物、铜氧化物、镍氧化物、铬氧化物、钛氧化物、铂氧化物、钽氧化物、钛合金氧化物、钼氧化物和钼合金氧化物中之一制成。
6.根据权利要求1所述的阵列基板，其中，所述半导体层包括沟道区、以及在所述沟道区的两侧处的源极区和漏极区，以及在所述沟道区上有第一绝缘层。
7.根据权利要求6所述的阵列基板，其中，所述栅电极在所述第一绝缘层上。
8.根据权利要求1所述的阵列基板，还包括：
第二绝缘层，所述第二绝缘层在所述源电极和所述漏电极上并且包括使所述漏电极露出的接触孔；和
像素电极，所述像素电极在所述第二绝缘层上并且穿过所述接触孔接触所述漏电极。
9.一种制造用于液晶显示装置的阵列基板的方法，包括：
在基板上形成半导体层；
在所述半导体层上形成栅电极；
在所述栅电极上依次形成第一金属层和第二金属层；
对所述第一金属层和所述第二金属层进行图案化以分别形成第一金属图案和第二金属图案；
蚀刻所述第二金属图案以使所述第一金属图案的一部分露出并且形成第一源极图案和第一漏极图案；以及
氧化所述第一金属图案的露出部分以形成氧化物层、第二源极图案和第二漏极图案，
其中，所述第一源极图案和所述第二源极图案形成源电极，并且所述第一漏极图案和所述第二漏极图案形成漏电极。
10.根据权利要求9所述的方法，其中，形成所述第一金属图案和所述第二金属图案包括：
在所述第二金属层上形成第一光致抗蚀剂图案和第二光致抗蚀剂图案；以及
利用所述第一光致抗蚀剂图案和所述第二光致抗蚀剂图案对所述第一金属层和所述第二金属层进行图案化以形成所述第一金属图案和所述第二金属图案。
11.根据权利要求10所述的方法，其中，利用半色调掩模来形成所述第一光致抗蚀剂图案和所述第二光致抗蚀剂图案。
12.根据权利要求10所述的方法，其中，形成所述第二源极图案和所述第二漏极图案包括：
通过灰化工艺去除所述第一光致抗蚀剂图案并且部分地去除所述第二光致抗蚀剂图案，由此形成第三光致抗蚀剂图案和第四光致抗蚀剂图案；以及
利用所述第三光致抗蚀剂图案和所述第四光致抗蚀剂图案来蚀刻所述第二金属图案以使所述第一金属图案的所述部分露出并且形成所述第二源极图案和所述第二漏极图案。
13.根据权利要求9所述的方法，其中，所述第二金属层具有比所述第一金属层小的比电阻，并且具有比所述第一金属层大的与导体的接触电阻。
14.根据权利要求9所述的方法，其中，所述第一金属层由Al、Al合金、Cu、Ni、Cr、Ti、Pt、Ta、Ti合金、Mo和Mo合金中之一制成，以及所述第二金属层由Cu、Au和Mo中之一制成。
15.根据权利要求9所述的方法，其中，所述氧化所述第一金属图案的露出部分以形成氧化物层实施为对所述第一金属图案的露出部分，在氧气氛下进行氧等离子体处理或热处理。
16.根据权利要求9所述的方法，其中，所述半导体层包括沟道区、以及在所述沟道区的两侧处的源极区和漏极区。
17.根据权利要求16所述的方法，还包括在所述沟道区上形成第一绝缘层。
18.根据权利要求17所述的方法，其中，所述栅电极在所述第一绝缘层上。
19.根据权利要求9所述的方法，还包括：
在所述源电极和所述漏电极上形成第二绝缘层；
在所述第二绝缘层中形成接触孔，所述接触孔使所述漏电极露出；以及
形成像素电极，所述像素电极在所述第二绝缘层上并且穿过所述接触孔接触所述漏电极。
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