CN104485292A - 基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法 - Google Patents

基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法 Download PDF

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CN104485292A
CN104485292A CN201410758902.1A CN201410758902A CN104485292A CN 104485292 A CN104485292 A CN 104485292A CN 201410758902 A CN201410758902 A CN 201410758902A CN 104485292 A CN104485292 A CN 104485292A
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汪民
王宏杰
刘军
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National Center for Advanced Packaging Co Ltd
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Abstract

本发明提供了一种基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法，首先通过引线键合工艺，在基板上制作堆叠的金属凸块至所需高度，形成互叠凸块；采用丝网印刷工艺，在互叠凸块顶部印刷焊料膏，再进行回流工艺，使焊料膏形成焊帽形状覆盖在互叠凸块的顶部；在基板上贴装芯片并完成与基板的互连；通过塑封工艺完成整个封装体的塑封，再通过植球工艺完成整个封装体底面的植球；最后将封装体进行PoP互连，上、下封装体通过底面焊球和上方凸点对准并回流的方式连接。本发明的优点是：整个方式完全使用传统的封装设备及工艺。凸点间距可根据需要选用不同粗细的金属线并控制凸点尺寸来决定，作业方式相对简单。

Description

基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法
技术领域
本发明涉及一种基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法，属于集成电路芯片封装技术领域。
背景技术
1）    传统 PoP( Package on Package)封装体结构如图1所示，上层封装体的焊球10（Solder Ball）与底层封装体基板1上的焊盘互连。互连焊球10需要确保一定高度，并且回流时候凸点（指焊球10）变形及位置移动等风险（容易造成短路风险），凸点间距难以做小。
2) 互连凸点埋入塑封胶（In Mold）方式封装体结构如图2所示，焊球10与凸出塑封胶的互连锡凸点14互连，可以有效避免回流时焊球10凸点变形及位置移动导致短路，但凸点间距及大小一定程度受塑封厚度影响。
3) 如图3所示，塑封通孔（Through Mold Via）方式实现 PoP上下封装体互叠时凸点互连，焊球10与塑封胶中的互连锡凸点14互连，互连凸点间距限制可以减小，但需要单独的塑封胶钻孔设备，同时钻孔效率也比较低，相对而言实现PoP封装成本较高。
4) 专利CN 102325431 A中，通过电镀方式在基板pad上形成铜柱来克服焊球节距的限制，但电镀铜柱的费用投入很高。
发明内容
本发明的目的是克服现有技术中存在的不足，提供一种基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法，更好的实现 PoP封装互连的凸点小间距。
按照本发明提供的技术方案，所述基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法，包括以下步骤：
（1）通过引线键合工艺，在基板上制作金属凸块（可以采用Au / Ag合金）；
（2）通过引线键合工艺，在金属凸块上堆叠金属凸块至所需高度，形成互叠凸块；
（3）采用丝网印刷工艺，在互叠凸块顶部印刷焊料膏（可以采用锡或金属合金）；
（4）经过丝网印刷后，再进行回流工艺，使焊料膏形成焊帽形状覆盖在互叠凸块的顶部，互叠凸块和焊帽形成基板上的凸点；
（5）在基板上贴装芯片并完成与基板的互连；
（6）通过塑封工艺完成整个封装体的塑封，再通过植球工艺完成整个封装体底面的植球，制作出焊球；
（7）将完成步骤（6）的封装体进行PoP互连，上、下封装体通过底面焊球和上方凸点对准并回流的方式连接。
步骤（5）中，如是倒装芯片，通过倒装贴片后进行回流，并在芯片底面凸点区域进行底填材料填充；如是正贴芯片工艺，需要通过引线键合工艺进行芯片与基板之间的互连。
本发明的优点是：通过引线键合（Wire bond）作业方式在基板上互叠凸块(凸块互叠个数根据需要的互连高度决定)；之后再通过锡膏钢网印刷方式在凸块上印刷焊料膏，并回流形成帽状的锡膏顶部，最后实现PoP上、下封装体互连。整个方式完全使用传统的封装设备及工艺。凸点间距可根据需要选用不同粗细的金属线并控制凸点尺寸来决定，作业方式相对简单。
附图说明
图1是现有技术一结构示意图。
图2是现有技术二结构示意图。
图3是现有技术三结构示意图。
图4是制作好导电图形的初始基板。
图5是通过引线键合工艺在基板上制作金属凸块的示意图。
图6是通过引线键合工艺在基板上堆叠金属凸块的示意图。
图7是印刷焊料膏示意图。
图8是制作焊帽覆盖在互叠凸块顶部构成凸点的示意图。
图9是贴装芯片示意图。
图10是塑封和底面植球得到的封装体结构。
图11是将完成组装的封装体进行PoP互连的示意图。
具体实施方式
下面结合附图和实施例对本发明作进一步说明。
本发明的流程如下：
1）WB Stack Bumps方法基板上制备小间距互连凸点。
（1）图4提供了制作好导电图形2的基板1。图5通过引线键合（Wire Bond）工艺，在基板1上进行Bump（凸块）3制作，材料可以是Au / Ag合金线等金属。
（2）如图6所示，使用引线键合工艺，在Bump 3上进行堆叠，堆叠的数量根据单个Bump高度及需要的总高度来决定，形成互叠的凸块结构。
（3）如图7所示，采用丝网印刷工艺，覆盖上丝网印刷版5，在Bump 3相应的位置印刷焊料膏4，材料可以是锡或其他的金属合金。
（4）经过丝网印刷后，再进行回流工艺，使焊料膏4形成焊帽6形状覆盖在互叠凸块的顶部，如图8。通过以上工艺，整个基板上的凸点制备完成。
2) 贴片、塑封及基板植球作业完成整个封装体（Package）的封装流程。
（1）倒装芯片通过倒装贴片后进行回流，并在芯片7底面凸点（chip凸点）11区域进行底填材料8填充，如图9所示。如果是正贴芯片工艺，需要通过引线键合工艺进行芯片与基板之间的互连。
（2）通过塑封工艺完成整个封装体的塑封。塑封胶9可以是树脂等绝缘材料。通过封装体底面植球工艺，完成整个封装体底面的焊球10制作，最终得到的封装体结构如10所示。
3）将完成组装的封装体进行PoP互连。
上、下封装体通过小间距互连凸点对准并回流等方式连接形成如图11所示的PoP封装体。图11中的上层封装体为正贴芯片，包括：基板1、芯片7、塑封胶9，芯片7通过贴片胶12贴装在基板1上并通过金线13与基板1上的焊盘互连，然后由塑封胶9进行封装。类似的实现小间距凸点方法可推广到上层封装体，从而可实现多层封装体互连。
由于采用引线键合互叠金属凸点，通过焊线粗细及凸点大小控制，并结合互叠凸点数目来有效控制凸点高度，本方法可以制作小间距互连凸点，且凸点间距不受Mold厚度影响，PoP上、下封装体回流互连时，不会造成凸点变形及位置移动产生Short。

Claims (4)

1.基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法，其特征是，包括以下步骤：
（1）通过引线键合工艺，在基板（1）上制作金属凸块（3）；
（2）通过引线键合工艺，在金属凸块（3）上堆叠金属凸块（3）至所需高度，形成互叠凸块；
（3）采用丝网印刷工艺，在互叠凸块顶部印刷焊料膏（4）；
（4）经过丝网印刷后，再进行回流工艺，使焊料膏（4）形成焊帽（6）形状覆盖在互叠凸块的顶部，互叠凸块和焊帽（6）形成基板（1）上的凸点；
（5）在基板（1）上贴装芯片（7）并完成与基板（1）的互连；
（6）通过塑封工艺完成整个封装体的塑封，再通过植球工艺完成整个封装体底面的植球，制作出焊球（10）；
（7）将完成步骤（6）的封装体进行PoP互连，上、下封装体通过底面焊球（10）和上方凸点对准并回流的方式连接。
2.如权利要求1所述基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法，其特征是，步骤（5）中，如是倒装芯片，通过倒装贴片后进行回流，并在芯片（7）底面凸点区域进行底填材料（8）填充；如是正贴芯片工艺，需要通过引线键合工艺进行芯片（7）与基板（1）之间的互连。
3.如权利要求1所述基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法，其特征是，所述金属凸块（3）采用Au / Ag合金。
4.如权利要求1所述基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法，所述焊料膏（4）材料是锡或金属合金。
CN201410758902.1A 2014-12-10 2014-12-10 基板上通过引线键合互叠凸块实现小间距凸点及PoP互叠的方法 Pending CN104485292A (zh)

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