CN104425254A - 一种igbt的制造方法 - Google Patents

一种igbt的制造方法 Download PDF

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CN104425254A
CN104425254A CN201310390475.1A CN201310390475A CN104425254A CN 104425254 A CN104425254 A CN 104425254A CN 201310390475 A CN201310390475 A CN 201310390475A CN 104425254 A CN104425254 A CN 104425254A
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semiconductor wafer
igbt
conductive layer
manufacture method
conduction type
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黄璇
王万礼
王根毅
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Wuxi CSMC Semiconductor Co Ltd
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Wuxi CSMC Semiconductor Co Ltd
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Priority to PCT/CN2014/085356 priority patent/WO2015027928A1/zh
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Abstract

本发明提供一种IGBT的制造方法,其包括:提供具有第一表面和第二表面的第一导电类型的半导体晶片,在所述半导体晶片的第一表面上进行杂质注入以形成第一导电类型或第二导电类型的导电层;在所述导电层内间隔的形成延伸入所述导电层内的第二导电类型或第一导电类型的通道;在所述通道上形成氧化层;在所述氧化层上键合衬底半导体晶片;减薄所述半导体晶片,并将减薄后的半导体晶片作为漂移区;基于所述漂移区形成所述IGBT的正面结构;去除所述衬底半导体晶片;去除所述氧化层;在所述通道和导电层上形成背面金属电极。该方法对薄片流通能力没有特殊要求,更不需要双面曝光机设备,与现有的常规工艺兼容,工艺简单、效率高。

Description

一种IGBT的制造方法
【技术领域】
本发明涉及半导体设计及制造技术领域,特别涉及一种IGBT(Insulated GateBipolar Transistor,绝缘栅双极晶体管)的制造方法。
【背景技术】
IGBT是由BJT(Bipolar Junction Transistor,双极结型晶体管)和MOSFET(Metal-Oxide-Semiconductor-Field-Effect-Transistor,金属氧化物半导体场效应晶体管)组成的复合全控型电压驱动式功率半导体器件,兼有MOSFET的高输入阻抗和BJT的低导通压降两方面的优点,具有工作频率高,控制电路简单,电流密度高,通态压低等特点,广泛应用于功率控制领域。在实际应用中,IGBT很少作为一个独立器件使用,尤其在感性负载的条件下,IGBT需要一个快恢复二极管续流。因此,现有的绝缘栅双极晶体管产品,一般采用并联一个续流二极管(Freewheeling diode,简称FWD)以保护IGBT。为了降低成本,并联的续流二极管可以集成在IGBT芯片内,即具有内置二极管或反向导通的IGBT。
常见的反向导通的IGBT需要减薄后双面光刻制备出背面P+集电极区的注入窗口。这种方案的缺点主要有两个方面:第一、需要有减薄晶圆流通能力,特别是对于常见的1200V以下的IGBT,其厚度在200um以下,对薄片流通工艺要求很高;第二、需要专门的双面曝光机对晶圆曝光。此外,现有的反向导通的IGBT通常采用背面两次光刻技术。
因此,有必要提供一种改进的技术方案来克服上述问题。
【发明内容】
本发明的目的在于提供一种IGBT的制造方法,其与现有的常规工艺兼容,工艺简单、效率高、无需专用的设备大大降低工艺成本。
为了解决上述问题,根据本发明的一个方面,本发明提供一种IGBT的制造方法,其包括:提供具有第一表面和第二表面的第一导电类型的半导体晶片,在所述半导体晶片的第一表面上进行杂质注入以形成第一导电类型或第二导电类型的导电层;在所述导电层内间隔的形成延伸入所述导电层内的第二导电类型或第一导电类型的通道,其中所述通道的导电类型与所述导电层的导电类型不同,此时所述通道和所述导电层间隔交错排布;在所述通道上形成氧化层;在所述氧化层上键合衬底半导体晶片;自所述半导体晶片的第二表面减薄所述半导体晶片,并将减薄后的第一导电类型的半导体晶片作为漂移区;基于所述漂移区形成所述IGBT的正面结构;去除所述衬底半导体晶片;去除所述氧化层;在所述通道和导电层上形成背面金属电极,该背面金属电极与所述通道和导电层电性接触。
作为本发明的一个优选的实施例,提供的所述半导体晶片的厚度为200-700um,电阻率为5~500Ω*cm。
作为本发明的一个优选的实施例,在所述半导体晶片的第一表面上注入导电层的注入剂量为1E13~1E20cm-2,能量为30~200KEV。
作为本发明的一个优选的实施例,通过光刻、离子注入、高温推阱、激活工艺在所述导电层内间隔的形成所述通道,所述离子注入的注入剂量为1E13~1E20cm-2,能量为30~200KEV。
作为本发明的一个优选的实施例,通过热氧化或CVD方式在所述导电层及通道上形成氧化层,所述氧化层的厚度为0.01-5um。
作为本发明的一个优选的实施例,在所述氧化层上键合的所述衬底半导体晶片的厚度为50-650um。
作为本发明的一个优选的实施例,在基于所述漂移区形成所述IGBT的正面结构前,所述制造方法还包括:
通过CMP或湿法腐蚀方式平坦对所述减薄的所述半导体晶片的第二表面。
作为本发明的一个优选的实施例,所述衬底半导体晶片的厚度和所述键合形成的漂移区的厚度的和为正常流通半导体晶片厚度。
作为本发明的一个优选的实施例,所述IGBT的正面结构包括:在所述漂移区的上表面上有选择的形成的第一导电类型的基区;在所述基区内有选择的形成的第二导电类型的发射极区;位于所述漂移区的上表面上的栅氧化层;在所述栅极氧化层的上表面上形成的多晶硅栅极;覆盖所述栅极氧化层和多晶硅栅极的介质层;与所述基区和所述发射极区电性接触的正面金属电极。
作为本发明的一个优选的实施例,所述IGBT的正面结构包括:形成于正面金属电极外侧的钝化层。
与现有技术相比,本发明中IGBT的制造方法,首先完成IGBT的背面的相互间隔的集电极区和通道的制作,之后在半导体晶片第二表面上制备IGBT的正面结构,在正面结构完成后仅需要做减薄和背面金属化步骤,对薄片流通能力没有特殊要求,更不需要双面曝光机设备。
【附图说明】
为了更清楚地说明本发明实施例的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其它的附图。其中:
图1为本发明中的IGBT的制造方法在一个实施例中的流程图;
图2至图11为图1中的制造方法的各个制造工序得到晶圆的纵剖面示意图。
【具体实施方式】
为使本发明的上述目的、特征和优点能够更加明显易懂,下面结合附图和具体实施方式对本发明作进一步详细的说明。
此处所称的“一个实施例”或“实施例”是指可包含于本发明至少一个实现方式中的特定特征、结构或特性。在本说明书中不同地方出现的“在一个实施例中”并非均指同一个实施例,也不是单独的或选择性的与其他实施例互相排斥的实施例。
在介绍本发明中的IGBT的制造方法之前,需要说明的是,IGBT的发射极和栅极所在的面通常被理解为正面,而IGBT的集电极所在的面通常被理解反面或背面。半导体晶片种类众多,常用的为硅片,在下面实施例中,将以硅片为例。
图1为本发明中的IGBT的制造方法100在一个实施例中的流程图。如图1所示,所述制造方法100包括如下步骤。
步骤110,结合图2所示,提供具有第一表面11和第二表面12的N型硅片10,在所述硅片的第一表面11上进行杂质注入N型或P型的导电层13。
具体的,所述硅片10的厚度可以为200~700um,电阻率可以为5~500Ω*cm。如图2所示,在所述硅片10的第一表面11上做普注,导电层13的杂质注入剂量为1E13~1E20cm-2,能量为30~200KEV,所述杂质可以为施主杂质,如磷或砷等,也可以为受主杂质,如硼或氢等。
步骤120,结合图3与图4所示,在所述导电层13内间隔的形成延伸入所述导电层13内的P型或N型的通道14。
在所述导电层13为P型时,所述步骤120中形成N型通道,在所述导电层13为N型时,所述步骤120中形成P型通道,两者之间的导电类型相反。在图2-11所示出的实施例中,以导电层13为N型,通道14为P型为例进行介绍。具体的,如图3所示,在所述导电层13上进行光刻得到相互间隔的注入窗口15,如图4所示,通过所述注入窗口15向所述N型导电层13内进行P型杂质离子(比如硼或氢)注入,注入剂量为1E13~1E20cm-2,能量为30~200KEV,随后可以进行高温激活,这样可以得到相互间隔的P型通道14。在现有工艺中的P型通道14的激活通常发生在正面金属电极形成之后,而本发明中的激活步骤都发生在金属电极形成之前,提高了掺杂区域(比如P型通道14)的激活效率。
步骤130,结合图5所示,在所述通道14上形成氧化层15。
具体的,注入完成后,去胶清理导电层13及通道14表面,通过热氧化或CVD方式在所述导电层13及通道14上形成一厚度为0.01-5um的氧化层15,以起到保护导电层13及通道14的作用。
步骤140,结合图6所示,翻转所述硅片10,在所述氧化层15上键合P型或N型的衬底16。所述衬底16的厚度与下文提到的键合漂移区的厚度相关。
具体的,采用直接键合(SDB)方式将所述氧化层15与N型或P型的衬底16键合,衬底16的厚度为50~650um。
步骤150,结合图7所示,自所述硅片10的第二表面12减薄所述硅片10,并将减薄后的所述硅片10,作为N型漂移区(N Drift)17。
具体的,减薄形成的漂移区17的厚度与所述衬底16的厚度相关。所述衬底16的厚度和所述漂移区17的厚度的和为正常流通硅片厚度,比如对于6寸片的正常厚度为625um/675um,8寸片的正常厚度为725um。
在减薄完成后,采用CMP或湿法腐蚀方式使所述硅片10的第二表面12平坦光滑。
步骤160,结合图8所示,基于所述漂移区17采用正常IGBT工艺流程形成所述IGBT的正面结构。
图8中示意出了一种平面IGBT的正面结构。所述IGBT的正面结构包括:在所述漂移区17的上表面上有选择的形成的P型基区(P-body)18,在所述P型基区18内有选择的形成的N型发射极区19,位于所述漂移区17的上表面上的栅氧化层20,在所述栅极氧化层20上形成的多晶硅栅极21(G),覆盖所述栅极氧化层20和多晶硅栅极21的介质层22,以及与所述P型基区18和所述N型发射极区19电性接触的正面金属电极23(即发射极E)。
图8中只是示意性的示出了正面金属电极23,事实上,正面金属电极23可能会覆盖整个介质层22。此外,所述IGBT的正面结构还可能包括形成于正面金属电极23外侧的钝化层(未示出),比如二氧化硅和氮化硅。
在其他实施例中,也可以制造沟槽型IGBT,所述沟槽型IGBT的正面结构与图8中的IGBT的正面结构并不相同,不过现有技术中已经公开了很多沟槽型IGBT,这里就不再重复描述了。需要知晓的是,从本发明的某个角度来说,本发明并不特别关心IGBT的具体正面结构,只要有正面结构并且能形成可以使用的IGBT器件即可。
本发明提出一种图8中的IGBT的正面结构的制造流程的一个示例,该流程包括:
步骤一、生长栅极氧化层,比如厚度为
步骤二、在栅极氧化层上生成多晶硅栅极层,比如厚度为
步骤三、多晶硅栅极光刻、蚀刻、离子注入、推阱以形成P基区,P型杂质注入剂量为1E12~1E15cm-2,注入能量为20KEV~1MEV;推阱温度为1000~1250C,时间为10min~1000min。
步骤四、N型发射区光刻、离子注入、退火以形成N型,剂量1E14~1E16,能量为20KEV~1MEV cm-2;退火温度为800~1000C,时间为10min~1000min;
步骤五、生长介质层,厚度:
步骤六、接触孔光刻、蚀刻以形成接触孔,该接触孔与所述N型发射区和P型基区相通;
步骤七、正面金属层淀积,厚度约为2um~6um;
步骤八、钝化层淀积。
从另一个角度来讲,有关IGBT的正面结构的具体制造工艺也不属于本发明的重点,其可以采用现有的各种制造工艺制造而成,因此为了突出本发明的重点,有关IGBT的正面结构的具体制造工艺在本文中并未被详细描述。
步骤170,结合图9所示,去除所述衬底16。
在一个实施例中,在IGBT的正面结构完成后,通过研磨(Grinding)工艺对所述衬底16进行减薄,在减薄到一定厚度后,用湿法腐蚀进一步去除所述衬底16,直至露出所述氧化层15。
步骤180,结合图10所示,去除所述氧化层15。
在一个实施例中,在所述衬底16完全去除后,继续采用湿法腐蚀将所述氧化层15全部去除。
步骤190,结合图11所示,在所述导电层13及通道14外侧通过采用溅射或蒸发的方式制得背面金属电极(集电极C)24,该背面金属电极24与所述通道14和所述导电层13电性接触。
所属领域内的普通技术人员应该能够理解的是,本发明的特点或目的之一在于:首先完成IGBT的背面的相互间隔的N型集电极区和P型通道的制作,之后在硅片10的第二表面12上制备IGBT的正面结构,在正面结构完成后仅需要做减薄和背面金属化步骤,这样对薄片流通能力没有特殊要求,更不需要双面曝光机设备。
上述实施例中的N型可以被称为第一导电类型,P型可以被称为第二导电类型。在其他实施例中,上述实施例中的所涉及的所有P型的区域(比如P基区、P型集电极区)都可以更改为N型的,所有的N型的区域(N型漂移区、N型发射极区、N型阴极区)都可以更改为P型,此时可以认为第一导电类型是P型,第二导电类型为N型。
需要指出的是,熟悉该领域的技术人员对本发明的具体实施方式所做的任何改动均不脱离本发明的权利要求书的范围。相应地,本发明的权利要求的范围也并不仅仅局限于前述具体实施方式。

Claims (10)

1.一种IGBT的制造方法,其特征在于,其包括:
提供具有第一表面和第二表面的第一导电类型的半导体晶片,在所述半导体晶片的第一表面上进行杂质注入以形成第一导电类型或第二导电类型的导电层;
在所述导电层内间隔的形成延伸入所述导电层内的第二导电类型或第一导电类型的通道,其中所述通道的导电类型与所述导电层的导电类型不同,此时所述通道和所述导电层间隔交错排布;
在所述通道上形成氧化层;
在所述氧化层上键合衬底半导体晶片;
自所述半导体晶片的第二表面减薄所述半导体晶片,并将减薄后的第一导电类型的半导体晶片作为漂移区;
基于所述漂移区形成所述IGBT的正面结构;
去除所述衬底半导体晶片;
去除所述氧化层;
在所述通道和导电层上形成背面金属电极,该背面金属电极与所述通道和导电层电性接触。
2.根据权利要求1所述的IGBT的制造方法,其特征在于,提供的所述半导体晶片的厚度为200-700um,电阻率为5~500Ω*cm。
3.根据权利要求1所述的IGBT的制造方法,其特征在于,在所述半导体晶片的第一表面上注入导电层的注入剂量为1E13~1E20cm-2,能量为30~200KEV。
4.根据权利要求1所述的IGBT的制造方法,其特征在于,通过光刻、离子注入、高温推阱、激活工艺在所述导电层内间隔的形成所述通道,所述离子注入的注入剂量为1E13~1E20cm-2,能量为30~200KEV。
5.根据权利要求1所述的IGBT的制造方法,其特征在于,通过热氧化或CVD方式在所述导电层和通道上形成氧化层,所述氧化层的厚度为0.01-5um。
6.根据权利要求1所述的IGBT的制造方法,其特征在于,在所述氧化层上键合的所述衬底半导体晶片的厚度为50-650um。
7.根据权利要求1所述的IGBT的制造方法,其特征在于,在基于所述漂移区形成所述IGBT的正面结构前,所述制造方法还包括:
通过CMP或湿法腐蚀方式平坦对所述减薄的所述半导体晶片的第二表面。
8.根据权利要求1所述的IGBT的制造方法,其特征在于,所述衬底半导体晶片的厚度和所述键合形成的漂移区的厚度的和为正常流通半导体晶片厚度。
9.根据权利要求1所述的IGBT的制造方法,其特征在于,所述IGBT的正面结构包括:
在所述漂移区的上表面上有选择的形成的第一导电类型的基区;
在所述基区内有选择的形成的第二导电类型的发射极区;
位于所述漂移区的上表面上的栅氧化层;
在所述栅极氧化层的上表面上形成的多晶硅栅极;
覆盖所述栅极氧化层和多晶硅栅极的介质层;
与所述基区和所述发射极区电性接触的正面金属电极。
10.根据权利要求7所述的IGBT的制造方法,其特征在于,所述IGBT的正面结构包括:
形成于正面金属电极外侧的钝化层。
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