CN104299972B - 薄膜晶体管阵列基板及其制造方法、液晶显示器 - Google Patents
薄膜晶体管阵列基板及其制造方法、液晶显示器 Download PDFInfo
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- CN104299972B CN104299972B CN201410466954.1A CN201410466954A CN104299972B CN 104299972 B CN104299972 B CN 104299972B CN 201410466954 A CN201410466954 A CN 201410466954A CN 104299972 B CN104299972 B CN 104299972B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
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- 239000002184 metal Substances 0.000 claims abstract description 82
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 38
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 2
- 239000013078 crystal Substances 0.000 claims description 2
- 239000012212 insulator Substances 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 230000005611 electricity Effects 0.000 claims 1
- 238000005286 illumination Methods 0.000 abstract description 2
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- 238000000034 method Methods 0.000 description 18
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- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 3
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
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- MGRWKWACZDFZJT-UHFFFAOYSA-N molybdenum tungsten Chemical compound [Mo].[W] MGRWKWACZDFZJT-UHFFFAOYSA-N 0.000 description 2
- 241001044684 Amadina fasciata Species 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
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- 238000003491 array Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
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- 239000004065 semiconductor Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 238000000427 thin-film deposition Methods 0.000 description 1
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Abstract
薄膜晶体管阵列基板及其制造方法、液晶显示器,本发明公开一种薄膜晶体管阵列基板,包括形成在像素区域(100c)中的透明像素电极层(180)及形成在像素区域(100c)和数据布线区域(100b)中的第一金属层(120)、第一绝缘层(130)、非晶硅层(140)、第二金属层(150)、第二绝缘层(160),其中,第一绝缘层(130)覆盖第一金属层(120),非晶硅层(140)、第二金属层(150)和第二绝缘层(160)依序形成在第一绝缘层(130)上,透明像素电极层(180)通过形成在像素区域(100c)的第二绝缘层(160)中的过孔(170)与像素区域(100c)的第二金属层(150)接触。本发明在非晶硅层的下方形成第一金属层,以使非晶硅层不会受到光照的影响而产生光电流,从而不会影响提供给像素的电压,显示画面不会产生异常。
Description
技术领域
本发明属于液晶显示技术领域,具体递地讲,涉及一种薄膜晶体管阵列基板及其制造方法、液晶显示器。
背景技术
随着信息社会的发展,人们对平板显示器的需求得到了快速的增长。液晶显示器(Liquid Crystal Display,简称LCD)具有体积小、功耗低、无辐射等特点,在当前的平板显示器市场占据了主导地位。然而,随着各生产厂商之间剧烈的竞争,提升显示品质、降低不良率、降低生产成本成为LCD生产厂商在剧烈竞争中得以生存的重要保证。LCD中一般使用薄膜晶体管(Thin Film Transistor,简称TFT)作为驱动,从而实现高速度、高亮度、高对比度的显示屏幕信息。
现有的底栅结构的TFT的制造方法的主流是4次光刻技术(4Mask)和5次光刻技术(5Mask)。其中,5Mask工艺主要包括栅电极光刻(Gate Mask),有源层光刻(Active Mask),源漏电极光刻(S/D Mask),过孔光刻(Via Hole Mask)和像素电极光刻(Pixel Mask)。在每一个Mask工艺步骤中又分别包括薄膜沉积(Thin Film Deposition)工艺、刻蚀(包括干法刻蚀Dry Etch和湿法刻蚀Wet Etch)工艺和剥离工艺,形成了5次薄膜沉积→光刻→刻蚀→剥离的循环过程。
4Mask工艺是在5Mask工艺的基础上,利用灰色调光刻(Gray Tone Mask)或半色调光刻(Half Tone Mask)或SSM(Single Slit Mask)工艺,将有源层光刻(Active Mask)与源漏电极光刻(S/D Mask)合并成一个Mask,通过调整刻蚀(Etch)工艺,从而完成原来ActiveMask和S/D Mask的功能,即通过一次Mask工艺达到两次Mask工艺的效果。
图1是现有技术的利用四次光刻技术制造的薄膜晶体管阵列基板的正视示意图。图2是图1中沿A-A线的剖切示意图。参照图1和图2,薄膜晶体管阵列基板20包括栅极布线区域20a、数据布线区域20b及像素区域20c。薄膜晶体管阵列基板20包括在玻璃基板21上依次形成的栅电极金属层22、栅电极绝缘层23、由非晶硅(a-Si)形成的有源层24、有源层24上的源电极金属层25a和漏电极金属层25b、钝化层26、位于漏电极金属层25b上方并在钝化层26上形成的钝化层过孔27以及透明像素电极(即ITO(Indium Tin Oxide,氧化铟锡)电极)层28,其中,透明像素电极层28通过钝化层过孔27与漏电极金属层25b接触。
数据布线区域20b包括在玻璃基板21上依次形成的栅电极绝缘层23、由非晶硅(a-Si)形成的有源层24、有源层24上的源电极金属层25a、钝化层26;而像素区域20c包括在玻璃基板21上依次形成的栅电极绝缘层23、由非晶硅(a-Si)形成的有源层24、有源层24上的源电极金属层25a、钝化层26、在钝化层26上形成的钝化层过孔27以及透明像素电极层28,其中,透明像素电极层28通过钝化层过孔27与漏电极金属层25b接触。
由于形成有源层24的非晶硅是一种感光的半导体材料,其会在液晶显示器的背光模块提供的背光的高强度光照下产生光电流,从而使得透明像素电极层28提供给液晶像素的像素电压产生变化,最终造成液晶显示器显示画面的异常,特别是在性能测试时出现严重的残影(Image Sticking)现象。
发明内容
为了解决上述现有技术存在的问题,本发明的目的在于提供一种薄膜晶体管阵列基板,包括像素区域及数据布线区域,其中,所述薄膜晶体管阵列基板还包括形成在所述像素区域中的透明像素电极层及形成在所述像素区域和所述数据布线区域中的第一金属层、第一绝缘层、非晶硅层、第二金属层、第二绝缘层,其中,所述第一绝缘层覆盖所述第一金属层,所述非晶硅层、所述第二金属层和所述第二绝缘层依序形成在所述第一绝缘层上,所述透明像素电极层通过形成在所述像素区域的第二绝缘层中的过孔与所述像素区域的第二金属层接触。
此外,所述薄膜晶体管阵列基板还包括色阻层,形成在所述第一绝缘层与所述非晶硅层之间。
此外,所述色阻层为红色色阻层或绿色色阻层或蓝色色阻层。
本发明的另一目的还在于提供一种薄膜晶体管阵列基板的制造方法,包括步骤:A)利用第一光刻掩膜板在像素区域和数据布线区域中形成第一金属层;B)沉积第一绝缘层;C)利用第二光刻掩膜板在第一绝缘层上形成非晶硅层及第二金属层;D)沉积第二绝缘层;E)利用第三光刻掩膜板在所述像素区域的第二绝缘层中形成过孔;F)利用第四光刻掩膜板在所述像素区域的第二绝缘层上形成透明像素电极层,其中,所述透明像素电极层通过所述过孔与所述像素区域的第二金属层接触。
进一步地,在执行步骤C)之前,所述制造方法还包括步骤:在所述第一绝缘层上沉积色阻层。
进一步地,所述色阻层为红色色阻层或绿色色阻层或蓝色色阻层。
本发明的又一目的又在于提供一种液晶显示器,包括上述的薄膜晶体管阵列基板。
本发明在由非晶硅形成的非晶硅层的下方形成第一金属层,由于第一金属层是由不透光的金属材料形成,所以能够遮挡液晶显示器的背光模块提供的背光的高强度光线,避免直接照射到由非晶硅形成的非晶硅层上,由非晶硅形成的非晶硅层不会产生光电流,从而不会影响透明像素电极层提供给液晶像素的像素电压,进而不会造成液晶显示器显示画面的异常,即液晶显示器显示画面不会出现残影(Image Sticking)现象。此外,在第一绝缘层与由非晶硅形成的非晶硅层之间均形成色阻层,由于色阻层的介电常数较小,厚度较厚,从而增大了第一金属层与第二金属层之间的距离,使第一金属层与第二金属层之间的电容大幅减小,避免由于电阻电容延迟效应严重而导致像素充电不足或者错充的现象,提高显示质量。
附图说明
通过结合附图进行的以下描述,本发明的实施例的上述和其它方面、特点和优点将变得更加清楚,附图中:
图1是现有技术的利用四次光刻技术制造的薄膜晶体管阵列基板的正视示意图;
图2是图1中沿A-A线的剖切示意图;
图3是根据本发明的实施例的薄膜晶体管阵列基板的正视示意图;
图4是图3中沿B-B线的剖切示意图;
图5是根据本发明的实施例的薄膜晶体管阵列基板的制造方法的流程示意图;
图6是根据本发明的实施例的液晶显示器的结构示意图。
具体实施方式
以下,将参照附图来详细描述本发明的实施例。然而,可以以许多不同的形式来实施本发明,并且本发明不应该被解释为限制于这里阐述的具体实施例。相反,提供这些实施例是为了解释本发明的原理及其实际应用,从而使本领域的其他技术人员能够理解本发明的各种实施例和适合于特定预期应用的各种修改。
将理解的是,尽管在这里可使用术语“第一”、“第二”等来描述各种元件,但是这些元件不应受这些术语的限制。这些术语仅用于将一个元件与另一个元件区分开来。
图3是根据本发明的实施例的薄膜晶体管阵列基板的正视示意图。图4是图3中沿B-B线的剖切示意图。
参照图3和图4,根据本发明的实施例的薄膜晶体管(Thin Film Transistor,简称TFT)阵列基板100包括栅极布线区域100a、数据布线区域100b、像素区域100c。
根据本发明的实施例的薄膜晶体管阵列基板100还包括在基板(例如透明的玻璃基板)110上依次形成的第一金属层(即栅极金属层)120、覆盖第一金属层120的第一绝缘层(即栅极绝缘层)130、由非晶硅(a-Si)形成的非晶硅层(即有源层)140、非晶硅层140上的第二金属层150(其中,位于像素区域100c中的第二金属层150为漏电极金属层,而位于栅极布线区域100a或数据布线区域100b的第二金属层150为源电极金属层)、第二绝缘层(或称钝化层)160、位于漏电极金属层上方并在第二绝缘层160上形成的过孔170以及透明像素电极(即ITO(Indium Tin Oxide,氧化铟锡)电极)层180,其中,透明像素电极层180通过过孔170与漏电极金属层接触。
在本实施例中,栅极布线区域100a包括在基板110上依次形成的第一金属层120、第一绝缘层130、由非晶硅形成的非晶硅层140、非晶硅层140上的第二金属层150(即非晶硅层140上的源电极金属层)、第二绝缘层160。数据布线区域100b包括在基板110上依次形成的第一金属层120、第一绝缘层130、由非晶硅形成的非晶硅层140、非晶硅层140上的第二金属层150(即非晶硅层140上的源电极金属层)、第二绝缘层160。像素区域100c包括在基板110上依次形成的第一金属层120、第一绝缘层130、由非晶硅形成的非晶硅层140、非晶硅层140上的第二金属层150(即非晶硅层140上的漏电极金属层)、第二绝缘层160、位于漏电极金属层上方并在第二绝缘层160上形成的过孔170以及透明像素电极层180,其中,透明像素电极层180通过过孔170与漏电极金属层接触。
由上述可知,在每个区域中的由非晶硅形成的非晶硅层140的下方形成第一金属层120,由于第一金属层120是由不透光的金属材料形成,所以能够遮挡液晶显示器的背光模块提供的背光的高强度光线,避免直接照射到由非晶硅形成的非晶硅层140上,由非晶硅形成的非晶硅层140不会产生光电流,从而不会影响透明像素电极层28提供给液晶像素的像素电压,进而不会造成液晶显示器显示画面的异常,即液晶显示器显示画面不会出现残影(Image Sticking)现象。
此外,根据本发明的实施例的薄膜晶体管阵列基板100还包括色阻层190,其中,该色阻层190形成在第一绝缘层130与由非晶硅形成的非晶硅层140之间。也就是说,每个区域中的第一绝缘层130与由非晶硅形成的非晶硅层140之间均形成有色阻层190。由于色阻层190的介电常数较小,厚度较厚,从而增大了第一金属层120与第二金属层150之间的距离,使第一金属层120与第二金属层150之间的电容大幅减小,避免由于电阻电容延迟效应严重而导致像素充电不足或者错充的现象,提高显示质量。在本实施例中,色阻层190可是红色色阻层、绿色色阻层和蓝色色阻层中的一种。
下面将对根据本发明的实施例的薄膜晶体管阵列基板的制造方法进行描述。图5是根据本发明的实施例的薄膜晶体管阵列基板的制造方法的流程示意图。
一并参照图3至图5,在步骤210中,利用第一光刻掩膜板在栅极布线区域100a、像素区域100c和数据布线区域100b中形成第一金属层120。步骤210的具体方法为:在基板110上沉积第一金属膜层,利用第一光刻掩膜板对第一金属膜层进行曝光、显影以及湿法刻蚀、剥离后形成第一金属层120,即栅电极金属层。在该步骤中,第一金属膜层采用的金属材料可例如是钽(Ta)、钼钽(MoTa)、钼钨(MoW)或铝(Al)等。
在步骤220中,沉积第一绝缘层130。这里,第一绝缘层130也称栅电极绝缘层,其沉积在每个区域的第一金属层120及被剥离第一金属层120后的基板110上。
在步骤240中,利用第二光刻掩膜板在第一绝缘层130上依序形成非晶硅层140及第二金属层150。这里,形成在栅极布线区域100a和数据布线区域100b中的第二金属层150为源电极金属层,而形成在像素区域100c中的第二金属层150为漏电极金属层。该步骤240的具体方法为:在第一绝缘层130上依次沉积非晶硅膜层及第二金属膜层,利用第二光刻掩膜板曝光、显影以及湿法刻蚀、干法刻蚀、剥离后形成非晶硅层(即有源层)140及第二金属层150。
在步骤250中,沉积第二绝缘层160。这里,第二绝缘层160也称钝化层,其沉积在每个区域的第二金属层150及被剥离非晶硅层140、第二金属层150后的第一绝缘层130上。
在步骤260中,利用第三光刻掩膜板在像素区域100c的第二绝缘层160中形成过孔170。该步骤260的具体方法为:可利用第三光刻掩膜板对第二绝缘层160进行曝光、显影以及干法刻蚀、剥离,以在像素区域100c的第二绝缘层160中形成过孔170。
在步骤270中,利用第四光刻掩膜板在像素区域100c的第二绝缘层160上形成透明像素电极(即ITO(Indium Tin Oxide,氧化铟锡)电极)层180,其中,透明像素电极层180通过过孔170与像素区域100c的第二金属层150(即漏电极金属层)接触。该步骤270的具体方法为:在第二绝缘层160上沉积透明像素电极膜层,利用第四光刻掩膜板曝光、显影以及湿法刻蚀、剥离后将非像素区域100c的透明像素电极膜层去除,保留像素区域100c的透明像素电极膜层,以在像素区域100c的第二绝缘层160上形成透明像素电极层180。
此外,在本实施例中,在执行步骤240之前,根据本发明的实施例的薄膜晶体管阵列基板的制造方法还包括步骤230。在步骤230中,在第一绝缘层130上沉积色阻层190。这里,色阻层190沉积在每个区域的第一绝缘层130上。在本实施例中,色阻层190可是红色色阻层、绿色色阻层和蓝色色阻层中的一种。
图6是根据本发明的实施例的液晶显示器的结构示意图。
参照图6,根据本发明的实施例的液晶显示器包括液晶显示面板以及与该液晶显示面板相对设置的背光模组400,其中,背光模组400提供显示光源给该液晶显示面板,以使该液晶显示面板借由背光模组400提供的光来显示影像。而液晶显示面板具有如下配置:上述的薄膜晶体管阵列基板100;第二基板200,其包括黑色矩阵以及配向层等;液晶层300,夹设在薄膜晶体管阵列基板100和第二基板200之间;并且薄膜晶体管阵列基板100和第二基板200被布置成彼此面对。
鉴于本发明中采用的第二基板200与现有技术相同,因此其具体结构可参照相关的现有技术,在此不再赘述。而本实施例的背光模组400也与现有液晶显示器中的背光模组相同,因此其具体结构也可参照相关的现有技术,在此也不再赘述。
虽然已经参照特定实施例示出并描述了本发明,但是本领域的技术人员将理解:在不脱离由权利要求及其等同物限定的本发明的精神和范围的情况下,可在此进行形式和细节上的各种变化。
Claims (7)
1.一种薄膜晶体管阵列基板,包括栅极布线区域(100a)、像素区域(100c)及数据布线区域(100b),其特征在于,所述薄膜晶体管阵列基板还包括形成在所述像素区域(100c)中的透明像素电极层(180)及形成在所述栅极布线区域(100a)、像素区域(100c)和所述数据布线区域(100b)中的第一金属层(120)、第一绝缘层(130)、非晶硅层(140)、第二金属层(150)、第二绝缘层(160),其中,所述第一绝缘层(130)覆盖所述第一金属层(120),所述非晶硅层(140)、所述第二金属层(150)和所述第二绝缘层(160)依序形成在所述第一绝缘层(130)上,所述透明像素电极层(180)通过形成在所述像素区域(100c)的第二绝缘层(160)中的过孔(170)与所述像素区域(100c)的第二金属层(150)接触;所述非晶硅层(140)在所述第一金属层(120)上的投影位于所述第一金属层(120)以内。
2.根据权利要求1所述的薄膜晶体管阵列基板,其特征在于,所述薄膜晶体管阵列基板还包括色阻层(190),形成在所述第一绝缘层(130)与所述非晶硅层(140)之间。
3.根据权利要求2所述的薄膜晶体管阵列基板,其特征在于,所述色阻层(190)为红色色阻层或绿色色阻层或蓝色色阻层。
4.一种薄膜晶体管阵列基板的制造方法,其特征在于,包括步骤:
A)利用第一光刻掩膜板在栅极布线区域(100a)、像素区域(100c)和数据布线区域(100b)中形成第一金属层(120);
B)沉积第一绝缘层(130);
C)利用第二光刻掩膜板在第一绝缘层(130)上形成非晶硅层(140)及第二金属层(150);其中,所述非晶硅层(140)在所述第一金属层(120)上的投影位于所述第一金属层(120)以内;
D)沉积第二绝缘层(160);
E)利用第三光刻掩膜板在所述像素区域(100c)的第二绝缘层(160)中形成过孔(170);
F)利用第四光刻掩膜板在所述像素区域(100c)的第二绝缘层(160)上形成透明像素电极层(180),其中,所述透明像素电极层(180)通过所述过孔(170)与所述像素区域(100c)的第二金属层(150)接触。
5.根据权利要求4所述的制造方法,其特征在于,在执行步骤C)之前,所述制造方法还包括步骤:在所述第一绝缘层(130)上沉积色阻层(190)。
6.根据权利要求5所述的制造方法,其特征在于,所述色阻层(190)为红色色阻层或绿色色阻层或蓝色色阻层。
7.一种液晶显示器,其特征在于,包括权利要求1至3任一项所述的薄膜晶体管阵列基板。
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CN201410466954.1A CN104299972B (zh) | 2014-09-12 | 2014-09-12 | 薄膜晶体管阵列基板及其制造方法、液晶显示器 |
KR1020177009659A KR20170055986A (ko) | 2014-09-12 | 2014-10-10 | 박막 트랜지스터 어레이 기판 및 그 제조 방법, 액정 디스플레이 기기 |
US14/401,105 US9536902B2 (en) | 2014-09-12 | 2014-10-10 | Method of fabricating a thin film transistor substrate using a plurality of photo masks and liquid crystal display |
DE112014006948.5T DE112014006948T5 (de) | 2014-09-12 | 2014-10-10 | Dünnschichttransistor-Arraysubstrat, ein entsprechendes Herstellungsverfahren sowie eine entsprechende Flüssigkristallanzeige |
PCT/CN2014/088305 WO2016037391A1 (zh) | 2014-09-12 | 2014-10-10 | 薄膜晶体管阵列基板及其制造方法、液晶显示器 |
JP2017513130A JP2017526978A (ja) | 2014-09-12 | 2014-10-10 | 薄膜トランジスタアレイ基板、及びその製造方法、液晶表示装置 |
RU2017107744A RU2666815C1 (ru) | 2014-09-12 | 2014-10-10 | Подложка матрицы тонкопленочных транзисторов и способ ее изготовления, и жидкокристаллический дисплей |
GB1702752.5A GB2543997B (en) | 2014-09-12 | 2014-10-10 | Thin film transistor array substrate and fabricating method thereof, and liquid crystal display |
US15/394,888 US9780221B2 (en) | 2014-09-12 | 2016-12-30 | Thin film transistor substrate comprising a photoresist layer formed between a first dielectric layer and an amorphous silicon layer |
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