CN104272443A - 一种薄膜晶体管及其像素单元的制造方法 - Google Patents

一种薄膜晶体管及其像素单元的制造方法 Download PDF

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CN104272443A
CN104272443A CN201380000480.5A CN201380000480A CN104272443A CN 104272443 A CN104272443 A CN 104272443A CN 201380000480 A CN201380000480 A CN 201380000480A CN 104272443 A CN104272443 A CN 104272443A
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gate
source
layer
metal oxide
drain region
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CN104272443B (zh
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余晓军
魏鹏
刘自鸿
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Shenzhen Royole Technologies Co Ltd
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • H01L29/78Field effect transistors with field effect produced by an insulated gate
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    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

公开了一种薄膜晶体管及其像素单元的制造方法,制造所述薄膜晶体管时经由同一掩膜版(6)刻蚀基板(1)上部分刻蚀阻挡层(5)、栅极金属层(4)和栅极绝缘层(3),保留位于栅极区的金属氧化物层(2)、栅极绝缘层(3)、栅极金属层(4)和刻蚀阻挡层(5)以及位于源极区和漏极区用以形成接触过孔部分的金属氧化物层(2)、栅极绝缘层(3)和栅极金属层(4),如此一次确定栅极(11)、源漏极(12,13)和源漏极接触过孔(9,10)的位置,并使后续通过材料替换形成的源极接触过孔(9)和漏极接触过孔(10)与栅极(11)的间距相等,从而使源漏极(12,13)与栅极(11)自对准和源漏极接触过孔(9,10)与栅极(11)自对准且对称,由此制成的薄膜晶体管不易发生短路、断路,寄生电容小,所制电路运行速度快。另外,本工艺适于薄膜晶体管像素单元制造。

Description

PCT国内申请,说明书已公开。

Claims (12)

  1. PCT国内申请,权利要求书已公开。
CN201380000480.5A 2013-02-06 一种薄膜晶体管及其像素单元的制造方法 Active CN104272443B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2013/071471 WO2014121469A1 (zh) 2013-02-06 2013-02-06 一种薄膜晶体管及其像素单元的制造方法

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CN104272443A true CN104272443A (zh) 2015-01-07
CN104272443B CN104272443B (zh) 2016-11-30

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020199287A1 (zh) * 2019-04-04 2020-10-08 深圳市华星光电技术有限公司 顶发光型氧化铟镓锌薄膜晶体管器件制造方法
CN111987137A (zh) * 2020-09-10 2020-11-24 深圳市华星光电半导体显示技术有限公司 柔性面板及其制备方法
CN112230798A (zh) * 2020-10-14 2021-01-15 京东方科技集团股份有限公司 显示面板及制作方法、显示设备

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6136625A (en) * 1991-05-08 2000-10-24 Seiko Epson Corporation Method of manufacturing an active matrix panel
CN101071816A (zh) * 2006-05-12 2007-11-14 Lg.菲利浦Lcd株式会社 多晶硅薄膜晶体管阵列基板及其制造方法
CN102437059A (zh) * 2011-12-06 2012-05-02 北京大学 一种顶栅自对准氧化锌薄膜晶体管的制备方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6136625A (en) * 1991-05-08 2000-10-24 Seiko Epson Corporation Method of manufacturing an active matrix panel
CN101071816A (zh) * 2006-05-12 2007-11-14 Lg.菲利浦Lcd株式会社 多晶硅薄膜晶体管阵列基板及其制造方法
CN102437059A (zh) * 2011-12-06 2012-05-02 北京大学 一种顶栅自对准氧化锌薄膜晶体管的制备方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020199287A1 (zh) * 2019-04-04 2020-10-08 深圳市华星光电技术有限公司 顶发光型氧化铟镓锌薄膜晶体管器件制造方法
CN111987137A (zh) * 2020-09-10 2020-11-24 深圳市华星光电半导体显示技术有限公司 柔性面板及其制备方法
CN112230798A (zh) * 2020-10-14 2021-01-15 京东方科技集团股份有限公司 显示面板及制作方法、显示设备
CN112230798B (zh) * 2020-10-14 2024-03-15 京东方科技集团股份有限公司 显示面板及制作方法、显示设备

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US9583519B2 (en) 2017-02-28
US20160126263A1 (en) 2016-05-05
US20150349098A1 (en) 2015-12-03
WO2014121469A1 (zh) 2014-08-14
US9269796B2 (en) 2016-02-23

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