CN1040461A - 电气器件及其利用等离子体加工的制造方法 - Google Patents

电气器件及其利用等离子体加工的制造方法 Download PDF

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CN1040461A
CN1040461A CN89106675A CN89106675A CN1040461A CN 1040461 A CN1040461 A CN 1040461A CN 89106675 A CN89106675 A CN 89106675A CN 89106675 A CN89106675 A CN 89106675A CN 1040461 A CN1040461 A CN 1040461A
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device body
lead
wire
described device
chip
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CN1019250B (zh
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山崎舜平
浦田一男
小山到
石田典也
佐佐木麻里
今任慎二
中下一寿
广濑直树
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Semiconductor Energy Laboratory Co Ltd
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Abstract

介绍了一种经改进的电气器件及其制造方法。该器件是个例如装在模制件中的集成电路芯片。在进行模制之前，将集成电路芯片涂以氮化硅，以保护集成电路芯片免受湿气通过裂纹或缝隙的侵袭。氮化硅涂层是在用等离子体化学汽相淀积法清洗集成电路芯片的表面之后进行的。

Description

本发明涉及一种电气器件及其制造方法。
集成半导体电路是最重要的广泛应用于各种领域的电气器件。从可靠性的角度来看，其中一个问题是湿气或其它杂质入侵埋置在模制件中的集成电路芯片的问题。入侵是通过在模制件中形成的列裂纹或缝隙进行的，这些裂纹和缝隙形成了从模制件外部通向集成电路芯片表面的通路。到达集成电路表面的湿气促使构成集成电路芯片的半导体产生不希望有的腐蚀，导致芯片不能正常工作。
图1是说明缺陷如何在封装的集成电路器件中形成的一个例子。这种结构包括集成电路半导体芯片29、引线37和环氧树脂模制件，芯片29装在底架35上，借助于金质接线39与引线37进行电连接，集成电路芯片和底架35和引线37即装在环氧树脂模制件中。底架的表面通常是经过氧化处理的，而且其上形成有低价氧化物薄膜24、24′和32。在这种结构中，湿气往往会聚集在底架与模制件之间的界面附近。集成电路器件配置在电气线路板上时，钎焊是通过将集成电路器件在260℃的熔融焊料中浸渍3至10秒钟进行的。湿底迅速变化时，往往会在模制件中导致裂纹，如33和39所示的那样。此外被捕集在底架周围的水分会蒸发且引起膨胀41′，因蒸汽压力而形成空腔42，于是产生列纹33′。这种膨胀产生的可能性特别大，这是由于氧化物薄膜32削弱了模制件粘附到底架上的能力所致。
因此本发明的目的是提供一种能可靠地避免湿气或其它杂质通过封装外壳上的裂纹或其它途径入侵的电气器件及其制造方法。
结合附图阅读下面的详细说明即可更好地了解本发明的内容。附图中：
图1是说明现有技术器件存在的缺陷的剖面示意图;
图2是实施本发明时所使用的等离子体化学汽相淀积设备的原理横截面图示意图;
图3（A）是支撑本发明的集成电路器件用的引线架结构总体的平面示意图;
图3（B）是图2（A）中所示的引线架单元结构的部分展开图;
图3（C）是沿图2（B）的A-A线截取的部分横截面视图;
图4是表示本发明集成电路器件的部分横截面视图。
现在参看图2和图3（A）至3（C）说明与本发明的一个实施例相适应的一个等离子体加工方法。图2是等离子体化学汽相淀积设备的横截面示意图。该设备包括淀积室1、一通过闸阀9连接到淀种室1的装卸室7、设在淀积室1中的一对网状电极或栅极11和14、供气系统5、通过阀21连接至室1的真空泵20和一高频电源10，通过变压器26在电极11与14之间供电之用。变压器26次级线圈的中点25接地。供气系统包括三套流率计18和阀19。输入到电极11和14的高频电能促使在它们之间产生阳极区辉光放电。四边框架40′限定了辉光放电区（淀积区）的范围，以防淀积在区外进行，这是我们所不希望的。框架40′由支架40支撑着，它可以是接地的金属框架，也可以是绝缘框架。在淀积区内，一些衬底组件2由支架40支撑着，且彼此相距3至13厘米（例如8厘米）平行配置。各组件2上装有多个集成电路芯片。
芯片组件由夹持夹44和引线架29组成，引线架29则介在毗邻各夹持夹44之间并在夹持夹44之间支撑起来，如图3（B）和39C）所示。各集成电路芯片装在引线架29的适当位置（各中心底座）上，且借助于金质导接线39与配置在其周围各引线的末端电连接起来。各中心底座的表面制成粗面，以增强各引线架与将装设在下述工艺过程中的模制件之间的连接强度。图3（B）示出了框架41对应于一个芯片所需的引线数的单元结构，图中框架用虚线表示，但图中没有画出芯片右侧的各引线。单元结构沿框架在框架的上下轨之间反复出现，如图3（A）所示。一个框架含有5至25个单元结构，举例说，12个单元结构。许多夹子44系组装成一个整体以便在它们之间支撑10至50个框架，例如10个框架。在该图中，各框架系支撑在夹子44和各槽中。不然的话也可以用在夹子上形成的销子（图中未示出）把各框架悬挂在孔51处。
其次，说明一下本发明的保护膜涂敷工艺。各芯片与各有关引线之间的电气接线完成之后，将一些引线架装到组件2上。各组件系按一定间距通过装卸室7配置在淀积室中。
在真正进行淀积之前，先清洗集成电路器件的外表面。特别是要清除各表面上的低价氧化物薄膜。将淀积室抽真空之后，从供气系统5通过喷嘴3以0.01至1乇的压强往淀积室1中渗入氩气。输入13.56兆赫的1千瓦电能，氩气就转变为等离子体状态，这样就可以产生辉光放电，进行10至30分钟的等离子体清洗处理。通过这个清洗清除掉涂敷在各引线架表面的下层膜。接着从引入口15、16和17在适当的压强下通过喷嘴3以0.01至1乇的压强分别往淀积室1中渗入NH3、Si2H6和N2（气体载体）。引入的NH3/Si2H6/N2的克分子比为1/3/5。往电极对11和14输入1至500兆赫（例如13.56兆赫）的1千瓦高频电能时就产生相阳极区的辉光放电。于是各芯片上、各引线上和它们之间的接线上就淀积有氮化硅的涂敷层。连续淀积10分钟时，涂敷层的厚度达1000±200埃。平均淀积速率约为3埃/秒。
淀积工序完成之后，将各组件从淀积室中取出，进行模制工序。将各组件原封不动地安置在模制设备上。用适用的模具往各芯片周围适当的部分注入环氧树脂材料（410A），然后进行芯片的外封装。组件从模制设备中取出之后，切断各引线的端部，将集成电路与各框架分开。这时将伸出模制件结构外的各引线向下弯曲，以形成“虫状集成电路”（IC    worm）的管脚。通过酸洗清洗各引线，然后涂上焊料。
图4详细表示了模制结构中导线连接的结构。从图中可以看到，氮化硅保护覆盖着装在底座35′上的集成电路芯片表面、各接点38、金属接线39以及由42合金制成的各引线37。借助于保护涂层，保护了芯片，使其免受可能通过图1中所示的各裂纹33或模制件与引线之间的缝隙33″′侵入的湿气的侵袭。这种裂纹特别可能在接线（33′）或在角落边缘（33″）处出现。各引线架与氮化物膜之间的机械连接做得可靠，因为在模制之前各引线架的表面是经过清洗的。实验证明，成品的红外吸收光谱在864厘米-1处有谱峰出现，这是Si-N键合的表征。绝缘涂层的面压水平经测定为8×106伏/厘米。涂层的电阻率经测定为2×105欧厘米。涂层的反射率经测定为1.7至1.8。涂层的保护能力是通过用氟化氢进行腐蚀测定的。腐蚀速率为3至10埃/秒，这与一般氮化硅涂层的数值（约30埃/秒）相比实质上是很小的。这种优质涂层的厚度为1000埃时可以说是足够了（一般为300至5000埃）。
将按本发明制造出来的集成电路器件在95℃下在5%的NaCl溶液中保持20小时。而经此试验之后并没有任何实际的变化。此外还对按本发明制造出来的集成电路器件在10个大气压150℃下进行100小时的高压锅试验。结果，在试验之后并没有发现任何缺陷，且缺陷比例数（fraction defective）从50-100非特减少到5-10非特。一非特为10-9失效/器件·小时。在85℃和85%（相对湿度）的大气中保持1000小时之后，将集成电路器件在260℃熔融的焊料中浸渍5秒钟，以便与电路板上的电路进行电接触。结果仍然没有出现裂纹或膨胀现象。对500个未经等离子体清洗处理和氮化硅薄膜涂敷的样品也进行了上述度试验。结果，80个样品由于存在图1所示的缺陷而不合格。对500个经等离子体清洗处理但无氮化硅膜涂层的样品出进行了上述试验。结果，3个样品由于铝焊区腐蚀而不合格。另外，对500个经等离子体清洗处理和涂敷有氮化硅膜层的样品进行了上述试验。结果，样品没有变成不合格。
尽管上面几个实施例是通过举例的方式具体进行说明的，但不难理解，本发明并不受上述个别实例的限制，在不脱离本发明在本说明书所附权利要求书所规定的范围的前提下是可以进行各种修改和更改的。下面是其中一些实例。
保护涂层可采用象钻石之类的碳、氧化硅或其它绝缘材料淀积形成。虽然本实施例是关于集成电路芯片，但本发明也适用于诸如电阻器和电容器之类的其它电气器件。此外，本发明在采用其它象倒装焊、焊料块焊等焊接法的情况下也是有效的。通过照射波长10至15微的红外线或波长不长于300毫微米的紫外线进一步激发等离子体可以使等离子体清洗效果更好。
在上述实施例中，各引线架是双列直插式的。但本发明也可应用于其它类型的引线架，例如扁平封装式的引线架。

Claims (13)

1、一种电气器件，其特征在于，它包括：
一器件本体，其表面经等离子体清洗处理过；和
一外壳，由有机材料制成，封装着所述器件本体，以形成所述器件本体的封装件。
2、根据权利要求1的器件，其特征在于所述器件还包括一由绝缘材料制成的保护涂层，覆盖住所述器件本体的表面。
3、根据权利要求2的器件，其特征在于，所述保护涂层由氮化硅制成。
4、权利要求1的器件，其特征在于，所述器件本体是个借助接线与引线电连接的集成电路芯片。
5、一种制造电气器件的方法，其特征在于，该方法包括下列步骤：
在器件本体与至少一有关引线之间进行电连接;
通过等离子体处理清洗所述器件本体的表面;
用在机树脂封装所述器件本体和所述引线，使所述引线的一部分伸出有机树脂外壳外。
6、根据权利要求5的方法，其特征在于，所述等离子体处理是通过在等离子体源气体中产生辉光放电进行的。
7、根据权利要求6的方法，其特征在于，所述等离子体源气体是氩气。
8、根据权利要求5的方法，其特征在于，该方法还包括用绝缘材料涂敷所述器件本体和所述引线的步骤。
9、根据权利要求的方法，其特征在于，所述绝缘材料按下列步骤进行涂敷：
将所述器件本体和所述引线配置在等离子体化学汽相淀积设备的反应室中的一对电极之间;
往所述电极之间加交流电压，以便产生辉光放电;
往所述所应室中输入反应气体;
将所述绝缘材料淀积在所述器件本体和所述引线的表面上;和
往所述器件本体周围加有机树脂，以便形成封装着所述器件本体的封装件。
10、根据权利要求7的方法，其特征在于，所述交流电压的频率为1至500兆赫，所述另一交流电压的频率为1至500千赫。
11、根据权利要求6的方法，其特征在于，多个所述器件本体系与多个所述与一引线架形成一个整体的引线连接起来。
12、根据权利要求9的方法，其特征在于，所述各引线在所述封装件制成之后与所述引线架分离。
13、根据权利要求6的方法，其特征在于，所述器件本体与所述引线之间的所述连接系借助于接线焊接进行的。
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