CN103887190B - 组件端子周边内具有周边凹部的引线框架 - Google Patents

组件端子周边内具有周边凹部的引线框架 Download PDF

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Publication number
CN103887190B
CN103887190B CN201310464601.3A CN201310464601A CN103887190B CN 103887190 B CN103887190 B CN 103887190B CN 201310464601 A CN201310464601 A CN 201310464601A CN 103887190 B CN103887190 B CN 103887190B
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recess
component
lead frame
peripheral recess
convex surfaces
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CN103887190A (zh
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R·克鲁兹
L·M·小卡朋特
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Intersil Americas LLC
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Intersil Americas LLC
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Abstract

本文描述的实施方案涉及制造装置。所述方法包括在引线框架的内表面中蚀刻至少一个凹部图案，所述至少一个凹部图案包括限定安装区域的周边的周边凹部。所述方法还包括将组件附接至引线框架的内表面，使得所述组件的单个端子附接在安装区域中且单个端子覆盖周边凹部，其中周边凹部具有使得凹部接近单个端子的周边的尺寸和形状。

Description

组件端子周边内具有周边凹部的引线框架
技术领域
本发明通常涉及封装集成电路，尤其涉及封装集成电路的引线框架。
现有技术
传统封装电路中的引线框架具有平坦的边缘。在某些封装设计中，在回流事件期间焊料可在平坦边缘与相邻材料（比如，模具化合物或焊料掩膜材料）之间引出。泄漏的焊料可引起导电部分之间的无意耦合。
发明内容
一个实施方案涉及一种制造装置的方法。所述方法包括：在引线框架的内表面中蚀刻至少一个凹部图案，所述至少一个凹部图案包括限定安装区域的周边的周边凹部。所述方法还包括将组件蚀刻至所述引线框架的内表面，使得所述组件的单个端子被附接在安装区域中且所述单个端子覆盖周边凹部，其中所述周边凹部具有使得凹部接近单个端子的周边的尺寸和形状。
附图简述
图1A是在组件端子的周边内具有周边凹部的引线框架的封装电路的实施方案的剖面图。
图1B是图1A的封装电路的部分放大图。
图2是图1A和图1B的封装电路的实施方案的平面图。
图3A是图1A和图1B中的封装电路的引线框架的一部分的实施方案的放大剖面图。
图3B是图1A和图1B的封装电路的引线框架的一部分的另一实施方案的放大剖面图。
图4A是在组件端子的周边内具有周边凹部的引线框架的实施方案的俯视图。
图4B是图4A的引线框架的透视图。
图5A是在组件端子的周边内具有周边凹部的引线框架的另一实施方案的俯视图。
图5B是图5A的引线框架的透视图。
图6A是在组件端子的周边内具有周边凹部的引线框架的又另一实施方案的俯视图。
图6B是图6A的引线框架的透视图。
图7A是在组件端子的周边内具有周边凹部的引线框架的又另一实施方案的俯视图。
图7B是图7A的引线框架的透视图。
图8A是在组件端子的周边内具有周边凹部的引线框架的又另一实施方案的俯视图。
图8B是图8A的引线框架的透视图。
图9是制造具有限定在引线框架中的周边凹部的封装电路的实例方法的流程图。
附图中主要组件的参考符号清单
100 电路
102 引线框架
103 外表面
104 端子
105 内表面
106 组件附接粘合剂
107 端子
108 周边凹部
110 阻焊剂
116 组件
118 焊线
122 模制化合物
202 安装区域
204 周边
302 引线框架
304 非导电材料
308 周边凹部
502 引线框架
504 凸起表面
506 十字凹部
508 周边凹部
510 周边
602 框架
604 表面
606 凹部
608 凹部
610 周边
702 引线框架
706 十字凹部
708 周边凹部
710 周边
802 引线框架
804 凸起表面
806 十字凹部
808 周边凹部
900 方法
902 方框
904 方框
905 方框
906 方框
910 方框
912 方框
914 方框
916 方框
具体实施方式
图1A是在组件端子104的周边内具有周边凹部108的引线框架102的封装电路100的实施方案的剖面图。引线框架102由比如金属的导电材料组成。在实例中，引线框架102由铜组成。引线框架102包括两个主要表面：外表面103和内表面105。外表面103是在封装电路100的外部上的表面（在已经涂覆模制化合物之后）且包括多个外部端子107以将引线框架102（且因此封装电路100）耦接至外部电路（例如印刷电路板）。内表面105包括一个或多个垫以安装组件116和任何其它有源或无源组件。
组件116被安装至引线框架102的内表面105。虽然图1A所示的实例图示了单个组件116，但是在其它实例中，额外有源或无源组件可安装至引线框架102。在实例中，封装电路100在多芯片封装中包括多个管芯以比如，例如实施功率转换系统。功率转换系统可包括功率级以及用于功率级的控制器和/或驱动器。例如，组件116可被包封或不包封且包括高侧FET、低侧FET、二极管（例如，肖特基二极管）或用于功率级的控制器/驱动器。其它组件（比如，电感器或无源管芯）也可安装在引线框架102上。在实例中，功率转换系统可包括一个或多个以下项：DC-DC功率转换器、充电器、热插拔控制器、AC-DC转换器、桥式驱动器、降压转换器、升压转换器、降压-升压转换器、同步降压转换器或任何这些电路的一部分。在另一个实例中，封装电路100在单芯片封装中包括单个管芯以比如，例如实施分立装置。
组件116包括其底侧上的端子104以安装至引线框架的内表面105。端子104可被构造来电和/或热耦接在引线框架102与组件116之间。因此，端子104包括组件116上的导电垫，其通常被非导电材料围绕。组件116还可包括其它端子。出于教学目的，仅示出组件116的单个端子104，但是，应理解，组件116可具有一个以上端子。
组件附接粘合剂106可布置在端子104与引线框架102的内表面105之间以将端子104机械附接和电以及/或热耦接至引线框架102。组件附接粘合剂106可包括焊料或导电或绝缘环氧树脂。
图1A、图1B和图2所示的实例引线框架102包括由周边凹部108组成的凹部图案。出于本说明书的目的，术语凹部图案指的是引线框架102在组件104的端子104的周边内的内表面105中形成的任何凹部。在图1A所示的实例中，凹部图案由周边凹部108组成；但是，在其它实例中，凹部图案可包括在比如图5A-8B所示的端子104的周边内的其它凹部。
再次参考图1A，周边凹部108包括引线框架102的内表面108的内凹部分（例如，沟槽）。此外，周边凹部108具有包封一定区域的形状。引线框架102的内表面105上由周边凹部108包封的区域本文称为安装区域202且示于图2中，其示出封装电路100的俯视图。在图2所示的实例中，周边凹部108具有包括矩形周边（例如，正方形）的形状。因此，安装区域202也具有大致矩形的形状。在其它实例中，周边凹部108可具有其它形状，比如圆形或其它多边形。如与周边凹部108比较，图2的实例安装区域202包括凸起的表面。组件116的端子104被安装至安装区域202中的这个凸起表面。因此，组件附接粘合剂106被布置在端子104与引线框架102之间的安装区域202的凸起表面上。
图1B是封装电路100的放大图。如所示，在制造封装电路100之后的第二级回流事件期间，组件附接粘合剂106可软化安装区域202且从其中膨胀。这个第二级回流事件包括在将封装电路100安装至印刷电路板时等等。在这些第二级回流事件期间，包括周边凹部108的凹部图案提供组件附接粘合剂106可膨胀至其中而不会从封装中漏出的间隙。此外，作为凹部，周边凹部108提供多个阻断特征，包括阻止组件附接粘合剂106流动的外壁表面。因此，随着组件附接粘合剂106在回流事件期间膨胀，周边凹部108帮助在端子104的周边内包含组件附接粘合剂，且因此，帮助减少或消除组件附接粘合剂106泄漏至封装的外侧。通常，凹部图案被用在具有大量组件附接粘合剂106的大型端子上。周边凹部108提供用于组件附接粘合剂106的间隙且阻止组件附接粘合剂106在端子104的所有侧上流动。
显然，周边凹部108在端子104的周边204内。即，当组件116被安装在安装区域202中时，端子104的周边204比周边凹部108的外边缘更大，且相反，周边凹部108在端子104的周边204的下面和内部。这在可包括周边凹部108而不在从端子104向外的引线框架102的内表面上使用区域方面是有利的，使从端子104向外的这种区域能够用于其它目的，比如引线框架锁定特征。此外，这使内表面105能够与组件116的周边204相同尺寸，同时仍阻止组件附接粘合剂106的流动。在实例中，内表面105上的周边凹部108的外部形状被构造来匹配端子104的形状使得当在安装区域202中安装端子104时，周边凹部108接近端子104的周边204。因此，用于端子104的组件附接粘合剂106被布置在安装区域202中（即，内接周边凹部108）且周边凹部108在第一级焊料回流期间为组件附接粘合剂106提供周边包含。端子104是单个端子且在一些实例中，端子104仅在安装区域202中耦接至引线框架102。即，端子104不在周边凹部108外侧耦接至引线框架102。另外，在一些实例中，其它端子或互连机构（来自相同或其它组件）并未耦接在安装区域202中。在具有附接至内表面105的其它端子、组件和/或互连机构的实例中，这些其它端子、组件和/或互连机构附接至区域中的内表面105而不是安装区域202（即，在其外侧）。
组件116的顶部表面可通过一个或多个焊线118、铜夹、铝带或其它互联机构耦接至引线框架102的内表面105。焊线118可附接至引线框架102的内表面105以及组件116的顶部表面。模制化合物122可围绕组件116并在引线框架102周围部分地延伸。模制化合物122可包括任何合适的模制化合物，比如热固性材料、热固性环氧基树脂或热塑性材料。
在实例中，引线框架102由多个不同且大致平坦的导电材料区段组成，其中所述区段被定向使得区段整体具有大致平坦的构造。在实例中，一个或多个导电材料区段可以是浮动的，即，一个或多个导电材料区段不邻接封装电路100的封装的边缘（周边）。在这类实例中，封装电路100可在引线框架102的区段之间中在其底边缘上包括阻焊剂110。阻焊剂110可由非导电焊料掩膜材料（阻剂）（包括有机和非有机焊料掩膜材料）组成。
图3A是示出周边凹部108的引线框架102的一部分的放大剖面图。在这个实例中，周边凹部108的表面是暴露的引线框架（例如，铜）。图3B是具有周边凹部308的另一实例引线框302的一部分的放大剖面图。在这个实例中，周边凹部308涂敷非导电材料304，比如焊料掩膜材料（阻剂），其可包括有机和非有机焊料掩膜材料二者。在回流事件期间用非导电材料304涂敷周边凹部308表面可减少组件附接粘合剂106的湿润度，并帮助允许在回流事件之后将组件附接粘合剂106撤回至其先前位置。
图4A-8B图示了具有各种凹部图案的引线框架的不同实施方案。图4A和图4B图示了图1A、图1B和图2所示的引线框架102。如所示，引线框架102包括凹部图案，其包括限定安装区域202周围的周边的周边凹部108。周边凹部108限定安装区域202作为端子104安装至其的单个凸起表面。安装区域202的单个凸起表面涂敷组件附接粘合剂用于端子104的安装。端子104的周边204从周边凹部108向外延伸。
图5A和图5B图示了引线框架502的另一实例。引线框架502包括凹部图案，其包括周边凹部508和多个十字凹部506。周边凹部508限定安装区域中的多个凸起表面504周围的周边。多个凸起表面504由周边凹部508和横跨安装区域延伸的两个十字凹部506限定。类似于周边凹部508，十字凹部506是引线框架502的内表面中的凹部。十字凹部506在被周边凹部508包封的区域中，其中周边凹部508包括图5A和图5B所示的凹部的外环部分。在这个实例中，十字凹部506始终横跨周边凹部508包封的区域延伸，使得其端接在周边凹部508的每个端处。在这个实例中，十字凹部506彼此正交地延伸形成导致四个大致相同尺寸且凸起的表面504的十字。四个凸起表面504涂敷组件附接粘合剂且端子104可附接至其处。端子104的周边510从周边凹部508向外延伸。有利的是，十字凹部506在端子104周边内提供组件附接粘合剂可在回流事件期间膨胀至其中的额外间隙。
图6A和图6B图示了引线框架602的另一实例。引线框架602包括凹部图案，其包括周边凹部608和多个十字凹部606。周边凹部608限定安装区域中的多个凸起表面604周围的周边。多个凸起表面604由周边凹部608和横跨安装区域延伸的四个十字凹部606限定。类似于周边凹部608，十字凹部606是引线框架602的内表面中的凹部。十字凹部606在被周边凹部608包封的区域中，其中周边凹部608包括图6A和图6B所示的凹部的外环部分。在这个实例中，十字凹部606始终横跨周边凹部608包封的区域延伸，使得其端接在周边凹部608的每个端处。在这个实例中，两个十字凹部606正交地延伸至另外两个十字凹部606形成导致六个大致相同尺寸且凸起的表面604的井字板（tick-tack-toe board）图案。六个凸起表面604涂敷组件附接粘合剂且端子104可附接至其处。端子104的周边610从周边凹部608向外延伸。有利的是，十字凹部606在端子104周边内提供组件附接粘合剂可在回流事件期间膨胀至其中的额外间隙。
图7A和图7B图示了引线框架702的又另一实例。引线框架702包括凹部图案，其包括周边凹部708和多个十字凹部706。周边凹部708限定安装区域中的多个凸起表面704周围的周边。多个凸起表面704由周边凹部708和横跨安装区域延伸的两个十字凹部706限定。类似于周边凹部708，十字凹部706是引线框架702的内表面中的凹部。十字凹部706在被周边凹部708包封的区域中，其中周边凹部708包括图7A和图7B所示的凹部的外环部分。在这个实例中，十字凹部706始终横跨周边凹部708包封的区域延伸，使得其端接在周边凹部708的每个端处。在这个实例中，两个十字凹部706彼此平行地延伸导致三个矩形、相同尺寸且凸起的表面704。三个凸起表面704涂敷组件附接粘合剂且端子104可附接至其处。端子104的周边710从周边凹部708向外延伸。有利的是，十字凹部706在端子104周边内提供组件附接粘合剂可在回流事件期间膨胀至其中的额外间隙。
图8A和图8B图示了引线框架802的另一实例。引线框架802包括凹部图案，其包括周边凹部808和多个十字凹部806。周边凹部808限定安装区域中的单个凸起表面804周围的周边。单个凸起表面804由周边凹部808限定。凸起表面804在其中包括十字凹部部分806。类似于周边凹部808，十字凹部806是引线框架802的内表面中的凹部。十字凹部806在由周边凹部808包围的区域中。在这个实例中，十字凹部806不与周边凹部808连接，且代以在周边凹部808包封的区域中限定岛状凹部。这种岛状凹部可以是在顶部安装组件116之后填充的空气。在这个实例中，十字凹部806为十字形状；但是，也可使用其它形状。在这个实例中，凸起表面804涂敷组件附接粘合剂且端子104可附接至其处。端子104的周边810从周边凹部808向外延伸。有利的是，十字凹部806在端子104周边内提供组件附接粘合剂可在回流事件期间膨胀至其中的额外间隙。
在实例中，周边凹部的边缘与引线框架或其部分的边缘之间的空隙为至少0.10mm。在实例中，周边凹部延伸在引线框架的内表面下面延伸至少0.063mm。在实例中，两个邻近凹部（例如，周边凹部和十字凹部）之间的空隙为至少0.50mm。在实例中，凹部（例如周边凹部和十字凹部）的宽度为至少0.10mm。以上任一凹部（例如，周边凹部和十字凹部）在包封封装电路100之后可填充模制化合物、空气或部分填充两者。
将电路100制造入封装可包括同时制造多个封装电路100。例如，多个引线框架102可彼此相邻组装，每个芯片引线框架上安装有合适的组件(116)。一旦被组装，引线框架102和关联的组件可被单片化分割以形成独立的封装系统。以下描述涉及形成单个封装电路100的过程，但是应理解，该过程可包括同时形成多个封装电路100。
图9是制造具有引线框架102的封装电路的实例方法900的流程图，所述引线框架102具有包括周边凹部108的凹部图案。获得引线框架102、要安装在引线框架102上的组件116和任何其它组件（方框902）。组件116和任何其它组件可包括高侧FET、低侧FET、二极管（例如，肖特基二极管）、驱动器/控制器、电感器或有源管芯和其它组件。在包括一个或多个管芯的实例（例如，单块衬底）中，这类一个或多个管芯可使用合适半导体程序制造。
引线框架102可根据所需凹部图案从内（顶部）表面105部分地蚀刻（方框904）。凹部图案可包括周边凹部108和周边凹部108包封的区域中的任何十字凹部。部分蚀刻仅延伸穿过引线框架102的一部分，从内表面105朝外（底部）表面103。部分蚀刻导致了引线框架102的内表面105上限定有凹部图案。为了进行部分蚀刻，阻剂被放置在引线框架102的内表面105上，但是阻剂不会被放置在随着蚀刻进行引线框架102将被移除的部分上。在实例中，部分蚀刻延伸穿过引线框架102的25%至60%。在凹部图案包括非导电材料涂层的实例中，这种非导电材料可被涂覆至具有凹部图案的凹部。在其它实例中，部分蚀刻可延伸至其它情形。在部分蚀刻之后，可对引线框架102的内表面105沉积镀层。
在一些实例中，凹部图案表面可涂敷非导电材料304（方框905）。
引线框架102的内表面105可使用焊料掩膜和软焊涂料或多个焊球将焊膏106涂敷在引线框架102的内表面105上（方框906）。这可包括用焊膏涂敷周边凹部108包封的安装区域中的凸起表面。
组件116可安装在引线框架102的凸起表面的焊膏106上（方框908）。可使用倒装芯片安装技术使组件116与引线框架102对准并将其放置在引线框架102上。尤其是，组件116可被放置使得端子104覆盖凹部图案且周边204被布置在周边凹部108的外部。在包括其它组件的实例中，其它组件也可安装至引线框架102的内表面105。在一些实例中，一旦组件116和任何其它组件在引线框架102上就位，焊料106便可回流。
在一些实例中，焊线118、铜夹、铝带或其它互联机构可附接至组件116、其它组件和/或引线框架102以获得所需的耦接（方框910）。一旦组件116和任何其它组件已被安装且已制造了所有合适的电连接，便可使模制化合物122流过组件116、任何其它组件和引线框架102以包封组件116、任何其它组件和引线框架102（方框912）。在同时形成多个封装电路的过程中，可使模制化合物122流过多个组装电路。一旦被涂覆，模制化合物122便可被固化或凝固。
可在任何合适封装技术中包括具有限定在内表面的凹部环的引线框架。例如，引线框架可包括在具有单件引线框架的封装中，或可包括在引线框架由多个不同且电隔离的导电材料区段的封装中。
在引线框架由多个材料区段组成的实例中，任何区段可被蚀刻成包括所需凹部环和任何十字凹部（方框914）。在这类实例中，除了以上行动之外，制造封装电路的过程可包括沿分界线部分蚀刻引线框架102的内表面105，其对应于最后引线框架102的区段之间的间隙。一旦模制化合物122被固化，便可在引线框架102的未来区段之间的分界线处蚀刻引线框架102的外表面103。这种部分蚀刻从外表面103向内表面105延伸穿过引线框架的一部分。外表面103上的部分蚀刻可与内表面105上的部分蚀刻对准，使得在分界线蚀刻组合断开且电耦接引线框架102的不同区段。
在实例中，比如焊料掩膜材料（例如阻剂）110的非导电材料可被涂覆至引线框架102的外表面103（方框916）。焊料掩膜材料可包括有机和非有机掩膜材料。此外，输入/输出地面镀层、焊料等等可涂覆至引线框架102的外表面103。
当同时形成多个封装电路时，组合多个封装电路可接着被单片化分割以形成多个封装电路。
本申请中陈述和图示的方向性参考顶部和底部不应理解为限制性的。顶部和底部方向仅仅是说明性的，并不与绝对定向对应。即，“顶部”或“底部”表面仅指相对于引线框架而言的相对定向，并非绝对方向。例如，在实际电子应用中，也可使封装电路转向其“侧面”，使得本文描述的“底部表面”面向侧向。
实例实施方案
实例1包括一种制造装置的方法，所述方法包括：在引线框架的内表面中蚀刻至少一个凹部图案，所述至少一个凹部图案包括限定安装区域的周边的周边凹部；和将组件蚀刻至所述引线框架的所述内表面，使得所述组件的单个端子被附接在所述安装区域中且所述单个端子覆盖所述周边凹部，其中所述周边凹部具有使得所述凹部接近所述单个端子的周边的尺寸和形状。
实例2包括实例1的方法，其中所述组件的所述单个端子包括所述组件上的导电垫。
实例3包括实例1或2中任一项的方法，包括：将一个或多个其它组件附接至在所示安装区域外部的所述引线框架的所述内表面。
实例4包括实例1-3中任一项的方法，其中所述周边凹部具有矩形周边的形状。
实例5包括实例1-4中任一项的方法，其中所述安装区域包括单个凸起表面。
实例6包括实例1-5中任一项的方法，其中蚀刻所述至少一个凹部图案包括蚀刻横跨所述安装区域延伸的一个或多个十字凹部，从而将所述安装区域分成多个凸起表面。
实例7包括实例1-6中任一项的方法，其中所述一个或多个十字凹部通过与所述周边凹部连接而端接在每个端上。
实例8包括实例1-7中任一项的方法，包括：将组件附接粘合剂放置在所述安装区域中的一个或多个凸起表面上；和将模制化合物涂覆在所述引线框架上且涂覆在所述组件周围。
实例9包括一种封装电路，其包括：引线框架，其包括在其内表面上的至少一个凹部图案，所述至少一个凹部图案包括在一个或多个凸起表面周围限定周边的周边凹部；具有一个或多个端子的组件，所述端子中的一个被安装至所述一个或多个凸起表面，使得所述端子覆盖所述周边凹部，其中所述周边凹部具有使得所述凹部接近所述端子的周边的尺寸和形状；和组件附接粘合剂，其在所述组件的所述单个端子与所述引线框架的所述一个或多个凸起表面之间。
实例10包括实例9的封装电路，其中所述组件的所述端子包括在所述组件上的导电垫。
实例11包括实例10的封装电路，其中所述导电垫被非导电材料围绕。
实例12包括实例9-11中任一项的封装电路，其中所述周边凹部具有矩形周边的形状。
实例13包括实例9-12中任一项的封装电路，其中所述一个或多个凸起表面包括单个凸起表面。
实例14包括实例9-13中任一项的封装电路，其中所述至少一个凹部图案包括内接至所述周边凹部的一个或多个十字凹部，使得所述一个或多个凸起表面包括多个凸起表面。
实例15包括实例9-14中任一项的封装电路，其中所述一个或多个十字凹部通过与所述周边凹部连接而端接在每个端上。
实例16包括实例9-15中任一项的封装电路，包括：组件附接粘合剂，其在所述引线框架与所述组件之间的所述一个或多个凸起表面上。
实例17包括一种制造装置的方法，所述方法包括：在引线框架的内表面中蚀刻凹部图案，所述凹部图案包括在一个或多个凸起表面周围限定周边的周边凹部；将组件附接粘合剂放置在所述一个或多个凸起表面上；将组件附接至所述引线框架的所述内表面，使得所述组件的单个端子附接至所述一个或多个凸起表面且所述单个端子覆盖所述周边凹部，其中所述周边凹部具有使得所述凹部接近所述单个端子的周边的尺寸和形状；和将模制化合物涂覆在所述引线框架上和涂覆在所述组件周围。
实例18包括实例17的方法，其中所述一个或多个凸起表面包括组成内接所述周边凹部的整个区域的单个表面。
实例19包括实例17或18的方法，其中蚀刻所述凹部图案包括蚀刻内接至所述周边凹部的一个或多个十字凹部，使得所述一个或多个凸起表面包括多个凸起表面。
实例20包括实例17-19的方法，其中所述周边凹部具有矩形周边的形状。

Claims (20)

1.一种制造用于封装电路的装置的方法，所述方法包括：
在引线框架的内表面中蚀刻至少一个凹部图案，所述至少一个凹部图案包括限定安装区域的周边的周边凹部；和
将所述电路的组件附接至所述引线框架的所述内表面，使得所述组件的单个端子被附接在所述安装区域中且所述单个端子覆盖所述周边凹部，其中所述周边凹部具有使得所述凹部接近所述单个端子的周边的尺寸和形状。
2.根据权利要求1所述的方法，其中所述组件的所述单个端子包括所述组件上的导电垫。
3.根据权利要求1所述的方法，包括：
将一个或多个其它组件附接至在所述安装区域外部的所述引线框架的所述内表面。
4.根据权利要求1所述的方法，其中所述周边凹部具有矩形周边的形状。
5.根据权利要求1所述的方法，其中所述安装区域包括单个凸起表面。
6.根据权利要求1所述的方法，其中蚀刻所述至少一个凹部图案包括蚀刻横跨所述安装区域延伸的一个或多个十字凹部，从而将所述安装区域分成多个凸起表面。
7.根据权利要求1所述的方法，其中所述一个或多个十字凹部通过与所述周边凹部连接而端接在每个端上。
8.根据权利要求1所述的方法，包括：
将组件附接粘合剂放置在所述安装区域中的一个或多个凸起表面上；和
将模制化合物施加在所述引线框架上且施加在所述组件周围。
9.一种封装电路，其包括：
引线框架，其包括在其内表面上的至少一个凹部图案，所述至少一个凹部图案包括在一个或多个凸起表面周围限定周边的周边凹部；
具有一个或多个端子的组件，所述端子中的一个被安装至所述一个或多个凸起表面，使得所述组件的所述端子覆盖所述周边凹部，其中所述周边凹部具有使得所述凹部接近所述端子的周边的尺寸和形状；和
组件附接粘合剂，其在所述组件的所述端子与所述引线框架的所述一个或多个凸起表面之间。
10.根据权利要求9所述的封装电路，其中所述组件的所述端子包括在所述组件上的导电垫。
11.根据权利要求10所述的封装电路，其中所述导电垫被非导电材料围绕。
12.根据权利要求9所述的封装电路，其中所述周边凹部具有矩形周边的形状。
13.根据权利要求9所述的封装电路，其中所述一个或多个凸起表面为一个单个的凸起表面。
14.根据权利要求9所述的封装电路，其中所述至少一个凹部图案包括内接至所述周边凹部的一个或多个十字凹部，使得所述一个或多个凸起表面包括多个凸起表面。
15.根据权利要求9所述的封装电路，其中所述一个或多个十字凹部通过与所述周边凹部连接而端接在每个端上。
16.根据权利要求9所述的封装电路，包括：
组件附接粘合剂，其在所述引线框架与所述组件之间的所述一个或多个凸起表面上。
17.一种制造用于封装电路的装置的方法，所述方法包括：
在引线框架的内表面中蚀刻凹部图案，所述凹部图案包括在一个或多个凸起表面周围限定周边的周边凹部；
将组件附接粘合剂放置在所述一个或多个凸起表面上；
将所述电路的组件附接至所述引线框架的所述内表面，使得所述组件的单个端子附接至所述一个或多个凸起表面且所述单个端子覆盖所述周边凹部，其中所述周边凹部具有使得所述凹部接近所述单个端子的周边的尺寸和形状；和
将模制化合物施加在所述引线框架上和施加在所述组件周围。
18.根据权利要求17所述的方法，其中所述一个或多个凸起表面包括构成内接所述周边凹部的整个区域的单个表面。
19.根据权利要求17所述的方法，其中蚀刻所述凹部图案包括蚀刻内接至所述周边凹部的一个或多个十字凹部，使得所述一个或多个凸起表面包括多个凸起表面。
20.根据权利要求17所述的方法，其中所述周边凹部具有矩形周边的形状。
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