CN103688355B - 使用硅穿孔的集成电路设计 - Google Patents
使用硅穿孔的集成电路设计 Download PDFInfo
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- CN103688355B CN103688355B CN201280032257.4A CN201280032257A CN103688355B CN 103688355 B CN103688355 B CN 103688355B CN 201280032257 A CN201280032257 A CN 201280032257A CN 103688355 B CN103688355 B CN 103688355B
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- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
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US13/170,020 US8560982B2 (en) | 2011-06-27 | 2011-06-27 | Integrated circuit design using through silicon vias |
US13/170,020 | 2011-06-27 | ||
PCT/US2012/021416 WO2013002844A1 (en) | 2011-06-27 | 2012-01-16 | Integrated circuit design using through silicon vias |
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CN103688355A CN103688355A (zh) | 2014-03-26 |
CN103688355B true CN103688355B (zh) | 2016-06-01 |
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US (1) | US8560982B2 (ko) |
EP (1) | EP2724371B1 (ko) |
JP (1) | JP6009556B2 (ko) |
KR (1) | KR101770877B1 (ko) |
CN (1) | CN103688355B (ko) |
WO (1) | WO2013002844A1 (ko) |
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US8664768B2 (en) * | 2012-05-03 | 2014-03-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interposer having a defined through via pattern |
US9026872B2 (en) * | 2012-08-16 | 2015-05-05 | Xilinx, Inc. | Flexible sized die for use in multi-die integrated circuit |
US9997443B2 (en) | 2013-02-25 | 2018-06-12 | Infineon Technologies Ag | Through vias and methods of formation thereof |
US9030025B2 (en) | 2013-03-15 | 2015-05-12 | IPEnval Consultant Inc. | Integrated circuit layout |
US8957504B2 (en) | 2013-03-15 | 2015-02-17 | IP Enval Consultant Inc. | Integrated structure with a silicon-through via |
US8952500B2 (en) | 2013-03-15 | 2015-02-10 | IPEnval Consultant Inc. | Semiconductor device |
US9547034B2 (en) | 2013-07-03 | 2017-01-17 | Xilinx, Inc. | Monolithic integrated circuit die having modular die regions stitched together |
CA2952934A1 (en) | 2014-06-26 | 2015-12-30 | Island Breeze Systems Ca, Llc | Mdi related products and methods of use |
WO2017095811A1 (en) * | 2015-11-30 | 2017-06-08 | The Regents Of The University Of California | Multi-die ic layout methods with awareness of mix and match die integration |
CN105866665B (zh) * | 2016-03-31 | 2019-04-05 | 复旦大学 | 面向高性能SoC FPGA的功能遍历测试方法 |
US10497677B1 (en) | 2017-02-09 | 2019-12-03 | Xilinx, Inc. | ESD protection in a stacked integrated circuit assembly |
US10671792B2 (en) * | 2018-07-29 | 2020-06-02 | International Business Machines Corporation | Identifying and resolving issues with plated through vias in voltage divider regions |
US10700041B2 (en) * | 2018-09-21 | 2020-06-30 | Facebook Technologies, Llc | Stacking of three-dimensional circuits including through-silicon-vias |
US11114429B2 (en) | 2019-04-23 | 2021-09-07 | Xilinx, Inc. | Integrated circuit device with electrostatic discharge (ESD) protection |
JP7462269B2 (ja) | 2020-05-19 | 2024-04-05 | パナソニックIpマネジメント株式会社 | 半導体装置及び半導体装置の製造方法 |
JP7434118B2 (ja) | 2020-09-11 | 2024-02-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
CN116344441B (zh) * | 2023-02-03 | 2024-01-12 | 深圳华芯星半导体有限公司 | 一种芯片封装方法及计算机可读存储介质 |
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- 2012-01-16 EP EP12704155.6A patent/EP2724371B1/en active Active
- 2012-01-16 CN CN201280032257.4A patent/CN103688355B/zh active Active
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CN102074544A (zh) * | 2009-10-22 | 2011-05-25 | 台湾积体电路制造股份有限公司 | 具有虚拟结构的硅通孔及其形成方法 |
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US20120331435A1 (en) | 2012-12-27 |
US8560982B2 (en) | 2013-10-15 |
EP2724371B1 (en) | 2017-08-30 |
EP2724371A1 (en) | 2014-04-30 |
KR20140039227A (ko) | 2014-04-01 |
WO2013002844A1 (en) | 2013-01-03 |
JP6009556B2 (ja) | 2016-10-19 |
CN103688355A (zh) | 2014-03-26 |
KR101770877B1 (ko) | 2017-08-23 |
JP2014523645A (ja) | 2014-09-11 |
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