CN103688311B - 用于促进对动态存储器设备的精细自刷新控制的机制 - Google Patents

用于促进对动态存储器设备的精细自刷新控制的机制 Download PDF

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Publication number
CN103688311B
CN103688311B CN201280025142.2A CN201280025142A CN103688311B CN 103688311 B CN103688311 B CN 103688311B CN 201280025142 A CN201280025142 A CN 201280025142A CN 103688311 B CN103688311 B CN 103688311B
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China
Prior art keywords
data
refresh
supplementary units
memory
supplementary
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CN201280025142.2A
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Chinese (zh)
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CN103688311A (zh
Inventor
R·伊萨克
A·鲁贝格
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Lattice Semiconductor Corp
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Lattice Semiconductor Corp
Silicon Image Inc
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40618—Refresh operations over multiple banks or interleaving
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4061—Calibration or ate or cycle tuning

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
CN201280025142.2A 2011-06-30 2012-06-22 用于促进对动态存储器设备的精细自刷新控制的机制 Active CN103688311B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/173,302 US9159396B2 (en) 2011-06-30 2011-06-30 Mechanism for facilitating fine-grained self-refresh control for dynamic memory devices
US13/173,302 2011-06-30
PCT/US2012/043727 WO2013003223A2 (en) 2011-06-30 2012-06-22 Mechanism for facilitating fine-grained self-refresh control for dynamic memory devices

Publications (2)

Publication Number Publication Date
CN103688311A CN103688311A (zh) 2014-03-26
CN103688311B true CN103688311B (zh) 2017-10-13

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CN201280025142.2A Active CN103688311B (zh) 2011-06-30 2012-06-22 用于促进对动态存储器设备的精细自刷新控制的机制

Country Status (7)

Country Link
US (1) US9159396B2 (https=)
EP (1) EP2727113A4 (https=)
JP (1) JP2014524098A (https=)
KR (1) KR20140047094A (https=)
CN (1) CN103688311B (https=)
TW (1) TWI564891B (https=)
WO (1) WO2013003223A2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11798612B2 (en) 2020-09-22 2023-10-24 Changxin Memory Technologies, Inc. Data refreshing method of memory, controller of memory, and memory

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015041395A (ja) 2013-08-20 2015-03-02 キヤノン株式会社 情報処理装置及びその制御方法、並びに、そのプログラムと記憶媒体
KR102372888B1 (ko) 2015-06-15 2022-03-10 삼성전자주식회사 저장 장치의 온도별 데이터 관리 방법
US10783950B2 (en) 2015-09-02 2020-09-22 Nvidia Corporation Memory management systems and methods using a management communication bus
US10937484B2 (en) * 2015-12-30 2021-03-02 International Business Machines Corporation Dynamic bandwidth throttling of DRAM accesses for memory tracing
CN105679360A (zh) * 2016-01-05 2016-06-15 上海新储集成电路有限公司 一种可刷新的非易失性存储器及其刷新方法
CN108369818B (zh) * 2016-03-09 2024-01-30 华为技术有限公司 一种闪存设备的刷新方法和装置
JP6772797B2 (ja) * 2016-12-05 2020-10-21 株式会社デンソー 制御装置
US10332579B2 (en) * 2017-11-30 2019-06-25 Nanya Technology Corporation DRAM and method for operating the same
US10236035B1 (en) * 2017-12-04 2019-03-19 Nanya Technology Corporation DRAM memory device adjustable refresh rate method to alleviate effects of row hammer events
US10446246B2 (en) * 2018-03-14 2019-10-15 Silicon Storage Technology, Inc. Method and apparatus for data refresh for analog non-volatile memory in deep learning neural network
US10978136B2 (en) * 2019-07-18 2021-04-13 Apple Inc. Dynamic refresh rate control
KR102816799B1 (ko) * 2019-10-30 2025-06-09 삼성전자주식회사 동작 온도에 기초하여 동작 주기를 조절하는 메모리 장치
US11195568B1 (en) 2020-08-12 2021-12-07 Samsung Electronics Co., Ltd. Methods and systems for controlling refresh operations of a memory device
US11520661B1 (en) * 2021-07-12 2022-12-06 Apple Inc. Scheduling of data refresh in a memory based on decoding latencies

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55125662A (en) * 1979-03-22 1980-09-27 Fujitsu Ltd Semiconductor integrated circuit
JPS63121197A (ja) * 1986-11-07 1988-05-25 Fujitsu Ltd 半導体記憶装置
US5677867A (en) * 1991-06-12 1997-10-14 Hazani; Emanuel Memory with isolatable expandable bit lines
JP3285611B2 (ja) * 1992-06-24 2002-05-27 富士通株式会社 ダイナミック半導体メモリ装置
IL121044A (en) * 1996-07-15 2000-09-28 Motorola Inc Dynamic memory device
US6269039B1 (en) * 2000-04-04 2001-07-31 International Business Machines Corp. System and method for refreshing memory devices
JP2002157898A (ja) * 2000-11-15 2002-05-31 Mitsubishi Electric Corp 半導体集積回路
US6366516B1 (en) * 2000-12-29 2002-04-02 Intel Corporation Memory subsystem employing pool of refresh candidates
TW501012B (en) * 2001-01-09 2002-09-01 Silicon Integrated Sys Corp Method and apparatus of event-driven based refresh for high performance memory controller
US6483764B2 (en) 2001-01-16 2002-11-19 International Business Machines Corporation Dynamic DRAM refresh rate adjustment based on cell leakage monitoring
JP2002373489A (ja) 2001-06-15 2002-12-26 Mitsubishi Electric Corp 半導体記憶装置
DE10134090A1 (de) * 2001-07-13 2003-01-30 Infineon Technologies Ag Speicher und Verfahren zum Ersetzen von fehlerhaften Speicherzellen in demselben
DE602004018646D1 (de) * 2003-01-29 2009-02-05 St Microelectronics Sa Verfahren zum Auffrischen eines DRAM und dazugehörige DRAM-Vorrichtung, insbesondere in ein zellulares Mobiltelefon eingebaut
US6781908B1 (en) 2003-02-19 2004-08-24 Freescale Semiconductor, Inc. Memory having variable refresh control and method therefor
US6778457B1 (en) * 2003-02-19 2004-08-17 Freescale Semiconductor, Inc. Variable refresh control for a memory
US7353329B2 (en) 2003-09-29 2008-04-01 Intel Corporation Memory buffer device integrating refresh logic
US7177220B2 (en) * 2004-05-07 2007-02-13 Taiwan Semiconductor Manufacturing Co., Ltd Refresh counter with dynamic tracking of process, voltage and temperature variation for semiconductor memory
ATE431958T1 (de) * 2004-10-21 2009-06-15 Nxp Bv Speicherbaustein und verfahren zur bereitstellung eines auf einer mittleren schwelle basierenden auffrischmechanismus
JP4824936B2 (ja) 2005-03-10 2011-11-30 株式会社日立製作所 ダイナミック・ランダム・アクセス・メモリ装置の検査方法
DE102005025168B4 (de) * 2005-06-01 2013-05-29 Qimonda Ag Elektronische Speichervorrichtung und Verfahren zum Betreiben einer elektronischen Speichervorrichtung
KR100800145B1 (ko) 2006-05-22 2008-02-01 주식회사 하이닉스반도체 셀프 리프레쉬 주기 제어 회로 및 그 방법
FR2903219A1 (fr) * 2006-07-03 2008-01-04 St Microelectronics Sa Procede de rafraichissement d'un memoire vive dynamique et dispositif de memoire vive dynamique correspondant,en particulier incorpore dans un telephone mobile cellulaire
US7742355B2 (en) * 2007-12-20 2010-06-22 Agere Systems Inc. Dynamic random access memory with low-power refresh
US7990795B2 (en) * 2009-02-19 2011-08-02 Freescale Semiconductor, Inc. Dynamic random access memory (DRAM) refresh
US20120243299A1 (en) * 2011-03-23 2012-09-27 Jeng-Jye Shau Power efficient dynamic random access memory devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11798612B2 (en) 2020-09-22 2023-10-24 Changxin Memory Technologies, Inc. Data refreshing method of memory, controller of memory, and memory

Also Published As

Publication number Publication date
EP2727113A4 (en) 2015-03-18
WO2013003223A2 (en) 2013-01-03
KR20140047094A (ko) 2014-04-21
TW201301279A (zh) 2013-01-01
CN103688311A (zh) 2014-03-26
EP2727113A2 (en) 2014-05-07
JP2014524098A (ja) 2014-09-18
US20130007357A1 (en) 2013-01-03
TWI564891B (zh) 2017-01-01
WO2013003223A3 (en) 2013-03-21
US9159396B2 (en) 2015-10-13

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