KR20140047094A - 동적 메모리 디바이스들에 대해 미세 입도 셀프-리프레시 제어를 용이하게 하기 위한 메커니즘 - Google Patents

동적 메모리 디바이스들에 대해 미세 입도 셀프-리프레시 제어를 용이하게 하기 위한 메커니즘 Download PDF

Info

Publication number
KR20140047094A
KR20140047094A KR20147002152A KR20147002152A KR20140047094A KR 20140047094 A KR20140047094 A KR 20140047094A KR 20147002152 A KR20147002152 A KR 20147002152A KR 20147002152 A KR20147002152 A KR 20147002152A KR 20140047094 A KR20140047094 A KR 20140047094A
Authority
KR
South Korea
Prior art keywords
cells
refresh
data
supplemental
policy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR20147002152A
Other languages
English (en)
Korean (ko)
Inventor
로저 아이삭
앨런 루버그
Original Assignee
실리콘 이미지, 인크.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 실리콘 이미지, 인크. filed Critical 실리콘 이미지, 인크.
Publication of KR20140047094A publication Critical patent/KR20140047094A/ko
Ceased legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40615Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40618Refresh operations over multiple banks or interleaving
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406Refreshing of dynamic cells
    • G11C2211/4061Calibration or ate or cycle tuning

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
KR20147002152A 2011-06-30 2012-06-22 동적 메모리 디바이스들에 대해 미세 입도 셀프-리프레시 제어를 용이하게 하기 위한 메커니즘 Ceased KR20140047094A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/173,302 US9159396B2 (en) 2011-06-30 2011-06-30 Mechanism for facilitating fine-grained self-refresh control for dynamic memory devices
US13/173,302 2011-06-30
PCT/US2012/043727 WO2013003223A2 (en) 2011-06-30 2012-06-22 Mechanism for facilitating fine-grained self-refresh control for dynamic memory devices

Publications (1)

Publication Number Publication Date
KR20140047094A true KR20140047094A (ko) 2014-04-21

Family

ID=47391851

Family Applications (1)

Application Number Title Priority Date Filing Date
KR20147002152A Ceased KR20140047094A (ko) 2011-06-30 2012-06-22 동적 메모리 디바이스들에 대해 미세 입도 셀프-리프레시 제어를 용이하게 하기 위한 메커니즘

Country Status (7)

Country Link
US (1) US9159396B2 (https=)
EP (1) EP2727113A4 (https=)
JP (1) JP2014524098A (https=)
KR (1) KR20140047094A (https=)
CN (1) CN103688311B (https=)
TW (1) TWI564891B (https=)
WO (1) WO2013003223A2 (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210052710A (ko) * 2019-10-30 2021-05-11 삼성전자주식회사 동작 온도에 기초하여 동작 주기를 조절하는 메모리 장치
KR20220019051A (ko) * 2019-07-18 2022-02-15 애플 인크. 동적 리프레시 레이트 제어
KR20220114095A (ko) * 2018-03-14 2022-08-17 실리콘 스토리지 테크놀로지 인크 심층 학습 신경망에서 아날로그 비휘발성 메모리를 위한 데이터 리프레쉬 방법 및 장치

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015041395A (ja) 2013-08-20 2015-03-02 キヤノン株式会社 情報処理装置及びその制御方法、並びに、そのプログラムと記憶媒体
KR102372888B1 (ko) 2015-06-15 2022-03-10 삼성전자주식회사 저장 장치의 온도별 데이터 관리 방법
US10783950B2 (en) 2015-09-02 2020-09-22 Nvidia Corporation Memory management systems and methods using a management communication bus
US10937484B2 (en) * 2015-12-30 2021-03-02 International Business Machines Corporation Dynamic bandwidth throttling of DRAM accesses for memory tracing
CN105679360A (zh) * 2016-01-05 2016-06-15 上海新储集成电路有限公司 一种可刷新的非易失性存储器及其刷新方法
CN108369818B (zh) * 2016-03-09 2024-01-30 华为技术有限公司 一种闪存设备的刷新方法和装置
JP6772797B2 (ja) * 2016-12-05 2020-10-21 株式会社デンソー 制御装置
US10332579B2 (en) * 2017-11-30 2019-06-25 Nanya Technology Corporation DRAM and method for operating the same
US10236035B1 (en) * 2017-12-04 2019-03-19 Nanya Technology Corporation DRAM memory device adjustable refresh rate method to alleviate effects of row hammer events
US11195568B1 (en) 2020-08-12 2021-12-07 Samsung Electronics Co., Ltd. Methods and systems for controlling refresh operations of a memory device
EP4002368A4 (en) 2020-09-22 2022-05-25 Changxin Memory Technologies, Inc. MEMORY DATA REFRESHMENT PROCEDURES AND CONTROL THEREOF AND STORAGE
US11520661B1 (en) * 2021-07-12 2022-12-06 Apple Inc. Scheduling of data refresh in a memory based on decoding latencies

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55125662A (en) * 1979-03-22 1980-09-27 Fujitsu Ltd Semiconductor integrated circuit
JPS63121197A (ja) * 1986-11-07 1988-05-25 Fujitsu Ltd 半導体記憶装置
US5677867A (en) * 1991-06-12 1997-10-14 Hazani; Emanuel Memory with isolatable expandable bit lines
JP3285611B2 (ja) * 1992-06-24 2002-05-27 富士通株式会社 ダイナミック半導体メモリ装置
IL121044A (en) * 1996-07-15 2000-09-28 Motorola Inc Dynamic memory device
US6269039B1 (en) * 2000-04-04 2001-07-31 International Business Machines Corp. System and method for refreshing memory devices
JP2002157898A (ja) * 2000-11-15 2002-05-31 Mitsubishi Electric Corp 半導体集積回路
US6366516B1 (en) * 2000-12-29 2002-04-02 Intel Corporation Memory subsystem employing pool of refresh candidates
TW501012B (en) * 2001-01-09 2002-09-01 Silicon Integrated Sys Corp Method and apparatus of event-driven based refresh for high performance memory controller
US6483764B2 (en) 2001-01-16 2002-11-19 International Business Machines Corporation Dynamic DRAM refresh rate adjustment based on cell leakage monitoring
JP2002373489A (ja) 2001-06-15 2002-12-26 Mitsubishi Electric Corp 半導体記憶装置
DE10134090A1 (de) * 2001-07-13 2003-01-30 Infineon Technologies Ag Speicher und Verfahren zum Ersetzen von fehlerhaften Speicherzellen in demselben
DE602004018646D1 (de) * 2003-01-29 2009-02-05 St Microelectronics Sa Verfahren zum Auffrischen eines DRAM und dazugehörige DRAM-Vorrichtung, insbesondere in ein zellulares Mobiltelefon eingebaut
US6781908B1 (en) 2003-02-19 2004-08-24 Freescale Semiconductor, Inc. Memory having variable refresh control and method therefor
US6778457B1 (en) * 2003-02-19 2004-08-17 Freescale Semiconductor, Inc. Variable refresh control for a memory
US7353329B2 (en) 2003-09-29 2008-04-01 Intel Corporation Memory buffer device integrating refresh logic
US7177220B2 (en) * 2004-05-07 2007-02-13 Taiwan Semiconductor Manufacturing Co., Ltd Refresh counter with dynamic tracking of process, voltage and temperature variation for semiconductor memory
ATE431958T1 (de) * 2004-10-21 2009-06-15 Nxp Bv Speicherbaustein und verfahren zur bereitstellung eines auf einer mittleren schwelle basierenden auffrischmechanismus
JP4824936B2 (ja) 2005-03-10 2011-11-30 株式会社日立製作所 ダイナミック・ランダム・アクセス・メモリ装置の検査方法
DE102005025168B4 (de) * 2005-06-01 2013-05-29 Qimonda Ag Elektronische Speichervorrichtung und Verfahren zum Betreiben einer elektronischen Speichervorrichtung
KR100800145B1 (ko) 2006-05-22 2008-02-01 주식회사 하이닉스반도체 셀프 리프레쉬 주기 제어 회로 및 그 방법
FR2903219A1 (fr) * 2006-07-03 2008-01-04 St Microelectronics Sa Procede de rafraichissement d'un memoire vive dynamique et dispositif de memoire vive dynamique correspondant,en particulier incorpore dans un telephone mobile cellulaire
US7742355B2 (en) * 2007-12-20 2010-06-22 Agere Systems Inc. Dynamic random access memory with low-power refresh
US7990795B2 (en) * 2009-02-19 2011-08-02 Freescale Semiconductor, Inc. Dynamic random access memory (DRAM) refresh
US20120243299A1 (en) * 2011-03-23 2012-09-27 Jeng-Jye Shau Power efficient dynamic random access memory devices

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20220114095A (ko) * 2018-03-14 2022-08-17 실리콘 스토리지 테크놀로지 인크 심층 학습 신경망에서 아날로그 비휘발성 메모리를 위한 데이터 리프레쉬 방법 및 장치
KR20220019051A (ko) * 2019-07-18 2022-02-15 애플 인크. 동적 리프레시 레이트 제어
KR20210052710A (ko) * 2019-10-30 2021-05-11 삼성전자주식회사 동작 온도에 기초하여 동작 주기를 조절하는 메모리 장치

Also Published As

Publication number Publication date
EP2727113A4 (en) 2015-03-18
WO2013003223A2 (en) 2013-01-03
TW201301279A (zh) 2013-01-01
CN103688311A (zh) 2014-03-26
EP2727113A2 (en) 2014-05-07
JP2014524098A (ja) 2014-09-18
US20130007357A1 (en) 2013-01-03
TWI564891B (zh) 2017-01-01
CN103688311B (zh) 2017-10-13
WO2013003223A3 (en) 2013-03-21
US9159396B2 (en) 2015-10-13

Similar Documents

Publication Publication Date Title
KR20140047094A (ko) 동적 메모리 디바이스들에 대해 미세 입도 셀프-리프레시 제어를 용이하게 하기 위한 메커니즘
US8151094B2 (en) Dynamically estimating lifetime of a semiconductor device
US7233538B1 (en) Variable memory refresh rate for DRAM
US9310426B2 (en) On-going reliability monitoring of integrated circuit chips in the field
US9535774B2 (en) Methods, apparatus and system for notification of predictable memory failure
JP5638110B2 (ja) 熱制御装置及び方法
US20110093726A1 (en) Memory Object Relocation for Power Savings
EP1906410B1 (en) Semiconductors memory device with partial refresh function
US20080313494A1 (en) Memory refresh system and method
US11139043B2 (en) Systems and methods for identifying counterfeit memory
KR20070039176A (ko) 시스템 메모리 용법을 확립하고 보고하고 조정하는 방법 및장치
WO2014110051A1 (en) Enhanced dynamic memory management with intelligent current/power consumption minimization
Jung et al. A platform to analyze DDR3 DRAM’s power and retention time
WO2014193412A1 (en) Memory error determination
EP2202753B1 (en) Information processing system with longevity evaluation
US20160285434A1 (en) Method and apparatus for enhancing guardbands using "in-situ" silicon measurements
WO2020117600A1 (en) Estimating the temperature of a memory sub-system
FR3055462A1 (fr) Dispositif et procede de controle des cycles de rafraichissement des memoires non-volatiles
Agarwal et al. Redcooper: Hardware sensor enabled variability software testbed for lifetime energy constrained application
Mukhanov et al. Dram characterization under relaxed refresh period considering system level effects within a commodity server
US8990129B1 (en) Requesting a re-prompt based on learned behavior
EP2819017A2 (en) Apparatus and method to track device usage
Mukhanov et al. Characterization of hpc workloads on an armv8 based server under relaxed dram refresh and thermal stress
Paik et al. Generating representative test sequences from real workload for minimizing dram verification overhead
KR20190137520A (ko) 컴퓨팅 장치 및 이의 동작 방법

Legal Events

Date Code Title Description
PA0105 International application

Patent event date: 20140124

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
N231 Notification of change of applicant
PN2301 Change of applicant

Patent event date: 20160205

Comment text: Notification of Change of Applicant

Patent event code: PN23011R01D

A201 Request for examination
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20170621

Comment text: Request for Examination of Application

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20181019

Patent event code: PE09021S01D

E601 Decision to refuse application
PE0601 Decision on rejection of patent

Patent event date: 20181221

Comment text: Decision to Refuse Application

Patent event code: PE06012S01D

Patent event date: 20181019

Comment text: Notification of reason for refusal

Patent event code: PE06011S01I