CN103578919A - 一种mos器件的钝化层形成方法以及一种mos器件 - Google Patents
一种mos器件的钝化层形成方法以及一种mos器件 Download PDFInfo
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Abstract
本发明提供一种MOS器件的钝化层形成方法以及一种MOS器件。所述MOS器件的钝化层形成方法包括:形成衬底;在衬底上形成介质;图案化介质以露出部分衬底;在露出的衬底部分和介质上形成金属;在金属上形成正硅酸乙酯TEOS;在TEOS上形成磷硅玻璃PSG;以及在PSG上形成氮氧化合物。利用本发明,可以改善钝化层开裂的问题。
Description
技术领域
本发明属于半导体器件制造领域,尤其涉及一种MOS器件的钝化层形成方法以及一种MOS器件。
背景技术
如图1所示,示出了现有技术的DMOS产品的结构。该DMOS产品包括衬底1、介质2、金属3和钝化层4。其中该钝化层4为10000埃的氮化硅层。
通常,高压DMOS产品需要做HTRB测试(高温/反向高压可靠性测试)和HTGB测试(高温高压(栅极)可靠性测试),因其应用不同,其要求也不同。一些低端产品只要求通过168小时的测试,而一些高端产品则需要通过1000小时的测试。在实际生产中发现,很多产品在500小时以上的考核中,由于在进行盐酸浸泡(即针孔实验)后,有大量的铝被侵蚀,钝化层4存在开裂现象,从而很容易发生漏电问题。
发明内容
有鉴于此,本发明需要提供一种新的钝化层形成方法和MOS器件,以改善钝化层开裂问题。
本发明提供了一种MOS器件的钝化层形成方法,所述方法包括:
形成衬底;
在衬底上形成介质;
图案化介质以露出部分衬底;
在露出的衬底部分和介质上形成金属;
在金属上形成正硅酸乙酯TEOS;
在TEOS上形成磷硅玻璃PSG;以及
在PSG上形成氮硅化合物。
优选地,在本发明的上述方法中,所述TEOS的厚度为9000埃-11000埃,所述PSG的厚度为2700埃-3300埃,所述氮硅化合物可为SiON,所述SiON的厚度为2700埃-3300埃,另外,所述氮硅化合物还可为SiN。
优选地,在本发明的上述方法中,所述TEOS的厚度为10000埃,所述PSG的厚度为3000埃,所述SiON的厚度为3000埃。
优选地,在本发明的上述方法中,以化学气相淀积方式形成TEOS、PSG、SiON或TEOS、PSG、SiN。
优选地,在本发明的上述方法中,所述MOS器件为CMOS器件或DMOS器件。
本发明还提供一种MOS器件,所述MOS器件包括衬底、形成在部分衬底上的介质、形成在介质和衬底上的金属以及形成在金属上的钝化层,其中所述钝化层包括:
形成在金属上的正硅酸乙酯TEOS;
形成在TEOS上的磷硅玻璃PSG;以及
形成在PSG上的氮硅化合物。
优选地,在本发明的上述MOS器件中,所述TEOS的厚度为9000埃-11000埃,所述PSG的厚度为2700埃-3300埃,所述氮硅化合物可为SiON,所述SiON的厚度为2700埃-3300埃,另外,所述氮硅化合物还可为SiN。
优选地,在本发明的上述MOS器件中,所述TEOS的厚度为10000埃,所述PSG的厚度为3000埃,所述SiON的厚度为3000埃。
优选地,在本发明的上述MOS器件中,以化学气相淀积方式形成TEOS、PSG、SiON或TEOS、PSG、SiN。
优选地,在本发明的上述MOS器件中,所述MOS器件为CMOS器件或DMOS器件。
利用本发明,由于底层的TEOS和PSG可以有效缓解顶层的应力,同时顶层氮氧化硅的应力比原来的氮化硅应力小,从而有效改善钝化层开裂问题。
利用本发明,可以有效降低产品报废率,提高生成效率。
附图说明
图1为根据现有技术的DMOS产品的结构示意图;
图2为根据本发明的示意性实施例的MOS器件的钝化层形成方法;以及
图3为根据本发明的示意性实施例的MOS器件的结构示意图。
具体实施方式
下面将结合附图详细描述本发明的优选实施例,在附图中相同的参考标号表示相同的元件。
图2为根据本发明的示意性实施例的MOS器件的钝化层形成方法。如图所示,该方法包括以下步骤:
S1:形成衬底。衬底可以例如为<100晶向>,电阻15~25欧姆的单晶硅。
S2:在衬底上形成介质。介质可以例如为氧化层,例如为氧化硅层。
S3:图案化介质以露出部分衬底。
S4:在露出的衬底部分和介质上形成金属。金属可以例如为铝。
S5:在金属上形成正硅酸乙酯TEOS。优选地,TEOS的厚度为9000埃-11000埃。更优选地,TEOS的厚度为10000埃。
S6:在TEOS上形成磷硅玻璃PSG。优选地,PSG的厚度为2700埃-3300埃。更优选地,PSG的厚度为3000埃。
S7:在PSG上形成氮硅化合物。优选地,SiON的厚度为3000埃。更优选地,SiON的厚度为3000埃。另外,SiON可用SiN替换。
优选地,以化学气相淀积方式形成TEOS、PSG、SiON。
优选地,上述MOS器件为CMOS器件或DMOS器件。
图3为根据本发明的示意性实施例的MOS器件的结构示意图。在形成钝化层过程的氮氧化合物可为SiON或SiN等,下面实施例中氮氧化合物仅以SiON为例,如图所示,MOS器件包括衬底1、形成在部分衬底上的介质2、形成在介质和衬底上的金属3以及形成在金属上的钝化层4’,其中所述钝化层4’包括:
形成在金属3上的正硅酸乙酯TEOS 41;
形成在TEOS 41上的磷硅玻璃PSG 42;以及
形成在PSG 42上的氮氧化硅SiON 43。
优选地,TEOS 41的厚度为9000埃-11000埃,PSG 42的厚度为2700埃-3300埃,SiON 43的厚度为2700埃-3300埃。
更优选地,TEOS 41的厚度为10000埃,PSG 42的厚度为3000埃,SiON 43的厚度为3000埃。
优选地,以化学气相淀积方式形成TEOS 41、PSG 42、SiON 43。
优选地,上述MOS器件可以为CMOS器件或DMOS器件。
鉴于这些教导,熟悉本领域的技术人员将容易想到本发明的其它实施例、组合和修改。因此,当结合上述说明和附图进行阅读时,本发明仅仅由权利要求限定。
Claims (10)
1.一种MOS器件的钝化层形成方法,其特征在于,所述方法包括:
形成衬底;
在衬底上形成介质;
图案化介质以露出部分衬底;
在露出的衬底部分和介质上形成金属;
在金属上形成正硅酸乙酯TEOS;
在TEOS上形成磷硅玻璃PSG;以及
在PSG上形成氮氧化合物。
2.如权利要求1所述的方法,其特征在于,所述TEOS的厚度为9000埃-11000埃,所述PSG的厚度为2700埃-3300埃,所述氮硅化合物可为SiON,所述SiON的厚度为2700埃-3300埃,另外,所述氮硅化合物还可为SiN。
3.如权利要求2所述的方法,其特征在于,所述TEOS的厚度为10000埃,所述PSG的厚度为3000埃,所述SiON的厚度为3000埃。
4.如权利要求1-3之一所述的方法,其特征在于,以化学气相淀积方式形成TEOS、PSG、SiON或TEOS、PSG、SiN。
5.如权利要求1-3之一所述的方法,其特征在于,所述MOS器件为CMOS器件或DMOS器件。
6.一种MOS器件,其特征在于,所述MOS器件包括衬底、形成在部分衬底上的介质、形成在介质和衬底上的金属以及形成在金属上的钝化层,其中所述钝化层包括:
形成在金属上的正硅酸乙酯TEOS;
形成在TEOS上的磷硅玻璃PSG;以及
形成在PSG上的氮硅化合物。
7.如权利要求6所述的MOS器件,其特征在于,所述TEOS的厚度为9000埃-11000埃,所述PSG的厚度为2700埃-3300埃,所述氮硅化合物可为SiON,所述SiON的厚度为2700埃-3300埃,另外,所述氮硅化合物还可为SiN。
8.如权利要求7所述的MOS器件,其特征在于,所述TEOS的厚度为10000埃,所述PSG的厚度为3000埃,所述SiON的厚度为3000埃。
9.如权利要求6-8之一所述的MOS器件,其特征在于,以化学气相淀积方式形成TEOS、PSG、SiON或TEOS、PSG、SiN。
10.如权利要求6-8之一所述的MOS器件,其特征在于,所述MOS器件为CMOS器件或DMOS器件。
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CN201210260811.6A CN103578919A (zh) | 2012-07-26 | 2012-07-26 | 一种mos器件的钝化层形成方法以及一种mos器件 |
PCT/CN2013/080149 WO2014015820A1 (zh) | 2012-07-26 | 2013-07-25 | 一种mos器件的钝化层形成方法以及一种mos器件 |
US14/412,445 US9559032B2 (en) | 2012-07-26 | 2013-07-25 | Method for forming MOS device passivation layer and MOS device |
EP13822224.5A EP2879172A4 (en) | 2012-07-26 | 2013-07-25 | METHOD FOR FORMING MOS DEVICE PASSIVATION LAYER AND MOS DEVICE |
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WO2014015820A1 (zh) | 2014-01-30 |
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