CN103548162B - 用于倒装芯片led的p-n分离金属填充物 - Google Patents

用于倒装芯片led的p-n分离金属填充物 Download PDF

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CN103548162B
CN103548162B CN201280024680.XA CN201280024680A CN103548162B CN 103548162 B CN103548162 B CN 103548162B CN 201280024680 A CN201280024680 A CN 201280024680A CN 103548162 B CN103548162 B CN 103548162B
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electrode
layer
metal layer
led
metal
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CN103548162A (zh
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J.雷
Y.魏
A.H.尼克
S.希亚菲诺
D.A.斯泰格瓦德
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Lumileds Holding BV
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Koninklijke Philips Electronics NV
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Abstract

一种发光二极管（LED）结构（10）具有半导体层，所述半导体层包括p型层、有源层以及n型层。p型层具有底表面，并且n型层具有穿过其发光的顶表面。部分p型层和有源层被蚀刻掉以露出n型层。LED的表面利用光致抗蚀剂来图案化，并且铜被镀在露出的表面上以形成电接触其相应的半导体层的p和n电极。在n和p电极之间存在间隙。为了提供对间隙之间的半导体层的机械支撑，在间隙中形成电介质层（34），之后用金属（42）填充间隙。金属被图案化以形成基本上覆盖LED管芯的底表面的柱状凸起（40,42,44），但是不会使电极短路。基本上均匀的覆盖在随后的工艺步骤期间支撑半导体层。

Description

用于倒装芯片LED的P-N分离金属填充物
技术领域
本发明涉及发光二极管（LED），并且，特别地，涉及具有鲁棒的机械支撑结构和改进的热阻的倒装芯片LED。
背景技术
倒装芯片LED由于它们不使用引线接合而在许多应用中是理想的。两个电极都位于该LED的底表面上以便直接接合到基座上的金属焊盘。接合可以由超声接合、焊料、导电粘合剂或其它手段完成。光从与电极相对的LED的表面离开。
在典型的LED倒装芯片中，外延的p型层为底层，并且与底部阳极电极接触。p型层和有源层的一部分必须被蚀刻掉以露出外延的n型层的下侧，其允许到底部阴极电极的连接。该蚀刻创建穿过p型层的分布式通孔，其露出n型层的底表面。该通孔开口之后被绝缘，并且在开口中沉积金属用于接触n型层。
这样的形貌典型地通过在等离子体环境中干法蚀刻半导体材料（例如GaN）来实现。
接触n型层的金属和接触p型层的金属通过间隙被分离。因此，不存在对金属电极之间的脆弱的半导体层的机械支撑。
在晶片级工艺的最后，LED晶片的生长衬底被减薄，并通过单一化（singulation）形成单独的各管芯。然后，LED电极被接合到由许多其它的LED占据的基座片（submount tile）上的金属焊盘。为了防止半导体层的破损，已知的是在半导体层和基座之间注入电介质的、基于有机物的底部填充物材料。这样的注入工艺耗费时间，因为基座片可能支撑数百个LED。
为了提高光提取，在LED电极接合到基座片并且底部填充物被注入后，生长衬底被移除并且具有典型的约5微米厚度的薄半导体层被露出。这样的LED结构被称作薄膜倒装芯片（TFFC）LED。半导体层非常易碎并且易于破损，而且减薄和衬底移除工艺产生半导体层上的应力。因此，需要底部填充物。之后，基座片被单一化，使得安装的器件为下一级封装做好准备。
诸如硅树脂或基于环氧树脂的复合材料（例如模制化合物）之类的底部填充物材料与半导体层固有地具有一些材料上的不匹配，诸如热膨胀系数（CTE）不匹配和杨氏模量不匹配。这导致在温度循环期间或其它应力条件下的脱层或其它可靠性的问题。
需要一种技术来形成鲁棒的TFFC而不需要用于机械支撑的底部填充物。
发明内容
在本发明的一个实施例中，通过在生长衬底上生长n型层、有源层和p型层来形成倒装芯片LED。之后部分p型层和有源层被蚀刻掉以露出用于电接触的n型层。然后形成用于n型层和p型层的金属电极，其中n和p电极通过间隙分离以避免短路。
为了提供对电极之间LED的底表面的机械支撑，间隙的侧壁和底表面用电介质层绝缘，并且间隙通过电镀用金属填充。填充间隙的金属与电极中的至少一个电绝缘来防止短路。当LED电极被接合到基座的焊盘时，填充间隙的金属邻接焊盘中的一个。因此，在将LED安装到基座片上后，LED的整个底表面基本上由电极和填充间隙的金属的组合支撑，从而避免了对底部填充物的需要。因此，避免了底部填充物的缺陷。金属的CTE和杨氏模量与基于有机物的底部填充物材料的相比与半导体层的CTE和杨氏模量要接近得多，从而大大提高了在操作中导致的热应力期间LED的可靠性。
随着片级底部填充工艺的淘汰，更多的LED封装步骤可以在晶片级来进行，这导致更好的生产可缩放性和进一步的制造成本的降低。一个示例是LED晶片通过适当对准的相应的电极焊盘接合到载体晶片，或者镀覆结构足够厚并且在机械上坚硬以形成晶片载体。在载体晶片上的LED然后将同时在晶片级被处理，诸如通过移除生长衬底、使顶部半导体层变粗糙来用于增加光提取、包封LED以及单一化以便用于下一级的封装。事实上，覆盖半导体层底表面的金属在晶片级处理期间为半导体层提供了良好的机械支撑。
所述方法和结构的其它实施例也被描述。
附图说明
图1为生长在生长衬底上的LED半导体层的简化截面图。p型层、有源层和n型层中的每一个都可以包括多层。
图2示出p型层和有源层被蚀刻掉的部分，以便允许到n型层的欧姆接触来形成倒装芯片，并示出形成在该结构上的电介质层和铜种子层。
图3示出LED半导体层的简化形式（为了简化，已忽略p型层和有源层的厚度），其中在表面上已形成光致抗蚀剂部分，之后是镀覆步骤以至少形成电接触n型层和p型层的铜层。
图4示出图3的在光致抗蚀剂部分已经被剥去并且露出的种子层已经被蚀刻掉之后的结构。
图5示出使金属电极之间的间隙的侧壁和底表面绝缘的电介质层。
图6示出溅射在电介质层表面上的金种子层。光致抗蚀剂部分（未示出）之后被形成以露出要镀金的金种子层的区域。
图7示出在露出的种子层被镀金后并且在该种子层被回蚀刻之后的结构。金填充铜电极之间的间隙并覆盖n和p电极的一部分。
图8示出安装到基座晶片以用于进一步处理的LED芯片。
图9示出具有另一种电极配置的LED管芯的一部分，其中通过填充间隙的金属形成对n和p型层二者的电接触。
各种不同附图中的标记有相同数字的元件可以是相同或等同的。
具体实施方式
图 1-7示出仅显示单个LED的LED晶片的一小部分的截面，其中该单个LED的中央部分在横向上被大大降低以便示出侧边缘的细节。为了简化描述，仅仅使每个LED的n型层的外围与电极接触。在实际的器件中，n型层可以与分布式电极接触以用于改进电流散布。
图1示出外延生长在蓝宝石衬底12上的常规LED半导体GaN层10并且以各层生长的顺序表示了成核层、应力释放层、n层14、有源层16（发射光）、p层18和任何其它被用于形成LED的半导体层。形成在晶片上的LED可以是AlInGaN LED，这取决于所希望的峰值波长。可替换地，LED不需要是基于GaN的，并且可以是任何其它使用任何类型的生长衬底的LED类型。本发明适用于形成作为倒装芯片的任何LED。
图2示出该晶片已经被掩蔽并被干法蚀刻以便从LED的边缘移除p层18和有源层16来露出环绕LED外围的n层16的表面。这针对该晶片上的所有LED执行。这样的工艺对形成倒装芯片是常规的。
图2还示出了诸如SiNX之类的电介质层20，其被沉积在晶片的表面上，之后使用常规技术在区域21a处对其进行蚀刻来露出p层18的表面的一部分并在区域21b和21c处对其进行蚀刻来露出部分n层14的表面。该沉积可以通过喷涂来完成。任何合适的电介质材料都可以被使用。该电介质层20覆盖p层18和有源层16中的开口的侧壁，并覆盖p层18的表面的一部分。
铜种子层22形成在该晶片的表面上，其通过电介质层20中的在区域21a-21c处的开口与n和p层形成欧姆接触。比如含有镍、钨、铬、钒和/或钛的阻挡层可以形成在铜种子层22和半导体层之间来避免Cu原子的迁移。可以使用诸如CVD、溅射等等之类的多种已知技术中的任何一种将铜种子层22和阻挡层沉积在整个晶片上。
在图3-8中，GaN层10在下文中将被称作单半导体GaN层10，并且出于简化的目的，生长衬底被忽略。p层18和有源层16的厚度只有几微米，比如近似于5微米，相对于下文中描述的厚得多的镀覆的电极（例如近似于50-100微米）来说这基本上是平坦的。因此，出于简化的目的，忽略图2中示出的半导体台面（层16和18）的高度。在各图中各种不同层的厚度不是按比例绘制的。
在图3中，光致抗蚀剂部分26被沉积并通过常规的光刻技术被图案化来只露出种子层22的要被镀铜的那些部分。这些被露出的区域包括图2中在区域21a-21c处铜种子层22与半导体层电接触的区域。其它比如氧化物或氮化物之类的电介质材料可以代替光致抗蚀剂而用作掩模。
然后，种子层22露出的部分被镀铜28以达到希望的厚度。各种已知的电镀技术都可以被使用，其中该种子层22被耦合到电势，并且该晶片被浸入电解质中用于从电极输运铜原子。也可以使用无电镀覆。铜28对于LED表面上的热扩散和电流散布是有利的。可以使用其他金属和沉积技术。
之后，薄的镍层30和金层32被镀覆在铜28上用于为基座焊盘提供良好的接合界面。
在图4中，光致抗蚀剂部分26在溶液中被剥去，留下间隙29，并且之后使用常规的技术蚀刻掉露出的种子层22。铜28下方的种子层将不再被单独识别。
电接触p层的铜28电极与电接触n层的铜28电极由间隙29隔离。
在图5中，例如SiNX的电介质层34之后通过使用常规技术被沉积在晶片上并被图案化。该淀积可以通过喷涂或其它合适的方法完成。任何合适的低K（介电常数）材料都可以被使用。电介质层34被图案化以覆盖相邻的镀有铜28的电极之间的间隙29中的侧壁和底表面。图案化的电介质层34还覆盖金层32顶表面上的小区域，以确保镀覆电极的侧面没有被露出并提供用于支撑下文所描述的金属层的介电表面。
在图6中，薄的金种子层36被溅射在晶片表面上。
然后，光致抗蚀剂（未示出）在种子层36上被图案化从而只露出要被镀金的那些区域。
如图7所示，露出的种子层36之后在单一电镀步骤中被电镀金从而利用保形生长填充间隙29（图6）并同时形成柱状凸起以用于随后的管芯附接应用。在移除光致抗蚀剂后，露出的种子层36之后被回蚀刻以形成下列金柱状凸起组：1）金柱状凸起40，其经由金层32电接触n型层；2）金柱状凸起42，其经由金层32电接触p型层；以及3）电介质层34上的金柱状凸起44，其与n型层和p型层二者电绝缘。应当注意的是，形成的金柱状凸起44覆盖在用于n型层的铜28电极上的电介质层34上。金柱状凸起44充当紧密隔开的n和p电极之间的隔离缓冲，并为靠近间隙的表面提供机械支撑。
通过提供金柱状凸起，而不是更大的金层，当将LED电极超声接合到基座焊盘上时，金更易于混合在基座金焊盘中。
所得到的LED晶片之后可以被单一化以用于管芯附接，或者可以被接合到载体晶片以用于晶片级的进一步处理。可替换地，铜28层的结构可以足够厚并在机械上坚硬以便充当用于持续的晶片级封装处理的载体晶片。
在图8所示的一个实施例中，每个单独的LED管芯然后被安装在基座晶片50上，该基座晶片50针对每个LED管芯具有用于p接触的中央金焊盘52和用于n接触的外围金焊盘54。接触焊盘和电极配置可以比图8所示出的复杂得多。例如，用于LED管芯的n电极可以通过穿过p层和有源层的通孔分布在LED管芯的表面上，并且基座晶片上的焊盘对应于LED管芯上电极的位置。基座晶片50的主体56可以是陶瓷或其它合适的导热材料。
LED管芯上的金柱状凸起的极性可以被指定为p、n和d（无极性）。金柱状凸起40、42、44之间的间距可以非常小，因为该间距由用于镀覆的掩蔽确定，其可以做得非常精确。尽管这样，至少部分填充间隙的金柱状凸起42可以与其它金柱状凸起40和44不齐平，金柱状凸起42提供间隙区域的机械支撑。并且，由于金的相对可延展的特性，LED的电极到基座焊盘的超声接合将使任何高点稍微变平，从而提供LED管芯的整个底表面上的基本均匀的接触。因此，基本上LED管芯的整个底表面都由金柱状凸起基本均匀地支撑，从而在后续处理期间为半导体层提供良好的机械支撑。
基座晶片50上的焊盘52和54可以彼此靠近地形成，而没有对LED管芯放置的过度公差要求，因为金柱状凸起44被电隔离并且在由于未对准而引起凸起44中的一些接触p金属焊盘52且一些接触相邻的n金属焊盘54的情况下不会短路。
除了金柱状凸起42通过填充铜28之间的间隙提供机械支撑之外，由于添加的电极区域的缘故，它们还提高了基座焊盘52到p型层的传导性。
在一个实施例中，在基座晶片50上的LED管芯然后经受衬底激光剥离工艺，其中在LED管芯经受激光脉冲后蓝宝石生长衬底被剥离。这在半导体层上产生高的向下的压力55。由于金柱状凸起的金属支撑事实上遍布LED管芯的整个背表面，因此防止了半导体层的破损。
LED管芯之后经受减薄工艺，其可以使用化学机械抛光（CMP）或其它技术，将半导体层减薄到只有几微米。然后，露出的顶表面使用蚀刻工艺来使其变粗糙从而提高光提取。
然后，LED管芯可以比如通过在所有管芯上方模制透镜而被包封。
然后，基座晶片50被单一化（例如被锯开）以形成单独的各LED。
图9示出LED管芯上电极配置的另一个实施例。没有形成柱状凸起。在铜28被镀覆在半导体层上来电接触n和p层后，电介质层34被沉积和图案化来露出部分n和p铜28电极。铜种子层（未示出）然后被沉积在表面上并用光致抗蚀剂掩蔽从而仅仅露出那些要被镀覆的部分。铜层70然后被电镀在露出的种子层上来填充铜28电极之间的间隙。铜70然后被镀覆镍层72和金层74。然后，常规的焊料掩模材料80在该表面上被图案化，并且焊膏78被施加到露出的金层74以用于管芯到基座焊盘的附接。加热时，焊膏78接合到基座焊盘。
同样可以预想到其它的电极配置。
当LED被激励时，穿过覆盖在p层和有源层上的n型层来发光。电极金属（例如金或镍阻挡层）使光穿过LED向上反射回来。
在详细描述了本发明之后，本领域技术人员应当理解的是，在给定本公开内容的情况下，可以对本发明进行修改而不脱离本文中所描述的发明理念的精神。因此，本文并非旨在将本发明的范围限制于所说明的和所描述的具体实施例。

Claims (15)

1.一种发光二极管（LED）倒装芯片结构，包括：
半导体层，包括第一导电层、有源层以及第二导电层，所述半导体层具有面向基座的底表面和光穿过其发射的顶表面；
与底表面相对并且电连接到所述第一导电层的第一电极；
与底表面相对并且电连接到所述第二导电层的第二电极；
使所述第一电极的侧壁和所述第二电极的相对的侧壁绝缘的第一电介质层，其中在所述第一电极的侧壁上的电介质层和所述第二电极的相对的侧壁上的电介质层之间存在至少一个间隙；以及
与第一电极和第二电极分离地形成的第一金属层，所述第一金属层的第一部分至少部分地填充所述至少一个间隙并与第二电极电绝缘。
2.权利要求1的结构，其中所述第一电介质层的第一部分覆盖所述第二电极的一部分，并且所述第一金属层的第二部分覆盖在所述第一电介质层的第一部分上形成。
3.权利要求2的结构，其中所述第一金属层的第二部分形成接触基座上的焊盘的第一组柱状凸起。
4.权利要求3的结构，其中所述第一组柱状凸起与所述第一电极、第二电极和第一金属层的第一部分电绝缘。
5.权利要求1的结构，其中所述第一导电层包括p型导电层，并且所述第二导电层包括n型导电层，其中部分p型导电层和有源层已经被移除来露出n型导电层的一部分以用于与所述第二电极进行电接触。
6.权利要求1的结构，其中所述第一金属层为镀覆的金属。
7.权利要求1的结构，其中所述第一金属层包括覆盖在所述第一电极和第二电极上的柱状凸起。
8.权利要求1的结构，其中所述结构进一步包括具有焊盘的基座，其中所述第一电极、第二电极以及部分第一金属层接合到所述焊盘。
9.权利要求1的结构，其中至少部分填充所述至少一个间隙的所述第一金属层的第一部分通过所述第一金属层的第二部分电连接到所述第一电极，所述第一金属层的第二部分在所述第一电介质层的边缘上延伸。
10.权利要求1的结构，其中所述结构进一步包括具有焊盘的基座，其中所述第一电极、第二电极以及部分第一金属层接合到所述焊盘，
其中部分所述第一金属层形成覆盖在所述第一电极和第二电极上的柱状凸起，并且
其中在所述第二电极上的柱状凸起与所述第一金属层的第一部分电绝缘，所述第一金属层的第一部分至少部分填充所述至少一个间隙。
11.权利要求10的结构，其中所述第一电极上的柱状凸起电连接到所述第一电极和金属层的第一部分。
12.权利要求1的结构，其中所述第一金属层至少部分地机械支撑所述半导体层。
13.权利要求1的结构，其中所述基座为其上安装有多个LED倒装芯片的基座晶片，其中在所述多个LED的晶片级处理期间，当所述第一电极、第二电极和第一金属层接合到所述基座晶片的焊盘上时，所述第一金属层至少部分地机械支撑所述半导体层。
14.一种用于形成发光二极管（LED）倒装芯片结构的方法，包括：
形成半导体层，所述半导体层包括第一导电层、有源层以及第二导电层，所述半导体层具有面向基座的底表面和光穿过其发射的顶表面；
蚀刻部分所述第一导电层和有源层来露出所述第二导电层的一部分；
形成与底表面相对并且电连接到所述第一导电层的第一电极；
形成与底表面相对并且电连接到所述第二导电层的第二电极；
形成使所述第一电极的侧壁和所述第二电极的相对的侧壁绝缘的第一电介质层，其中在所述第一电极的侧壁上的电介质层和所述第二电极的相对的侧壁上的电介质层之间存在至少一个间隙；以及
形成第一金属层，所述第一金属层与第一电极和第二电极分离地形成，所述第一金属层的第一部分至少部分地填充所述至少一个间隙并与第二电极电绝缘。
15.权利要求14的方法，其中所述第一电介质层的第一部分覆盖所述第二电极的一部分，并且所述第一金属层的第二部分覆盖在所述第一电介质层的第一部分上形成。
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US9219209B2 (en) 2015-12-22
US10170675B2 (en) 2019-01-01
RU2597071C2 (ru) 2016-09-10
US20160126436A1 (en) 2016-05-05
US20170373235A1 (en) 2017-12-28
TWI569469B (zh) 2017-02-01
BR112013029686A2 (pt) 2017-01-17
EP2715813A1 (en) 2014-04-09
US9722161B2 (en) 2017-08-01
RU2013156628A (ru) 2015-06-27
KR20140030264A (ko) 2014-03-11
US20140061714A1 (en) 2014-03-06
TW201301564A (zh) 2013-01-01
WO2012160455A1 (en) 2012-11-29
KR101932996B1 (ko) 2018-12-27
EP2715813B1 (en) 2019-07-24
JP2014515557A (ja) 2014-06-30

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