TW201301564A - 用於覆晶發光二極體之ｐ－ｎ分離金屬填充 - Google Patents

用於覆晶發光二極體之ｐ－ｎ分離金屬填充 Download PDF

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TW201301564A
TW201301564A TW101118425A TW101118425A TW201301564A TW 201301564 A TW201301564 A TW 201301564A TW 101118425 A TW101118425 A TW 101118425A TW 101118425 A TW101118425 A TW 101118425A TW 201301564 A TW201301564 A TW 201301564A
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electrode
layer
metal layer
stud bumps
gap
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TWI569469B (zh
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Ji-Pu Lei
ya-jun Wei
Alexander H Nickel
Stefano Schiaffino
Daniel Alexander Steigerwald
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Koninkl Philips Electronics Nv
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Abstract

一種發光二極體(LED)結構具有包括p型層、作用層及n型層的若干半導體層。該p型層具有一底表面，且該n型層具有一頂表面，光穿經該頂表面而發射。蝕除該p型層及作用層之若干部分以曝露該n型層。以一光阻來圖案化該LED之表面，且在所曝露表面上方鍍敷銅以形成電接觸其各別半導體層的p電極及n電極。p電極及n電極之間存在一間隙。為了在該間隙之間提供對該等半導體層的機械支撐，在該間隙中形成一介電層，隨後用金屬填充該間隙。該金屬經圖案化以形成若干柱形凸塊，該等柱形凸塊實質上覆蓋LED晶粒之底表面而不會使電極短路。在後續製程步驟期間，實質上均一的覆蓋物支撐該半導體層。

Description

用於覆晶發光二極體之P-N分離金屬填充
本發明係關於發光二極體(LED)，且特定言之，係關於具有堅固機械支撐結構及改良的耐熱性之覆晶LED。
因為覆晶LED不使用引線接合，所以其在許多應用中係合意的。兩個電極均定位於LED的底表面上以用於直接接合至子基板(submount)上之金屬襯墊。可藉由超音波接合、焊料、導電黏接劑或其他方法來完成接合。光退出與電極相對的LED表面。
在典型的LED覆晶中，磊晶p型層為底層，且底部陽極接觸該磊晶p型層。須蝕除p型層及作用層之一部分以曝露磊晶n型層的底面，該曝露允許連接至底部陰極。此蝕刻產生穿經曝露n型層底表面之p型層的分散式通孔。接著使通孔開口絕緣，且在該等開口中沈積金屬以用於接觸n型層。
通常藉由在電漿環境中對半導體材料(例如，GaN)進行乾式蝕刻來達成此構形。
以間隙來分離接觸n型層的金屬與接觸p型層的金屬。因此，金屬電極之間的脆性半導體層無機械支撐。
在晶圓級處理結束時，薄化LED晶圓之生長基板，且藉由單體化而形成個別晶粒。接著將LED電極接合至子基板拼接塊(submount tile)上之金屬襯墊，許多其他LED填入至該子基板拼接塊。為了防止半導體層斷裂，已知在該等 半導體層與該子基板之間注入介電有機底部填充材料。此注入製程為費時的，此係因為該子基板拼接塊可能支撐數百個LED。
為了提高光提取率，在將LED電極接合至子基板拼接塊且注入底部填充材料之後，移除生長基板，且曝露典型厚度為約5微米的薄半導體層。此等LED結構稱作薄膜覆晶(TFFC)LED。半導體層極易受損且易斷裂，且薄化及基板移除製程在該等半導體層上產生應力。因此，需要進行底部填充。接著單體化子基板拼接塊，以使.所安裝裝置準備好用於下一級封裝。
底部填充材料(諸如，聚矽氧或基於環氧樹脂之複合材料(例如，模製化合物))與半導體層固有地具有一定程度的材料失配，諸如，熱膨脹係數(CTE)失配或楊氏模數(Young's modulus)失配。在溫度循環期間或其他應力條件下，此情形導致分層或其他可靠性問題。
所需要的係一種形成堅固TFFC而無需用於機械支撐之底部填充的技術。
在本發明之一實施例中，藉由在生長基板上方生長n型層、作用層及p型層來形成覆晶LED。接著蝕除p型層及作用層之部分以曝露用於電接觸之n型層。接著形成用於n型層及p型層的金屬電極，其中藉由間隙分離該等n電極及該等p電極以避免短路。
為了在電極之間提供對LED之底表面的機械支撐，以介 電層來使間隙之側壁及底表面絕緣，且藉由電鍍使該間隙填充有金屬。填充該間隙之金屬與該等電極中之至少一者電絕緣以防止短路。在LED電極接合至子基板之襯墊時，填充該間隙之金屬緊靠該等襯墊中之一者。因此，在將LED安裝於子基板拼接塊上之後，藉由電極與填充該間隙之金屬的組合來實質上支撐LED之整個底表面，從而不再需要進行底部填充。因此，避免了底部填充的缺點。與有機底部填充材料之CTE及楊氏模數相比，金屬之CTE及楊氏模數更接近於半導體層之CTE及楊氏模數，從而極大地提高操作中所招致的熱應力期間的LED可靠性。
伴隨拼接塊級底部填充製程的消除，可在晶圓級處理更多LED封裝步驟，從而導致更佳的生產可調能力且進一步降低製造成本。一實例為：在對應電極襯墊適當地對準之情況下將LED晶圓接合至載體晶圓，或所鍍敷結構足夠厚且機械上堅硬以形成晶圓載體。接著在晶圓級同時處理載體晶圓上之LED，該處理諸如藉由移除生長基板、粗糙化頂部半導體層以提高光提取率、囊封LED及單體化以用於下一級封裝而進行。在晶圓級處理期間，事實上覆蓋半導體層之底表面的金屬提供對半導體層的良好機械支撐。
亦描述方法及結構的其他實施例。
在各種圖式中以相同數字標記的元件可為相同或等效的。
圖1至圖7說明展示僅單一LED之LED晶圓之小部分的橫 截面，其中在橫向上極大地減小了單一LED之中央部分從而展示側邊緣之細節。為了簡化描述，電極僅接觸每一LED之n型層的周邊。在實際裝置中，可以分散式電極接觸n型層以改良電流展佈。
圖1說明磊晶生長於藍寶石基板12上方的習知LED半導體GaN層10，且表示(按所生長層之次序)晶核層、應力消除層、n層14、作用層16(發光)、p層18及用於形成LED之任何其他半導體層。取決於所要之峰值波長，形成於晶圓上之LED可為AlInGaN LED。或者，LED無需以GaN為基礎，且可為使用任何類型之生長基板的任何其他類型的LED。本發明適用於使任何LED形成為覆晶。
圖2說明已對晶圓進行遮罩處理及乾式蝕刻以自LED之邊緣移除p層18及作用層16，從而曝露圍繞LED周邊之n層16的表面。對晶圓上之全部LED均執行此操作。對於形成覆晶而言，此製程為習知的。
圖2亦展示諸如SiNX之介電層20，在晶圓之表面上方沈積該介電層20且接著使用習知技術在區域21a處對該介電層20進行蝕刻以曝露p層18之表面的一部分，且在區域21b及21c處對該介電層20進行蝕刻以曝露n層14之表面的部分。可藉由噴塗進行該沈積。可使用任何適合介電材料。介電層20覆蓋p層18及作用層16中之開口的側壁，且覆蓋p層18之表面的一部分。
銅晶種層22形成於晶圓之表面的上方，其在區域21a至21c處經由介電層20中之開口與n層及p層建立歐姆接觸。 諸如含有鎳、鎢、鉻、釩及/或鈦的障壁層可形成於銅晶種層22與半導體層之間以避免銅(Cu)原子的遷移。可使用數個熟知技術中之任一者(諸如，CVD、濺鍍等)在整個晶圓上方沈積銅晶種層22及障壁層。
在圖3至圖8中，出於簡化之目的，GaN層10在下文中將被稱作單一半導體GaN層10，且忽略生長基板。p層18及作用層16之厚度為僅幾微米，諸如，約5微米，相對於下文描述之厚得多的所鍍敷電極(例如，約50微米至100微米)，該p層18及作用層16實質上為平坦的。因此，出於簡化之目的，忽略圖2中展示之半導體台面(層16及層18)的高度。圖式中各層的厚度並未按比例繪製。
圖3中，藉由習知微影技術來沈積且圖案化光阻部分26以僅曝露待以銅鍍敷之晶種層22之彼等部分。此等所曝露區域包括銅晶種層22在圖2中之區域21a至21c處電接觸半導體層的若干區域。替代光阻，其他介電材料(諸如氧化物或氮化物)可用作遮罩。
接著以銅28將晶種層22之所曝露部分鍍敷至所要厚度。可使用各種熟知電鍍技術，其中晶種層22耦接至一電位，且使晶圓浸沒於電解質中以用於自電極輸送銅原子。亦可使用無電極鍍敷。銅28有利於在LED表面上方進行散熱及電流展佈。可使用其他金屬及沈積技術。
接著在銅28上方鍍敷薄鎳層30及金層32以提供至子基板襯墊的良好接合界面。
圖4中，在溶液中剝去光阻部分26，留下間隙29，且接 著使用習知技術蝕除所曝露晶種層22。銅28下方之晶種層將不再進行單獨識別。
藉由間隙29，電接觸p層的銅28電極與電接觸n層的銅28電極隔離。
圖5中，接著將例如SiNx之介電層34沈積於晶圓上方，且使用習知技術使之圖案化。可藉由噴塗或其他適合方法來進行沈積。可使用任何適合低K(介電常數)材料。圖案化介電層34以覆蓋銅28所鍍敷的鄰近電極之間的間隙29中的側壁及底表面。經圖案化介電層34亦覆蓋金層32之頂表面上方的小區域以如下文所描述確保不曝露所鍍敷電極之任何側邊，且提供用於支撐金屬層的介電表面。
圖6中，在晶圓表面上方濺鍍薄金晶種層36。
接著在晶種層36上方圖案化光阻(未展示)以僅曝露待以金鍍敷之彼等區域。
如圖7中所展示，接著在單一電鍍步驟中以金電鍍所曝露晶種層36，從而以保形生長方式來填充間隙29(圖6)且同時形成柱形凸塊以用於後續晶粒附著應用。移除光阻之後，接著回蝕所曝露晶種層36以形成以下群組的金柱形凸塊：1)金柱形凸塊40，其經由金層32來電接觸n型層；2)金柱形凸塊42，其經由金層32來電接觸p型層；及3)介電層34上方之金柱形凸塊44，其與n型層及p型層兩者電絕緣。注意，金柱形凸塊44經形成而上覆用於n型層之銅28電極上之介電層34。該等金柱形凸塊44充當緊密隔開的n電極與p電極之間的隔離緩衝器，且對鄰近於間隙之表面提供 機械支撐。
在以超音波方式將LED電極接合至子基板襯墊時，藉由提供金柱形凸塊(而非較大的金層)，金更易併合至子基板金襯墊中。
可接著單體化所得LED晶圓以用於晶粒附著，或可將所得LED晶圓接合至載體晶圓以用於在晶圓級下之進一步處理。或者，銅28層之結構可足夠厚且機械上堅硬以充當用於持續的晶圓級封裝處理的載體晶圓。
在圖8中展示之一實施例中，接著將每一個別LED晶粒安裝於子基板晶圓50上，對於每一LED晶粒，該子基板晶圓50具有用於p接觸的中央金襯墊52及用於n接觸的周邊金襯墊54。接觸襯墊及電極組態可比圖8中展示之情形複雜得多。舉例而言，用於LED晶粒之n電極可藉由穿經p層及作用層的通孔而分散於LED晶粒之表面上，且子基板晶圓上之襯墊將對應於LED晶粒上之電極的位置。子基板晶圓50之本體56可為陶瓷材料或其他適合導熱材料。
LED晶粒上之金柱形凸塊的極性標示為p、n及d(用於無極性的情況)。金柱形凸塊40、42、44之間的間隔可為極小的，此係因為該間隔由用於鍍敷之遮罩(其可製成為極精確的)判定。與其他金柱形凸塊40及44相比，儘管至少部分地填充間隙的金柱形凸塊42可為不平坦的，但該金柱形凸塊42提供間隙區域的機械支撐。又，由於金的相對可延展性特性，以超音波方式將LED電極接合至子基板襯墊將在某種程度上使任何高點變平，從而在LED晶粒之整個 底表面上方提供實質上均一的接觸。因此，LED晶粒之實質上整個底表面由若干金柱形凸塊實質上均一地支撐，從而在後續處理期間提供對半導體層的良好機械支撐。
子基板晶圓50上之襯墊52及襯墊54可一起緊密地形成而不存在置放LED晶粒之不當的容限要求，此係因為金柱形凸塊44被電隔離，且在由於對準不良，一些凸塊44接觸p金屬襯墊52且一些接觸鄰近的n金屬襯墊54的情況下，該等金柱形凸塊44將不會短路。
除了金柱形凸塊42藉由填充銅28之間的間隙而提供機械支撐以外，歸因於所添加之電極區域，金柱形凸塊42亦提高子基板襯墊52至p型層的導電性。
在一實施例中，接著使子基板晶圓50上之LED晶粒經受基板雷射起離製程，其中在使LED晶粒經受雷射脈衝之後起離藍寶石生長基板。此舉在半導體層上產生高向下壓力55。歸因於事實上LED晶粒之整個後表面上方的金柱形凸塊的金屬支撐，半導體層免於斷裂。
接著使LED晶粒經受薄化製程，該薄化製程可使用化學機械拋光(CMP)或其他技術，該薄化製程使半導體層變薄至僅幾微米。接著使用蝕刻製程粗糙化所曝露頂表面以提高光提取率。
接著諸如藉由在全部晶粒上方模製透鏡來囊封LED晶粒。
接著單體化(例如，鋸切)子基板晶圓50以形成個別LED。
圖9說明LED晶粒上之電極組態的另一實施例。未形成任何柱形凸塊。在將銅28鍍敷於半導體層上方以電接觸n層及p層之後，沈積且圖案化介電層34以曝露n及p銅28電極之若干部分。接著在表面上方沈積銅晶種層(未展示)，且以光阻對其進行遮罩處理以曝露僅待電鍍之彼等部分。接著在所曝露晶種層上方電鍍一層銅70以填充銅28電極之間的間隙。接著以鎳層72及金層74鍍敷銅70。接著在表面上方圖案化習知焊料遮罩材料80，且將焊錫膏78塗覆至所曝露金層74以用於將晶粒附著至子基板之襯墊。加熱後，焊錫膏78隨即接合至子基板襯墊。
亦可設想其他電極組態。
在對LED通電時，光穿經上覆p層及作用層的n型層而發射。電極金屬(例如，金或鎳障壁層)向回反射光向上穿經LED。
已詳細描述本發明後，熟習此項技術者應瞭解，在給出本發明的情況下，可在不脫離本文中所描述之發明概念之精神的情況下對本發明作出修改。因此，並不意欲將本發明之範疇限於所說明及所描述之特定實施例。
10‧‧‧半導體GaN層
12‧‧‧藍寶石基板
14‧‧‧n層
16‧‧‧作用層
18‧‧‧p層
20‧‧‧介電層
21a‧‧‧區域
21b‧‧‧區域
21c‧‧‧區域
22‧‧‧銅晶種層
26‧‧‧光阻部分
28‧‧‧銅
29‧‧‧間隙
30‧‧‧鎳層
32‧‧‧金層
34‧‧‧介電層
36‧‧‧金晶種層
40‧‧‧金柱形凸塊
42‧‧‧金柱形凸塊
44‧‧‧金柱形凸塊
50‧‧‧子基板晶圓
52‧‧‧中央金襯墊/p金屬襯墊/子基板襯墊
54‧‧‧周邊金襯墊/n金屬襯墊
55‧‧‧向下壓力
56‧‧‧本體
70‧‧‧銅
72‧‧‧鎳層
74‧‧‧金層
78‧‧‧焊錫膏
80‧‧‧焊料遮罩材料
圖1為生長基板上生長之LED半導體層的簡化橫截面視圖。p型層、作用層及n型層可各自包含多個層。
圖2說明被蝕除以允許與n型層進行歐姆接觸以形成覆晶的p型層及作用層的部分，以及形成於結構上之介電層及銅晶種層。
圖3說明LED半導體層之簡化版本(出於簡化之目的，已忽略p型層及作用層的厚度)，該等LED半導體層形成於表面光阻部分上方，然後藉由鍍敷步驟而形成電接觸n型層與p型層的至少一銅層。
圖4說明剝去光阻部分後且蝕除所曝露晶種層後之圖3之結構。
圖5說明使金屬電極之間的間隙的側壁及底表面絕緣的介電層。
圖6說明濺鍍於介電層之表面上的金晶種層。接著形成光阻部分(未展示)以曝露待鍍敷金之金晶種層區域。
圖7說明在所曝露晶種層鍍敷金後且回蝕該晶種層後的結構。金填充銅電極之間的間隙且覆蓋n電極與p電極之一部分。
圖8說明安裝至子基板晶圓以用於其他處理的LED晶片的圖式。
圖9說明具有另一電極組態之LED晶粒之一部分，其中藉由填充間隙的金屬建立至n型層及p型層兩者的電接觸。
10‧‧‧半導體GaN層
28‧‧‧銅
30‧‧‧鎳層
32‧‧‧金層
34‧‧‧介電層
40‧‧‧金柱形凸塊
42‧‧‧金柱形凸塊
44‧‧‧金柱形凸塊

Claims (19)

  1. 一種發光二極體(LED)覆晶結構，其包含：半導體層，該等半導體層包括一第一導電性層、一作用層及一第二導電性層，該等半導體層具有：一底表面，其面向一子基板；及一頂表面，光穿經該頂表面而發射；一第一電極，其與該底表面對置且電連接至該第一導電性層；一第二電極，其與該底表面對置且電連接至該第二導電性層，其中在該第一電極與該第二電極之間存在至少一間隙；一第一介電層，其使該至少一間隙之若干側壁絕緣；及一第一金屬層，其與該第一電極及該第二電極單獨地形成，該第一金屬層之一第一部分至少部分地填充該至少一間隙且與該第二電極電絕緣。
  2. 如請求項1之結構，其中該第一介電層之一第一部分覆蓋該第二電極之一部分；且該第一金屬層之一第二部分經形成而上覆該第一介電層之該第一部分。
  3. 如請求項2之結構，其中該第一金屬層之該第二部分形成接觸該子基板上之襯墊的一第一群組柱形凸塊。
  4. 如請求項3之結構，其中該第一群組柱形凸塊與該第一電極、該第二電極及該第一金屬層之該第一部分電絕緣。
  5. 如請求項1之結構，其中該第一導電性層包含一p型導電 性層，且該第二導電性層包含一n型導電性層，其中已移除該p型導電性層及作用層之若干部分以曝露該n型導電性層之一部分，從而建立至該第二電極的電接觸。
  6. 如請求項1之結構，其中該第一金屬層為一經鍍敷金屬。
  7. 如請求項1之結構，其中該第一金屬層包含若干柱形凸塊，該等柱形凸塊上覆該第一電極及該第二電極。
  8. 如請求項1之結構，其中該結構進一步包含具有若干襯墊之一子基板，其中該第一電極、該第二電極及該第一金屬層之若干部分接合至該等襯墊。
  9. 如請求項1之結構，其中至少部分地填充該至少一間隙的該第一金屬層之該第一部分藉由延伸於該第一介電層之一邊緣上方的該第一金屬層之一第二部分而電連接至該第一電極。
  10. 如請求項1之結構，其中該結構進一步包含具有若干襯墊之一子基板，其中該第一電極、該第二電極及該第一金屬層之若干部分接合至該等襯墊，其中該第一金屬層之若干部分形成若干柱形凸塊，該等柱形凸塊上覆該第一電極及該第二電極，且其中該第二電極上方之該等柱形凸塊與至少部分地填充該至少一間隙的該第一金屬層之該第一部分電絕緣。
  11. 如請求項10之結構，其中該第一電極上方之該等柱形凸塊電連接至該第一電極且電連接至該金屬層之該第一部分。
  12. 如請求項1之結構，其中該第一金屬層至少部分地機械支撐該等半導體層。
  13. 如請求項1之結構，其中該子基板為複數個LED覆晶安裝於其上的一子基板晶圓，其中，在該第一電極、該第二電極及第一金屬層在該複數個LED之晶圓級處理期間接合至該子基板晶圓之襯墊時，該第一金屬層至少部分地機械支撐該等半導體層。
  14. 一種用於形成一發光二極體(LED)覆晶結構的方法，其包含：形成半導體層，該等半導體層包括一第一導電性層、一作用層及一第二導電性層，該等半導體層具有：一底表面，其面向一子基板；及一頂表面，光穿經該頂表面而發射；蝕刻該第一導電性層及作用層之若干部分以曝露該第二導電性層之一部分；形成一第一電極，其與該底表面對置且電連接至該第一導電性層；形成一第二電極，其與該底表面對置且電連接至該第二導電性層，其中在該第一電極與該第二電極之間存在至少一間隙；形成一第一介電層，其使該至少一間隙之若干側壁絕緣；及形成一第一金屬層，其與該第一電極及該第二電極單獨地形成，該第一金屬層之一第一部分至少部分地填充 該至少一間隙且與該第二電極電絕緣。
  15. 如請求項14之方法，其中該第一介電層之一第一部分覆蓋該第二電極之一部分，且該第一金屬層之一第二部分經形成而上覆該第一介電層之該第一部分。
  16. 如請求項15之方法，其中該第一金屬層之該第二部分形成接觸該子基板上之若干襯墊的一第一群組柱形凸塊。
  17. 如請求項16之方法，其中該第一群組柱形凸塊與該第一電極、該第二電極及該第一金屬層之該第一部分電絕緣。
  18. 如請求項14之方法，其中該結構進一步包含：具有若干襯墊之一子基板，其中該第一電極、該第二電極及該第一金屬層之若干部分接合至該等襯墊，其中該第一金屬層之若干部分形成若干柱形凸塊，該等柱形凸塊上覆該第一電極及該第二電極，且其中該第二電極上方之該等柱形凸塊與至少部分地填充該至少一間隙的該第一金屬層之該第一部分電絕緣。
  19. 如請求項18之方法，其中該第一電極上方之該等柱形凸塊電連接至該第一電極且電連接至該金屬層之該第一部分。
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