CN103474439A - 一种显示装置、阵列基板及其制作方法 - Google Patents

一种显示装置、阵列基板及其制作方法 Download PDF

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CN103474439A
CN103474439A CN2013104462880A CN201310446288A CN103474439A CN 103474439 A CN103474439 A CN 103474439A CN 2013104462880 A CN2013104462880 A CN 2013104462880A CN 201310446288 A CN201310446288 A CN 201310446288A CN 103474439 A CN103474439 A CN 103474439A
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CN103474439B (zh
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王盛
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BOE Technology Group Co Ltd
Hefei BOE Optoelectronics Technology Co Ltd
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Hefei BOE Optoelectronics Technology Co Ltd
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Abstract

本发明涉及显示技术领域，特别涉及一种显示装置、阵列基板及其制作方法。该阵列基板包括氧化物有源层，所述氧化物有源层包括未经过金属化处理过的半导体区域和经过金属化处理过的金属氧化物导体区域。本发明实施例通过将氧化物有源层中的部分区域进行金属化处理形成金属氧化物导体层，由于金属氧化物导体层具有导体特征，可有效减小源漏电极层的电阻且最大程度降低源漏电极层发生断线的几率。

Description

一种显示装置、阵列基板及其制作方法
技术领域
本发明涉及显示技术领域，特别涉及一种显示装置、阵列基板及其制作方法。
背景技术
液晶显示作为一种重要的平板显示方式，近十多年有了飞速的发展。液晶显示有轻、薄、低能耗等优点，被广泛应用与电视、计算机、手机、数码相机等现代化信息设备。近年来，氧化物薄膜晶体管（OxideTFT）因迁移率高备受业界关注。氧化物因较高的迁移率可减小薄膜晶体管尺寸，提升分辨率。提升分辨率同时需减小源漏电极线的宽度，但这样导致金属线容易发生断线现象。
发明内容
（一）要解决的技术问题
本发明要解决的技术问题是提供一种显示装置、阵列基板及其制作方法，以克服现有技术中源漏电极线电阻值较大且容易发生断线的缺陷。
（二）技术方案
为了解决上述技术问题，本发明一方面提供一种阵列基板，包括：氧化物有源层，所述氧化物有源层包括未经过金属化处理过的半导体区域和经过金属化处理过的金属氧化物导体区域。
优选地，所述阵列基板还包括刻蚀阻挡层和源漏电极层，
所述半导体区域和刻蚀阻挡层的位置相对应；
所述金属氧化物导体区域与所述源漏电极位置相对应。
优选地，所述阵列基板还包括栅极、栅极绝缘层、像素电极层和钝化层。
优选地，所述氧化物有源层包括InGaZnO、InGaO、ITZO、AlZnO中的至少一种。
另一方面，本发明还提供一种阵列基板的制作方法，包括：
形成氧化物有源层的图案，所述氧化物有源层的图案包括未经过金属化处理过的半导体区域的图案和经过金属化处理过的金属氧化物导体区域的图案。
优选地，所述制作方法还包括：
形成刻蚀阻挡层的图案；
将氧化物有源层中未被刻蚀阻挡层覆盖的部分进行金属化处理，形成金属氧化物导体区域，而被刻蚀阻挡层覆盖未进行金属化处理的部分形成半导体区域；
通过构图工艺同时形成源漏电极的图案和金属氧化物导体区域的图案；其中，所述金属氧化物导体区域的图案与源漏电极的图案位置相对应。
优选地，所述氧化物有源层包括InGaZnO、InGaO、ITZO、AlZnO中的至少一种。
优选地，所述金属化处理具体为：在100-300℃的还原性气氛中处理30-120min。
优选地，所述还原性气氛包括氢气或含氢等离子体。
再一方面，本发明还提供一种显示装置，包括上述的阵列基板。
（三）有益效果
本发明实施例通过将氧化物有源层中的部分区域形成金属氧化物导体层，由于金属氧化物导体层具有导体特征，可有效减小源漏电极层的电阻且最大程度降低源漏电极发生断线的几率。
附图说明
图1为本发明实施例阵列基板结构平面图；
图2为本发明实施例阵列基板中栅极完成后的截面图；
图3为本发明实施例阵列基板中刻蚀阻挡层制作完成后截面图；
图4为本发明实施例阵列基板中数据线层制作完成后截面图；
图5为本发明实施例阵列基板中过孔工艺制作完成后截面图；
图6为本发明实施例阵列基板中像素电极工艺制作完成后整个阵列基板截面图；
图7为本发明实施例阵列基板制作方法流程图。
具体实施方式
下面结合附图和实施例，对本发明的具体实施方式作进一步详细描述。以下实施例用于说明本发明，但不用来限制本发明的范围。
实施例一
本实施例中提供一种阵列基板，该阵列基板以底栅结构为例进行说明。
如图1和图6所示，该阵列基板包括基板0，在基板0上设有栅极11、栅极绝缘层21、氧化物有源层、刻蚀阻挡层23、源漏电极层31、钝化层41和像素电极层51；所述钝化层41上设有过孔42，像素电极层51通过过孔42与漏电极连接。
所述氧化物有源层包括未经过金属化处理过的半导体区域22和经过金属化处理过的金属氧化物导体区域24；
所述半导体区域22和刻蚀阻挡层23的位置相对应；
所述金属氧化物导体区域24与源漏电极31的位置相对应，且位于源漏电极31的下方。
其中，氧化物有源层包括InGaZnO、InGaO、ITZO、AlZnO中的至少一种。当然，该氧化物有源层的材质除了列举出来的几种，也可以为与上述材料具有相同或相似特征的其他材料。
本发明实施例通过将氧化物有源层中与刻蚀阻挡层相对应的部分进行金属化处理形成金属氧化物导体区域，由于金属氧化物导体区域具有导体特征，可有效减小源漏电极层的电阻且最大程度降低数据线发生断线的几率。
实施例二
本发明实施例提供一种阵列基板，该阵列基板与实施例一不同之处在于，本实施例中的阵列基板为顶栅结构。
该阵列基板可以包括基板，在基板上设有像素电极层、源漏电极层、氧化物有源层、阻挡层、栅绝缘层和栅极，其中，所述像素电极层与漏电极连接。
其中，该氧化物有源层包括未经过金属化处理过的半导体区域和经过金属化处理过的金属氧化物导体区域；
所述半导体区域和刻蚀阻挡层的位置相对应；
所述金属氧化物导体区域与源漏电极层的位置相对应，且位于源漏电极层的上方。
其中，氧化物有源层包括InGaZnO、InGaO、ITZO、AlZnO中的至少一种。当然，该氧化物有源层的材质除了列举出来的几种，也可以为与上述材料具有相同或相似特征的其他材料。
需要说明的是，本实施例阵列基板的改进主要为氧化物有源层的改进，其他层结构可参照现有技术中的顶栅结构，在此不再赘述。
实施例三
如图7所示，基于实施例一的阵列基板结构，本发明还提供一种阵列基板的制作方法，其具体包括：
在基板上形成栅极的图案；
具体的，参考图2，在基板0上沉积栅金属膜，通过构图工艺形成栅极11的图案，该构图工艺具体包括：曝光、显影、刻蚀和剥离等工艺，也可以为打印、丝网印刷能工艺。
形成栅极绝缘层、氧化物有源层和刻蚀阻挡层的图案；
具体的，参考图3，在完成步骤1的基板上沉积栅绝缘材料、氧化物半导体材料22和刻蚀阻挡层材料，通过构图工艺形成栅极绝缘层21、氧化物半导体和刻蚀阻挡层23的图案。
其中，氧化物半导体包括InGaZnO、InGaO、ITZO、AlZnO中的至少一种。当然，除了列举出来的几种优选的材料，具有与上述材料相同或相似的其他氧化物材料同样适用。
将氧化物有源层中未被刻蚀阻挡层覆盖的部分进行金属化处理，形成金属氧化物导体区域，而被刻蚀阻挡层覆盖未进行金属化处理的部分形成半导体区域；
具体的，参考图4，本步骤中，将氧化物有源层中未被刻蚀阻挡层覆盖的部分进行金属化处理，形成金属氧化物导体区域24，其中，金属化处理是在100-300℃的还原性气氛中处理30-120min，还原性气氛包括氢气或含氢等离子体。采用在100-300℃的还原性气氛中发生还原反应30-120min，可最大程度的确保氧化物有源层中未被刻蚀阻挡层覆盖的部分可以充分地、有效地被还原成金属氧化物导体。若该温度过低，将影响还原反应的还原效果，并且会延长该反应时间，降低了生产效率；若该温度过高，容易将氧化物有源层中被刻蚀阻挡层覆盖的不需要进行金属化处理的部分受到化学作用，进而影响该结构性能；同样，若时间过短，将导致还原反应进行地不充分，若时间过长，将延长反应时间，降低生产效率。
经过金属化处理后得到的金属氧化物导体区域具有导体特征，因此，有效减小源漏电极层的电阻且最大程度降低源漏电极层发生断线的几率。
其中，被刻蚀阻挡层覆盖的氧化物有源层为半导体区域22。
通过一次构图工艺形成源漏电极层的图案和金属氧化物导体区域的图案；
继续参考图4，为了节省工艺，设置源漏电极31的图案和金属氧化物导体区域24的图案在同一次构图工艺中完成。其中，金属氧化物导体24的图案与源漏电极31的图案位置相对应，且位于源漏电极31的下方。
具体包括：在经过金属化处理后的金属氧化物导体区域24上沉积源漏金属层，该两层膜层结构共同经过一次曝光工艺后，首先对源漏金属层进行一次刻蚀，形成源漏电极层的图案，更换刻蚀液，继续对金属氧化物导体区域进行刻蚀，形成金属氧化物导体区域的图案；该源漏电极层的图案和金属氧化物导体区域的图案可以相同，当然也可以不同。
形成钝化层，并形成过孔；
参考图5，在完成上述步骤的基板上，通过构图工艺形成钝化层41及过孔42。
通过构图工艺形成像素电极的图案。
参考图6，在完成上述步骤的基板上，通过构图工艺形成像素电极51的图案。
本发明实施例通过将氧化物有源层中未被刻蚀阻挡层覆盖的部分进行金属化处理形成金属氧化物导体层，由于金属氧化物导体层具有导体特征，可有效减小数据线的电阻且最大程度降低数据线发生断线的几率。
需要说明的是，本发明中采用的构图工艺为现有技术中通常采用的曝光、显影、刻蚀和剥离等工艺。
另外，本发明实施例还提供一种显示装置，包括上述阵列基板，所述显示装置可以为：液晶面板、电子纸、OLED面板、液晶电视、液晶显示器、数码相框、手机、平板电脑等任何具有显示功能的产品或部件。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明技术原理的前提下，还可以做出若干改进和替换，这些改进和替换也应视为本发明的保护范围。

Claims (10)

1.一种阵列基板，包括：氧化物有源层，其特征在于，
所述氧化物有源层包括未经过金属化处理过的半导体区域和经过金属化处理过的金属氧化物导体区域。
2.如权利要求1所述的阵列基板，其特征在于，所述阵列基板还包括刻蚀阻挡层和源漏电极层，
所述半导体区域和刻蚀阻挡层的位置相对应；
所述金属氧化物导体区域与所述源漏电极位置相对应。
3.如权利要求2所述的阵列基板，其特征在于，所述阵列基板还包括栅极、栅极绝缘层、像素电极层和钝化层。
4.如权利要求1-3任一项所述的阵列基板，其特征在于，所述氧化物有源层包括InGaZnO、InGaO、ITZO、AlZnO中的至少一种。
5.一种阵列基板的制作方法，其特征在于，包括：
形成氧化物有源层的图案，所述氧化物有源层的图案包括未经过金属化处理过的半导体区域的图案和经过金属化处理过的金属氧化物导体区域的图案。
6.如权利要求5所述的制作方法，其特征在于，所述制作方法还包括：
形成刻蚀阻挡层的图案；
对氧化物有源层中未被刻蚀阻挡层覆盖的部分进行金属化处理，形成金属氧化物导体区域，而被刻蚀阻挡层覆盖未进行金属化处理的部分形成半导体区域；
通过构图工艺同时形成源漏电极的图案和金属氧化物导体区域的图案；其中，所述金属氧化物导体区域的图案与源漏电极的图案位置相对应。
7.如权利要求5所述的制作方法，其特征在于，包括：所述氧化物有源层包括InGaZnO、InGaO、ITZO、AlZnO中的至少一种。
8.如权利要求5所述的制作方法，其特征在于，所述金属化处理具体为：在100-300℃的还原性气氛中处理30-120min。
9.如权利要求8所述的制作方法，其特征在于，所述还原性气氛包括氢气或含氢等离子体。
10.一种显示装置，其特征在于，包括权利要求1-4任一项所述的阵列基板。
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