Background technology
In RFLDMOS(radio frequency horizontal proliferation type burning field effect transistor) in the spacer medium layer process, thick oxygen technique combines monocrystalline silicon and returns quarter and deep plough groove etched technique, used this film layer structure of oxide-film-nitride film-oxide-film, cause in the hard mask dry etching of deep trench process, in place, silicon chip edge inclined-plane and photoetching alignment mark, there is deielectric-coating residual, thereby behind dark silicon trench dry etching, a large amount of silicon tip thorns appears in silicon chip edge inclined-plane and photoetching alignment mark, such as Fig. 1, shown in 2, through after the follow-up wet-cleaned, will form a large amount of silicon grain defectives on the surfacial pattern of silicon chip, these defectives cause technique to produce in a large number.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of lithographic method of RFLDMOS spacer medium layer depth groove, it can avoid deep plough groove etched after, silicon tip thorn appears in silicon chip edge inclined-plane and photoetching alignment mark.
For solving the problems of the technologies described above, the lithographic method of RFLDMOS spacer medium layer depth groove of the present invention may further comprise the steps:
1) in the scribe line of silicon chip, etches zero layer photoetching alignment mark regions;
2) grow successively silicon dioxide film and silicon nitride film;
3) monocrystalline silicon returns quarter, forms the monocrystalline silicon shallow trench on the deep trench zone in thick oxygen district;
4) the hard mask of deposit silicon dioxide;
5) with the hard mask dry etch process of silicon dioxide to the silicon nitride high selectivity, in the monocrystalline silicon shallow trench, form the deep trench figure;
6) with the dry etch process of monocrystalline silicon to silicon dioxide and silicon nitride high selectivity, form deep trench in thick oxygen district.
The present invention is by forming oxide-film-nitride film-oxide-film lamination in silicon chip edge beveled region and photoetching alignment mark, and in the hard mask etching process of deep trench, use oxide-film to the technique of nitride film high selectivity, in the deep trench dry etching, use monocrystalline silicon to the technique of the deielectric-coating high selectivities such as oxide-film, nitride film, avoided effectively that the defective of silicon tip thorn appears in silicon chip edge beveled region and photoetching alignment mark zone in the deep trench dry etching process, thereby helped to realize RFLDMOS spacer medium layer process volume production.
Description of drawings
Fig. 1 is the silicon tip thorn of silicon chip edge beveled region.
Fig. 2 is the silicon tip thorn in the photoetching alignment mark.
Fig. 3 is the etch process flow schematic diagram of the RFLDMOS spacer medium layer depth groove of the embodiment of the invention.
Description of reference numerals is as follows among the figure:
1:P type silicon substrate
2:P type extension
3,6: silicon dioxide film
4: silicon nitride film
5: the monocrystalline silicon shallow trench
7: photoresist
8: deep trench
9: the photoetching alignment mark district
10: thick oxygen district
11: the silicon chip edge beveled region
Embodiment
Understand for technology contents of the present invention, characteristics and effect being had more specifically, existing in conjunction with illustrated execution mode, details are as follows:
The lithographic method of the RFLDMOS spacer medium layer depth groove of present embodiment comprises the steps:
Step 1 by photoetching, etching and the technique such as remove photoresist, forms zero layer photoetching alignment mark regions 9, shown in Fig. 3 (a) in the scribe line of silicon chip.The degree of depth in this photoetching alignment mark district 9 is
Step 2, successively deposit silicon dioxide film 3, silicon nitride film 4 form the lamination of oxide-film-nitride film.
Silicon dioxide film 3 is as the resilient coating of thermal expansion, and thickness is
Silicon nitride film 4 simultaneously also will be as the barrier layer of follow-up hard mask etching and deep plough groove etched mask layer not only as the mask layer of an oxygen, and this layer silicon nitride film 4 can lose in subsequent technique gradually, so thickness is preferably in
More than.
Step 3 at thick oxygen district of silicon chip edge beveled region 11, photoetching alignment mark district 9 and part 10 coating photoresists, is returned quarter by photoetching and monocrystalline silicon, forms monocrystalline silicon shallow trench 5 on deep trench 8 zones in thick oxygen district 10, shown in Fig. 3 (b).
Monocrystalline silicon shallow trench 5 is used for preventing that the cavity of subsequent fields oxygen from coming out at chemical mechanical milling tech, affects subsequent technique.The degree of depth of this monocrystalline silicon shallow trench 5 is preferably in
Deeply can cause technology difficulty to photoetching and thermal oxidation technology again.
Step 4, deposit silicon dioxide film 6 is as the hard mask of subsequent deep trench dry etching, shown in Fig. 3 (c).
The thickness of silicon dioxide film 6 is as long as enough stop deep plough groove etchedly, and in the present embodiment, thickness is preferably in
More than.After finishing the deposit of this step, form oxide-film-nitride film-oxide-film three-decker in silicon chip edge beveled
region 11 and photoetching alignment mark district 9.
Step 5 by photoetching and the silicon oxide film hard mask dry etch process to the silicon nitride film high selectivity, forms the deep trench figure, shown in Fig. 3 (d) in monocrystalline silicon shallow trench 5.Etching condition is: the medium air pressure of 30~60 person of outstanding talent's holders, and 300~500 watts of power, etching gas is mainly with C
4F
6Or C
4F
8Be main, can assist and mix Ar, O
2Deng gas, with suitable increase etch rate.
This etching technics can reach silicon oxide film to the utmost point high selectivity (generally can accomplish 25:1 or higher) of silicon nitride film, at device region deep trench 8 tops not can owing to hard mask dry etching cross carve occur uneven, nitride film in silicon chip edge beveled region 11 and photoetching alignment mark district 9 does not almost have loss, and subsequent deep trench is groove etched to provide enough barrier layers thereby give.
Step 6 with the etching technics of monocrystalline silicon to deielectric-coating (silicon oxide film and silicon nitride film) high selectivity, forms the dark deep trench 8 of 3~4 μ m in thick oxygen district 10, shown in Fig. 3 (e).Etching condition is: the medium air pressure of 30~50 person of outstanding talent's holders, and 900~1500 watts of upper electrode power, 50~90 watts of lower electrode power, etching gas is with SF
6And O
2Be main, suitably add CHF
3Increase is to the etching selection ratio of deielectric-coating (generally at 20:1 between the 25:1).
This deep trench 8 forms thick oxygen layer after the subsequent thermal oxidation.Owing to the hard mask of enough silica is arranged, so the silicon nitride film of bottom can fully stop subsequent chemistry mechanical lapping.And in silicon chip edge beveled
region 11 and photoetching alignment mark district 9 since the hard mask etching technique of step 5 leave after finishing enough nitride films (
More than), therefore, can stop the etching of deep trench, after deep plough groove etched finishing, can not produce the silicon tip thorn.