CN103632949B - The forming method of the hot oxygen medium layer of the inter polysilicon of groove type double-layer grid MOS - Google Patents
The forming method of the hot oxygen medium layer of the inter polysilicon of groove type double-layer grid MOS Download PDFInfo
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- CN103632949B CN103632949B CN201210310839.6A CN201210310839A CN103632949B CN 103632949 B CN103632949 B CN 103632949B CN 201210310839 A CN201210310839 A CN 201210310839A CN 103632949 B CN103632949 B CN 103632949B
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 94
- 229920005591 polysilicon Polymers 0.000 title claims abstract description 93
- 238000000034 method Methods 0.000 title claims abstract description 46
- 229910052760 oxygen Inorganic materials 0.000 title claims abstract description 38
- 239000001301 oxygen Substances 0.000 title claims abstract description 38
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 title claims abstract description 37
- 239000002609 medium Substances 0.000 claims abstract description 44
- 230000003628 erosive effect Effects 0.000 claims abstract description 22
- 230000012010 growth Effects 0.000 claims abstract description 20
- 238000005530 etching Methods 0.000 claims abstract description 19
- 238000001259 photo etching Methods 0.000 claims abstract description 11
- 239000002184 metal Substances 0.000 claims abstract description 6
- 238000002161 passivation Methods 0.000 claims abstract description 6
- 238000006263 metalation reaction Methods 0.000 claims abstract description 5
- 239000001963 growth medium Substances 0.000 claims abstract description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 29
- 229910052710 silicon Inorganic materials 0.000 claims description 29
- 239000010703 silicon Substances 0.000 claims description 29
- 239000000758 substrate Substances 0.000 claims description 18
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 13
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 13
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 13
- 238000001039 wet etching Methods 0.000 claims description 7
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 6
- 238000001312 dry etching Methods 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 230000007773 growth pattern Effects 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 abstract description 6
- 239000010410 layer Substances 0.000 description 130
- 230000003647 oxidation Effects 0.000 description 7
- 238000007254 oxidation reaction Methods 0.000 description 7
- 239000011241 protective layer Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000000903 blocking effect Effects 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000000227 grinding Methods 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Element Separation (AREA)
- Non-Volatile Memory (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The present invention discloses the forming method of the hot oxygen medium layer of the inter polysilicon of a kind of groove type double-layer grid MOS, comprises step: 1) grow the first nitrided film; 2) etching groove; 3) growth medium layer; 4) the first layer polysilicon is grown; 5) the first layer polysilicon the first step anti-carves erosion; 6) photoetching of the first layer polysilicon and the 2nd step anti-carve erosion, and remove the trenched side-wall medium layer above the first layer polysilicon; 7), after deposit the 2nd nitrided film, etching, exposes the first layer polysilicon; 8) hot oxygen medium layer is grown; 9) nitrided film is removed; 10) grid oxic horizon growth; 11) deposit of second layer polysilicon with anti-carve erosion; 12) base stage and source electrode is formed; 13) contact hole, metal and passivation layer is formed. The present invention can solve the problem that thickness of dielectric layers between two-layer polysilicon is difficult to control, it is to increase the stability of MOS device performance; Meanwhile, the highfield that the two because of polysilicon point can be avoided to produce weakens grid source voltage breakdown.
Description
Technical field
The present invention relates to the forming method of the hot oxygen medium layer in a kind of semiconductor applications, particularly relate to the forming method of the hot oxygen medium layer between the polysilicon in a kind of groove type double-layer grid MOS.
Background technology
In power device, the characteristic that groove type double-layer grid power MOS device has voltage breakdown height, conducting resistance is low, efficiency of conversion height, switching speed are fast. Usually, the first layer polysilicon electrode is as guarded electrode and source shorted or leads to extraction separately, and second layer polysilicon electrode is as grid. Oxidated layer thickness between two-layer polysilicon electrode needs strict control, otherwise can form the voltage breakdown of electric leakage or lower.
At present, the preparation method of the zone of oxidation between two-layer polysilicon electrode in existing technique, it is after the first layer polysilicon anti-carves, growing high density plasma body (HDP) oxide film, groove (Trench) enough thick can be filled up by the HDP oxide film of growth, carry out CMP(cmp again), photoetching, HDP oxide film anti-carve, the HDP finally leaving 2500 dusts on the first layer polysilicon is as the medium layer between two-layer polysilicon. Wherein, concrete technical process is as follows:
1) before etching groove, long layer of oxide layer, as blocking layer, then carries out etching groove;
2) groove inner medium layer growth;
3) the first layer polycrystalline silicon growth;
4) the first layer polysilicon the first step anti-carves erosion;
5) photoetching of the first layer polysilicon and the 2nd step anti-carve erosion;
6) high density plasma (HDP) oxide film deposit;
7) HDP oxidation film CMP (cmp) is to residue 3000 dusts;
8) wet etching, makes to remain 2500 dust HDP oxide films on the first layer polysilicon in groove;
9) grid oxic horizon growth;
10) deposit of second layer polysilicon with anti-carve erosion;
11) base stage (BODY) and source electrode (Source) is formed;
12) contact hole, metal and passivation layer is formed.
Wherein, before the etching groove in existing technique, growth layer of oxide layer is as the primitive unit cell of the cell(MOSFET on blocking layer) district's sectional drawing, as shown in Figure 1; The first layer polysilicon twice etching in existing technique and the cell district sectional drawing after removal sidewall oxidation floor, as shown in Figure 2; Cell district sectional drawing after HDP oxide growth in existing technique, as shown in Figure 3; Cell district sectional drawing after HDP oxide film wet etching in existing technique, as shown in Figure 4.
For existing technique, when the first layer polysilicon second time etching depth is below silicon face 1.15 ��m, HDP silicon oxide deposition thickness about 1.5 ��m, HDP silicon oxide CMP amount of grinding about 1.2 ��m, owing to HDP oxide growth thickness and CMP grinding thickness are all very big, so the remaining thickness fluctuation after CMP is very big. In addition, there is difference in CMP grinding rate in silicon chip face between different positions and silicon chip, this result also in CMP after the homogeneity of remaining thickness very poor. Above 2 cause two layers of polycrystalline should between the homogeneity of deielectric-coating thickness and stability all very poor.
Due to HDP oxide film after cmp residual thickness exist rise and fall and fluctuation, so HDP oxide film anti-carve after residual thickness be difficult to control, the performance of device can be made so very unstable. Therefore, the problem that thickness of dielectric layers between two-layer polysilicon is difficult to control need to be solved, to improve the stability of groove type double-layer grid power MOS device performance.
Summary of the invention
The forming method of the hot oxygen medium layer that the technical problem to be solved in the present invention is to provide between the polysilicon in a kind of groove type double-layer grid MOS. By the method, the problem that thickness of dielectric layers between two-layer polysilicon is difficult to control can be solved, it is to increase the stability of MOS device performance; Meanwhile, the highfield that the two because of polysilicon point can be avoided to produce weakens grid source voltage breakdown.
For solving the problems of the technologies described above, the forming method of the hot oxygen medium layer between the polysilicon in the groove type double-layer grid MOS of the present invention, comprises step:
On a silicon substrate, 1) the first nitrided film is grown;
On a silicon substrate, 2) etching groove is carried out;
3) in groove, growth medium layer;
4) on medium layer, growth the first layer polysilicon;
5) the first layer polysilicon is carried out the first step and anti-carve erosion;
6) the first layer polysilicon is carried out photoetching and the 2nd step anti-carves erosion, and remove the trenched side-wall medium layer above the first layer polysilicon;
7) behind the bottom of groove and sidewall and silicon substrate surface deposition the 2nd nitrided film, etching removes the 2nd nitrided film of channel bottom, exposes the first layer polysilicon;
8) on the first layer polysilicon, hot oxygen medium layer is grown;
9) the 2nd nitrided film of trenched side-wall and first and second nitrided film on silicon substrate surface is removed;
10) grid oxic horizon growth;
11) deposit of second layer polysilicon with anti-carve erosion;
12) base stage (BODY) and source electrode (Source) is formed;
13) contact hole, metal and passivation layer is formed.
In described step 1), the method growing the first nitrided film comprises: low-pressure chemical vapor deposition or plasma enhanced chemical vapor deposition; The material of the first nitrided film comprises: silicon nitride; The thickness of the first nitrided film is 500��3000 dusts.
In described step 3), medium layer is oxide film, and thickness is 500��3000 dusts; The growth pattern of medium layer comprises: hot oxygen or low-pressure chemical vapor deposition mode.
In described step 4), the method for growth the first layer polysilicon comprises: low-pressure chemical vapor deposition; The thickness of the first layer polysilicon fills up groove inside for being enough to.
In described step 5), when the first step anti-carves erosion, until being etched to silicon face.
Described step 6) the first layer polysilicon is carried out photoetching and the 2nd step anti-carves in erosion; the first layer polysilicon is carried out photoetching; protect and need the position picking out source polysilicon; remaining the first layer polysilicon position carries out the 2nd step polysilicon and anti-carves erosion, until being etched to the following desired depth of silicon face.
In described step 7), the method for the 2nd nitrided film deposit comprises: low-pressure chemical vapor deposition or plasma enhanced chemical vapor deposition; The material of the 2nd nitrided film comprises: silicon nitride; The thickness of the 2nd nitrided film is 500��3000 dusts; The method of etching is dry etching.
In described step 8), grow hot oxygen medium layer method for grow hot oxygen medium layer by hot oxygen mode; Wherein, the technological temperature in hot oxygen mode is higher than 950 DEG C; The thickness of hot oxygen medium layer is 500��3000 dusts.
In described step 9), the mode of removal comprises: wet etching.
The present invention is by before etching groove; grow one layer of nitride layer; and remain into after the first layer polysilicon electrode is etched to below silicon face; one layer of nitrided film is grown in flute surfaces; then dry etching anisotropy principle is utilized; form silicon nitride sidewall, and connect together with the silicon nitride layer being retained in silicon substrate surface before, form the protective layer at sidewall and top. Utilize the polysilicon surface generation thermal oxide layer of thermooxidizing bottom polysilicon trench, then remove sidewall and top silicon nitride, form hot oxygen medium layer between groove type double-layer grid MOS structure two-layer polysilicon. Owing to the present invention utilizes nitrided film as the protective layer of oxygen spacer medium layer hot between long two-layer polysilicon; make when same isolation performance; more existing formation silica medium layer process simplifies greatly; omit repeatedly the high cost technical process such as HDP and CMP; and there is not the risk that HDP oxide film is difficult to control; Simplified flowsheet control difficulty greatly, namely the invention solves the problem that thickness of dielectric layers between two-layer polysilicon is difficult to control, it is to increase the stability of device performance. What is more important, the method is because using thermal oxidation technology as medium layer, the shape looks of the source polysilicon (the first layer polysilicon) of lower section are made to have turned into the convex of two terminal circle from the spill of two ends point, thus the highfield avoiding the two because of polysilicon point to produce weakens grid source voltage breakdown.
Accompanying drawing explanation
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:
Fig. 1 grows the cell district sectional drawing of layer of oxide layer as blocking layer before the etching groove in existing technique;
Fig. 2 is the cell district sectional drawing after the first layer polysilicon two step in existing technique anti-carves erosion and removes sidewall oxidation floor;
Fig. 3 is the cell district sectional drawing after the HDP oxide growth in existing technique;
Fig. 4 is the cell district sectional drawing after the HDP oxide film wet etching in existing technique;
Fig. 5 is the cell district sectional drawing of etching groove front growth one floor nitride layer as blocking layer of the present invention;
The first layer polysilicon two step that Fig. 6 is the present invention anti-carves the cell district sectional drawing after losing and remove sidewall oxidation floor;
Fig. 7 is the cell district sectional drawing after the growth one floor nitrided film of the present invention;
Fig. 8 is the cell district sectional drawing of the etching formation sidewall nitrided film protective layer of the present invention;
Fig. 9 is the cell district sectional drawing grown on the first layer polysilicon after hot oxygen medium floor of the present invention;
Figure 10 is the cell district sectional drawing after the removal trenched side-wall of the present invention and the nitrided film on silicon substrate surface.
In figure, description of reference numerals is as follows:
1 is silicon substrate, and 2 is zone of oxidation, and 3 is the first nitrided film, and 4 is medium layer, and 5 is the first layer polysilicon, and 6 is the 2nd nitrided film, and 7 is hot oxygen medium layer.
Embodiment
The forming method of the hot oxygen medium layer between the polysilicon in the groove type double-layer grid MOS of the present invention, its step is as follows:
1) on silicon substrate 1, by low-pressure chemical vapor deposition or plasma enhanced chemical vapor deposition method, growing the first nitrided film 3, i.e. silicon nitride layer, the thickness of the first nitrided film 3 is 500��3000 dusts (as shown in Figure 5);
The first nitrided film 3 in this step can be used as the protective layer at groove top in subsequent technique;
2) on silicon substrate 1, etching groove is carried out;
3) in sidewall and the bottom of groove, by hot oxygen or low-pressure chemical vapor deposition mode, growth medium layer 4(and silicon oxide), thickness is 500��3000 dusts;
4) on medium layer 4, by low-pressure chemical vapor deposition, growth the first layer polysilicon 5, the thickness of the first layer polysilicon 5 fills up groove inside for being enough to;
5) the first layer polysilicon 5 is carried out the first step and anti-carve erosion, until being etched to silicon face;
6) the first layer polysilicon 5 is carried out photoetching and the 2nd step anti-carves erosion, and by wet etching, remove the trenched side-wall medium layer 4(above the first layer polysilicon 5 as shown in Figure 6);
Wherein, the first layer polysilicon 5 being carried out photoetching, protects and need the position picking out source polysilicon, remaining the first layer polysilicon position carries out the 2nd step polysilicon and anti-carves erosion, until being etched to the following desired depth of silicon face (certain depth);
The first nitrided film 3 in Fig. 6 is as the sealer of subsequent thermal oxygen medium layer 7;
7) by low-pressure chemical vapor deposition or plasma enhanced chemical vapor deposition, behind the bottom of groove and sidewall and silicon substrate 1 surface (the first nitrided film 3 surface) deposit the 2nd nitrided film (i.e. silicon nitride) 6 (as shown in Figure 7), dry etching removes the 2nd nitrided film 6 of channel bottom, exposes the first layer polysilicon 5(as shown in Figure 8); Wherein, the thickness of the 2nd nitrided film 6 is 500��3000 dusts;
8) on the first layer polysilicon 5, by hot oxygen mode (temperature is higher than 950 DEG C), hot oxygen medium layer 7(is grown as shown in Figure 9), i.e. silicon oxide layer, its thickness is 500��3000 dusts;
9) wet etching, remove the 2nd nitrided film 6 of trenched side-wall, and first nitrided film 3 on silicon substrate 1 surface and the 2nd nitrided film 6(are as shown in Figure 10), leave on the first layer polysilicon 5 of channel bottom the hot oxygen medium layer 7 existed, thus form the hot oxygen medium layer between the two-layer polysilicon in groove type double-layer grid MOS structure;
10) according to existing technique, thermooxidizing is utilized, growth grid oxic horizon;
11) according to existing technique, carry out second layer polysilicon deposit and anti-carve erosion, namely utilize low-pressure chemical vapor deposition growth second layer polysilicon, be etched to silicon face;
12) according to existing technique, by ion implantation, base stage (BODY) and source electrode (Source) is formed;
13) according to existing technique, forming contact hole, metal and passivation layer, namely utilize mask plate etching to form contact hole, deposited metal also etches and forms contact electrode, and deposit also etches formation passivation layer.
According to above-mentioned steps, by after the first layer polysilicon 5 photoetching and the 2nd step anti-carve erosion, need regrowth one layer of the 2nd nitrided film 6 and utilize dry etching anisotropic character, make channel bottom silicon nitride etch clean, while exposing the first layer polysilicon 5 below, sidewall silicon nitride protective layer remains (i.e. the 2nd nitrided film 6 sidewall protection layer), and form protective layer together with the silicon nitride on silicon substrate 1 surface, namely trenched side-wall with grow the first nitrided film 3 on silicon substrate 1 surface before and connect together formation protective layer, follow-up hot oxygen medium layer 7 is only grown on the first layer polysilicon 5, then, by removing the nitrided film of trenched side-wall and silicon substrate 1 surface, hot oxygen sealing coat (i.e. hot oxygen medium layer) is formed with regard to this, namely forms hot oxygen medium layer between the two-layer polysilicon in groove type double-layer grid MOS structure by silicon nitride as screen layer. therefore, the present invention can solve the problem that thickness of dielectric layers between two-layer polysilicon is difficult to control, and the groove type double-layer grid MOS finally prepared has higher stability, meanwhile, the highfield that the present invention also can avoid the two because of polysilicon point to produce weakens grid source voltage breakdown.
Claims (7)
1. the forming method of hot oxygen medium layer between the polysilicon in a groove type double-layer grid MOS, it is characterised in that, comprise step:
On a silicon substrate, 1) the first nitrided film is grown;
On a silicon substrate, 2) etching groove is carried out;
3) in groove, growth medium layer;
4) on medium layer, growth the first layer polysilicon;
5) the first layer polysilicon is carried out the first step and anti-carve erosion, until being etched to silicon face;
6) the first layer polysilicon is carried out photoetching and the 2nd step anti-carves erosion, and remove the trenched side-wall medium layer above the first layer polysilicon, wherein the first layer polysilicon is carried out photoetching, protect and need the position picking out source polysilicon, remaining the first layer polysilicon position carries out the 2nd step polysilicon and anti-carves erosion, until being etched to the following desired depth of silicon face;
7) behind the bottom of groove and sidewall and silicon substrate surface deposition the 2nd nitrided film, etching removes the 2nd nitrided film of channel bottom, exposes the first layer polysilicon;
8) on the first layer polysilicon, hot oxygen medium layer is grown;
9) the 2nd nitrided film of trenched side-wall and first and second nitrided film on silicon substrate surface is removed;
10) grid oxic horizon growth;
11) deposit of second layer polysilicon with anti-carve erosion;
12) base stage and source electrode is formed;
13) contact hole, metal and passivation layer is formed.
2. the method for claim 1, it is characterised in that: described step 1) in, the method growing the first nitrided film comprises: low-pressure chemical vapor deposition or plasma enhanced chemical vapor deposition; The material of the first nitrided film comprises: silicon nitride; The thickness of the first nitrided film is 500��3000 dusts.
3. the method for claim 1, it is characterised in that: described step 3) in, medium layer is oxide film, and thickness is 500��3000 dusts; The growth pattern of medium layer comprises: hot oxygen or low-pressure chemical vapor deposition mode.
4. the method for claim 1, it is characterised in that: described step 4) in, the method for growth the first layer polysilicon comprises: low-pressure chemical vapor deposition; The thickness of the first layer polysilicon fills up groove inside for being enough to.
5. the method for claim 1, it is characterised in that: described step 7) in, the method for the 2nd nitrided film deposit comprises: low-pressure chemical vapor deposition or plasma enhanced chemical vapor deposition;
The material of the 2nd nitrided film comprises: silicon nitride; The thickness of the 2nd nitrided film is 500��3000 dusts;
The method of etching is dry etching.
6. the method for claim 1, it is characterised in that: described step 8) in, grow hot oxygen medium layer method for grow hot oxygen medium layer by hot oxygen mode; Wherein, the technological temperature in hot oxygen mode is higher than 950 DEG C;
The thickness of hot oxygen medium layer is 500��3000 dusts.
7. the method for claim 1, it is characterised in that: described step 9) in, the mode of removal comprises: wet etching.
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| CN105448741A (en) * | 2015-12-31 | 2016-03-30 | 上海华虹宏力半导体制造有限公司 | Shield grid groove type MOSFET process method |
| CN106024607B (en) * | 2016-05-18 | 2019-01-04 | 上海华虹宏力半导体制造有限公司 | The manufacturing method of shield grid power MOSFET |
| CN107482003B (en) * | 2016-06-08 | 2020-03-13 | 中芯国际集成电路制造(上海)有限公司 | Layout structure of transistor, transistor and manufacturing method thereof |
| CN106920752A (en) * | 2017-03-15 | 2017-07-04 | 西安龙腾新能源科技发展有限公司 | Low pressure super node MOSFET grid source aoxidizes Rotating fields and manufacture method |
| CN113972269A (en) * | 2020-07-24 | 2022-01-25 | 和舰芯片制造(苏州)股份有限公司 | Preparation method of SGT power MOSFET |
| CN112838009B (en) * | 2021-01-11 | 2022-08-26 | 广州粤芯半导体技术有限公司 | Manufacturing method of shielded gate trench power device |
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| CN113707550A (en) * | 2021-09-01 | 2021-11-26 | 浙江同芯祺科技有限公司 | IGBT trench gate oxide film forming process |
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| CN101238581A (en) * | 2005-08-09 | 2008-08-06 | 飞兆半导体公司 | Structure and method for forming inter-poly dielectric in a shielded gate field effect transistor |
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| TWI248136B (en) * | 2002-03-19 | 2006-01-21 | Infineon Technologies Ag | Method for fabricating a transistor arrangement having trench transistor cells having a field electrode |
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| US6071794A (en) * | 1999-06-01 | 2000-06-06 | Mosel Vitelic, Inc. | Method to prevent the formation of a thinner portion of insulating layer at the junction between the side walls and the bottom insulator |
| US6180980B1 (en) * | 1999-07-12 | 2001-01-30 | Mosel Vitelic Inc. | Trench non-volatile memory cell |
| CN101238581A (en) * | 2005-08-09 | 2008-08-06 | 飞兆半导体公司 | Structure and method for forming inter-poly dielectric in a shielded gate field effect transistor |
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